Abstract: A method includes forming a first fin protruding from a substrate in a first region of the substrate and a second fin protruding from the substrate in a second region of the substrate, recessing a portion of the first fin, thereby forming a first recess, recessing a portion of the second fin, thereby forming a second recess, depositing a blocking layer in the second recess, growing a base epitaxial layer in the first recess, removing the blocking layer from the second recess, and growing a doped epitaxial layer in the first recess and the second recess. The base epitaxial layer is dopant free. The doped epitaxial layer abuts the first fin in the first region and the second fin in the second region.

Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a fin structure over the substrate, a gate structure over the fin structure, an epitaxial region formed in the fin structure and adjacent to the gate structure. The epitaxial region can embed a plurality of clusters of dopants.

Abstract: The present invention relates to microbial carriers for wastewater treatment, and in particular, relates to an organic composite powder carrier and its application for strengthening biological denitrification in municipal wastewater treatment. The organic composite powder carrier is compounded by a microbial carrier with a relatively large equivalent particle size and an organic alternative carbon source in the form of ultrafine powder. The composite powder carrier in the present invention includes a dedicated organic alternative carbon source, such as polyhydroxyalkanoates (PHA). The organic alternative carbon source can exclude the competitive relationship between microorganisms to ensure that denitrifying bacteria exclusively obtain electron donors required for denitrification.

Abstract: A semiconductor structure includes a semiconductor substrate; fin active regions protruded above the semiconductor substrate; and a gate stack disposed on the fin active regions; wherein the gate stack includes a high-k dielectric material layer, and various metal layers disposed on the high-k dielectric material layer. The gate stack has an uneven profile in a sectional view with a first dimension D1 at a top surface, a second dimension D2 at a bottom surface, and a third dimension D3 at a location between the top surface and the bottom surface, and wherein each of D1 and D2 is greater than D3.

Abstract: A semiconductor structure includes a stack of semiconductor layers disposed over a protruding portion of a substrate, isolation features disposed over the substrate, wherein a top surface of the protruding portion of the substrate is separated from a bottom surface of the isolation features by a first distance, a metal gate stack interleaved with the stack of semiconductor layers, where a bottom portion of the metal gate stack is disposed on sidewalls of the protruding portion of the substrate and where thickness of the bottom portion of the metal gate stack is defined by a second distance that is less than the first distance, and epitaxial source/drain features disposed adjacent to the metal gate stack.

Abstract: This invention provides a method applied for the new dynamic arc radiotherapy treatment planning to calculate an optimal arc angle. With this invention, an operator without rich experience is able to reach the expected low dose in lungs easily and quickly. This invention can not only estimate the distribution of low radiation dose in lungs but also reduce the shortcomings like consumption of time and inaccuracy caused by manual trial and error.

Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a fin structure over the substrate, a gate structure over the fin structure, an epitaxial region formed in the fin structure and adjacent to the gate structure. The epitaxial region can embed a plurality of clusters of dopants.

Abstract: The invention relates to a new biological fluidized bed process with high concentration powder carriers used for the treatment of municipal wastewater, which is a fluidized bed system based on the principle of sewage biochemical treatment, by adding a compound powder carrier to the biochemical tank, and forming a high concentration mixture after mixing and microbial attachment; the sludge mixture after the reaction is concentrated and separated, and then enters the compound powder carrier cyclone separation and recovery system, which can separate most of the compound powder carrier from the discharged excess sludge, and then return to the biochemical tank for recycling. The highly integrated municipal wastewater treatment process proposed in the invention has high treatment efficiency, small occupation area, low operation energy consumption, and can realize the doubling of sewage treatment capacity and the improvement of effluent water quality without adding additional occupancy.

Abstract: A recovery system of composite powder carrier in HPB municipal wastewater treatment includes a biochemical tank and a concentration tank. The composite powder carrier is added to the biochemical tank for biochemically treating on the wastewater. The mixed liquid is then made to flow into the concentration tank. The supernatant obtained after filtration is then discharged. The concentrated sludge is returned to the biochemical tank, and the excess concentrated sludge is transported to a separator. The separator separates the substances with large specific gravity from those having smaller specific gravity, and the substances with large specific gravity are recycled to the biochemical tank for reuse. Matter having smaller specific gravity is discharged. The separator can be used to separate the composite powder carriers for recycling, which improves the utilization rate of the composite powder carriers and reduces the operation cost of the HPB technology for wastewater treatment.

Abstract: Various embodiments of the present disclosure are directed towards a method for forming an integrated chip. The method includes forming an epitaxial structure having a first doping type over a first portion of a semiconductor substrate. A second portion of the semiconductor substrate is formed over the epitaxial structure and the first portion of the semiconductor substrate. A first doped region having the first doping type is formed in the second portion of the semiconductor substrate and directly over the epitaxial structure. A second doped region having a second doping type opposite the first doping type is formed in the second portion of the semiconductor substrate, where the second doped region is formed on a side of the epitaxial structure. A plurality of fins of the semiconductor substrate are formed by selectively removing portions of the second portion of the semiconductor substrate.

Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a fin structure over the substrate, a gate structure over the fin structure, an epitaxial region formed in the fin structure and adjacent to the gate structure. The epitaxial region can embed a plurality of clusters of dopants.

Abstract: A substrate includes a first doped region having a first type dopant, and a second doped region having a second type dopant and adjacent to the first doped region. A stack is formed that includes first layers and second layers alternating with each other. The first and second layers each have a first and second semiconductor material, respectively. The second semiconductor material is different than the first semiconductor material. A mask element is formed that has an opening in a channel region over the second doped region. A top portion of the stack not covered by the mask element is recessed. The stack is then processed to form a first and a second transistors. The first transistor has a first number of first layers. The second transistor has a second number of first layers. The first number is greater than the second number.

Abstract: Various embodiments of the present disclosure are directed towards a method for forming an integrated chip. The method includes forming an epitaxial structure having a first doping type over a first portion of a semiconductor substrate. A second portion of the semiconductor substrate is formed over the epitaxial structure and the first portion of the semiconductor substrate. A first doped region having the first doping type is formed in the second portion of the semiconductor substrate and directly over the epitaxial structure. A second doped region having a second doping type opposite the first doping type is formed in the second portion of the semiconductor substrate, where the second doped region is formed on a side of the epitaxial structure. A plurality of fins of the semiconductor substrate are formed by selectively removing portions of the second portion of the semiconductor substrate.

Abstract: The present disclosure provides antibodies, including antibody fusions, which specifically bind to human CSF1 receptor protein (huCSF1R) and are capable of decreasing, inhibiting, and/or fully-blocking immune regulatory effects mediated by huCSF1R, such as regulation of TAMs in the tumor microenvironment. Additionally, the antibodies include fusions with the cytokine inhibitory factor, IL10, which can replenish and/or activate CD8+ T-cell cytotoxicity in the tumor microenvironment. The present disclosure also provides methods of using the antibodies (and compositions thereof) to treat diseases and conditions responsive to decreasing, inhibiting and/or blocking immune regulatory function or activity mediated by CSF1 binding to CSF1R.

Abstract: A substrate includes a first doped region having a first type dopant, and a second doped region having a second type dopant and adjacent to the first doped region. A stack is formed that includes first layers and second layers alternating with each other. The first and second layers each have a first and second semiconductor material, respectively. The second semiconductor material is different than the first semiconductor material. A mask element is formed that has an opening in a channel region over the second doped region. A top portion of the stack not covered by the mask element is recessed. The stack is then processed to form a first and a second transistors. The first transistor has a first number of first layers. The second transistor has a second number of first layers. The first number is greater than the second number.

Abstract: Methods and devices that provide a first fin structure, a second fin structure, and a third fin structure disposed over a substrate. A dielectric fin is formed between the first fin structure and the second fin structure, and a conductive line is formed between the second fin structure and the third fin structure.

Abstract: The present disclosure provides antibodies, including antibody fusions, which specifically bind to human CSF1 receptor protein (huCSF1R) and are capable of decreasing, inhibiting, and/or fully-blocking immune regulatory effects mediated by huCSF1R, such as regulation of TAMs in the tumor microenvironment. Additionally, the antibodies include fusions with the cytokine inhibitory factor, IL10, which can replenish and/or activate CD8+T-cell cytotoxicity in the tumor microenvironment. The present disclosure also provides methods of using the antibodies (and compositions thereof) to treat diseases and conditions responsive to decreasing, inhibiting and/or blocking immune regulatory function or activity mediated by CSF1 binding to CSF1R.

Abstract: The present invention provides a desiccant pouch for use with a face covering. In one embodiment the desiccant pouch has a desiccant layer having a first side and a second side, a filter layer attached to the first side of the desiccant layer, and a carrier attached to the second side of the desiccant layer. In another embodiment, the desiccant pouch has a desiccant layer having a first side and a second side, a first carrier attached to the first side of the desiccant layer, and a second carrier attached to the second side of the desiccant layer.

Abstract: A semiconductor structure includes a semiconductor substrate; fin active regions protruded above the semiconductor substrate; and a gate stack disposed the fin active regions; wherein the gate stack includes a high-k dielectric material layer, and various metal layers disposed on the high-k dielectric material layer. The gate stack has an uneven profile in a sectional view with a first dimension D1 at a top surface, a second dimension D2 at a bottom surface, and a third dimension D3 at a location between the top surface and the bottom surface, and wherein each of D1 and D2 is greater than D3.

Abstract: Systems and methods of generating electrical current from at least one photovoltaic cell are described herein. In some embodiments, a dual-cell arrangement of photovoltaic cells may be disposed on a face. Equal parts of a first photovoltaic cell and a second photovoltaic cell may be disposed on the face such that when a portion of the face is shaded, the first photovoltaic cell and the second photovoltaic cell receive substantially equal amounts of electromagnetic radiation. In some embodiments, the first photovoltaic cell and the second photovoltaic cell comprises a plurality of sub-cell connected in series and parallel to optimize the power output form the partially exposed cells.