Abstract: A DC-DC digital pulse width modulated power supply is disclosed for generating a DC regulated output voltage. A digital control node has a digital control voltage disposed thereon for controlling the operation of the supply, wherein the digital control voltage has a substantially zero voltage when the output voltage of the supply is at a desired regulation, the digital control voltage having a resolution defined by a least significant bit (LSB). An input node receives a DC analog reference voltage defining the output voltage of the supply. A difference device determines the difference between the analog reference voltage and the output voltage to generate said digital control voltage. An LSB variation device varies the size of the LSB without varying the value of the digital control voltage for a substantially zero difference between the analog reference voltage and the output voltage.

Abstract: A DC-DC digital pulse width modulated power supply is disclosed for generating a DC regulated output voltage. A digital control node has a digital control voltage disposed thereon for controlling the operation of the supply, wherein the digital control voltage has a substantially zero voltage when the output voltage of the supply is at a desired regulation, the digital control voltage having a resolution defined by a least significant bit (LSB). An input node receives a DC analog reference voltage defining the output voltage of the supply. A difference device determines the difference between the analog reference voltage and the output voltage to generate said digital control voltage. An LSB variation device varies the size of the LSB without varying the value of the digital control voltage for a substantially zero difference between the analog reference voltage and the output voltage.

Abstract: An apparatus and method for minimizing limit cycle oscillations within a switched power supply includes providing a programmable dither signal as an input to the digital control loop connected between an output and a control input of the switched power supply. The dither signal minimizes limit cycle oscillations from the output of the switched power supply.

Abstract: A digital PID controller for controlling the operation of a switching power converter is disclosed. A data converter is provided for converting the analog sense voltage to a digital sense voltage. A difference circuit then determines the difference between the digital sense voltage and a reference voltage as a digital error voltage, which reference voltage represents a desired output DC voltage for the power converter. A digital compensator processes the digital error voltage. The digital compensator includes a PID compensation network for compensating the digital error signal with a discrete time PID control law and a postprocessing filter for processing the output of the PID compensation network, comprised of a sinc filter with variable parameters to define the operating characteristics thereof, such that a first notch associated therewith can be placed at a desired frequency.

Abstract: An apparatus for providing over current protection for a digital pulse width modulator is disclosed. The apparatus includes first logic circuitry for generating a primary interrupt indicating that a detected output current is greater than a threshold current. Second logic circuitry blanks out current spikes in the output current occurring on a leading pulse edge of at least one of a plurality of outputs of the digital pulse-width modulator.

Abstract: An apparatus and method for minimizing limit cycle oscillations within a switched power supply includes providing a programmable dither signal as an input to the digital control loop connected between an output and a control input of the switched power supply. The dither signal minimizes limit cycle oscillations from the output of the switched power supply.

Abstract: A DC-DC digital pulse width modulated power supply is disclosed for generating a DC regulated output voltage. A digital control node has a digital control voltage disposed thereon for controlling the operation of the supply, wherein the digital control voltage has a substantially zero voltage when the output voltage of the supply is at a desired regulation, the digital control voltage having a resolution defined by a least significant bit (LSB). An input node receives a DC analog reference voltage defining the output voltage of the supply. A difference device determines the difference between the analog reference voltage and the output voltage to generate said digital control voltage. An LSB variation device varies the size of the LSB without varying the value of the digital control voltage for a substantially zero difference between the analog reference voltage and the output voltage.

Abstract: A differential analog-to-digital data converter (ADC) is disclosed for receiving a positive input signal and a negative input signal. A distributed resistive device is provided having taps associated therewith. A plurality of comparators each having a signal input and a reference input are provided, the signal input connected to one of the positive and negative input signals and the reference input connected to a tap on said distributed resistive device. A driver drives current through the distributed resistive device with one of the taps of the distributed resistive device disposed at substantially the other of the positive and negative input signals. A current varying device varys the current through the distributed resistive device to vary the voltage between taps.

Abstract: A digital PID controller for controlling the operation of a switching power converter is disclosed. A data converter is provided for converting the analog sense voltage to a digital sense voltage. A difference circuit then determines the difference between the digital sense voltage and a reference voltage as a digital error voltage, which reference voltage represents a desired output DC voltage for the power converter. A digital compensator processes the digital error voltage. The digital compensator includes a PID compensation network for compensating the digital error signal with a discrete time PID control law and a postprocessing filter for processing the output of the PID compensation network, comprised of a sinc filter with variable parameters to define the operating characteristics thereof, such that a first notch associated therewith can be placed at a desired frequency.

Abstract: An apparatus for providing over current protection for a digital pulse width modulator is disclosed. The apparatus includes first logic circuitry for generating a primary interrupt indicating that a detected output current is greater than a threshold current. Second logic circuitry blanks out current spikes in the output current occurring on a leading pulse edge of at least one of a plurality of outputs of the digital pulse-width modulator.

Abstract: A method for controlling the output of a switching power converter to account for high and low current loads is disclosed. A reference voltage is generated with a voltage reference generator representing a desired DC output voltage for the power converter. Then the DC voltage output of the power converter is sensed with a digital control system and generating switching control signals to control the operation thereof to minimize the difference between sensed DC voltage and the reference voltage. The current through the power converter is then determined and the operation of the voltage reference generator controlled to set the value of the reference voltage to a level that is a function of the sensed current so as to anticipate future current loading.