Abstract: A semiconductor device includes an active pattern extending in a first direction on a substrate, a gate structure on the active pattern and having a gate electrode extending in a second direction intersecting the active pattern, and a gate capping pattern on the gate electrode, the gate capping pattern including a gate capping liner defining a gate capping recess, the gate capping liner having a horizontal portion along an upper surface of the gate electrode, and a vertical portion extending from the horizontal portion in a third direction intersecting the first and second directions, and a gate capping filling film on the gate capping liner and filling the gate capping recess, an epitaxial pattern on the active pattern and adjacent the gate structure, a gate contact on and connected to the gate electrode, and an active contact on and connected to the epitaxial pattern.

Abstract: A life-saving robot includes a housing having a round ring shape, a buoyancy generator disposed at an upper portion of the housing, a thrust generator disposed at a lower portion of the housing and configured to provide propulsive force, a driver configured to provide power to the thrust generator, and a guard portion that is disposed at the lower portion of the housing and covers the thrust generator. An exterior of the life-saving robot is substantially spherical and defined by a combination of the buoyancy generator, the housing, and the guard portion.

Abstract: A semiconductor device includes an active pattern extending in a first direction on a substrate, a gate structure on the active pattern and having a gate electrode extending in a second direction intersecting the active pattern, and a gate capping pattern on the gate electrode, the gate capping pattern including a gate capping liner defining a gate capping recess, the gate capping liner having a horizontal portion along an upper surface of the gate electrode, and a vertical portion extending from the horizontal portion in a third direction intersecting the first and second directions, and a gate capping filling film on the gate capping liner and filling the gate capping recess, an epitaxial pattern on the active pattern and adjacent the gate structure, a gate contact on and connected to the gate electrode, and an active contact on and connected to the epitaxial pattern.

Abstract: A system for verifying artificial intelligence includes a sensing unit configured to receive process data from process equipment; a test data generation unit configured to generate test data by converting the process data; a simulation unit configured to read the test data and transmit the test data to the sensing unit in the same form as actual process data is transmitted; an abnormality determination unit configured to receive the test data transmitted from the simulation unit and determine whether there is an abnormality by using an artificial intelligence model; and an artificial intelligence verification unit configured to determine the adequacy of the artificial intelligence model by comparing the test data and the determination results of the abnormality determination unit.

Abstract: Proposed is a peptide for skin anti-aging and anti-wrinkle, comprising a glycine-histidine-lysine tripeptide and polyarginine linked to the carboxy-terminus of the tripeptide, and a composition for skin anti-aging and anti-wrinkle comprising the peptide. The peptide and composition may enter the cytoplasm more rapidly and efficiently than a conventional GHK tripeptide, and may exhibit skin anti-aging and anti-wrinkle effects similar to those of the GHK tripeptide even at a lower concentration than that of the GHK tripeptide.

Abstract: Disclosed is a semiconductor device including a substrate including first and second active regions, a device isolation layer on the substrate and defining first and second active patterns, first and second gate electrodes running across the first and second active regions and aligned with each other, first and second source/drain patterns on the first and second active patterns, a first active contact connecting the first and second source/drain patterns to each other, and a gate cutting pattern between the first and second gate electrodes. An upper portion of the first active contact includes first and second upper dielectric patterns. The first active contact has a minimum width at a portion between the first and second upper dielectric patterns. A minimum width of the gate cutting pattern is a second width. A ratio of the first width to the second width is in a range of 0.8 to 1.2.

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, an active pattern extending in a first direction on the substrate, a gate electrode extending in a second direction intersecting the first direction on the active pattern, a gate spacer extending in the second direction along side walls of the gate electrode, an interlayer insulating layer contacting side walls of the gate spacer, a trench formed on the gate electrode in the interlayer insulating layer, a first capping pattern provided along side walls of the trench, at least one side wall of the first capping pattern having an inclined profile, and a second capping pattern provided on the first capping pattern in the trench.

Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, and a gate contact in the gate structure. The gate structure includes a gate electrode extending in a first direction and a gate capping pattern on the gate electrode. The gate contact is connected to the gate electrode. The gate electrode includes a protrusion extending along a boundary between the gate contact and the gate capping pattern.

Abstract: A semiconductor device includes an active pattern extending in a first direction on a substrate, a gate structure on the active pattern and having a gate electrode extending in a second direction intersecting the active pattern, and a gate capping pattern on the gate electrode, the gate capping pattern including a gate capping liner defining a gate capping recess, the gate capping liner having a horizontal portion along an upper surface of the gate electrode, and a vertical portion extending from the horizontal portion in a third direction intersecting the first and second directions, and a gate capping filling film on the gate capping liner and filling the gate capping recess, an epitaxial pattern on the active pattern and adjacent the gate structure, a gate contact on and connected to the gate electrode, and an active contact on and connected to the epitaxial pattern.

Abstract: A method for providing by a server a manufacturing and distribution platform connecting a product buyer and a product seller is provided. The method comprises providing basic disclosed information of multiple sellers to an accessing buyer terminal, receiving information of candidate sellers selected by the buyer terminal, and providing an interface screen of a private chat room which allows the buyer terminal and each candidate seller terminal to exchange manufacturing confidential information related to a product and a company. The private chat room connects the buyer terminal and the candidate sellers one-on-one and each private chat room provided to each of the candidate sellers is maintained or closed according to each step of a contracting procedure set by the buyer terminal.

Abstract: Disclosed is a semiconductor device including a substrate including first and second active regions, a device isolation layer on the substrate and defining first and second active patterns, first and second gate electrodes running across the first and second active regions and aligned with each other, first and second source/drain patterns on the first and second active patterns, a first active contact connecting the first and second source/drain patterns to each other, and a gate cutting pattern between the first and second gate electrodes. An upper portion of the first active contact includes first and second upper dielectric patterns. The first active contact has a minimum width at a portion between the first and second upper dielectric patterns. A minimum width of the gate cutting pattern is a second width. A ratio of the first width to the second width is in a range of 0.8 to 1.2.

Abstract: A semiconductor device includes an active pattern extending in a first horizontal direction on a substrate, a gate electrode extending in a second horizontal direction across the active pattern, and including a first portion, and a second portion protruding upward from the first portion in a vertical direction, a capping pattern extending in the second horizontal direction on the gate electrode, and a gate contact disposed on the second portion of the gate electrode, overlapping the active pattern, and penetrating the capping pattern to connect the gate electrode.

Abstract: Proposed is a peptide for skin anti-aging and anti-wrinkle, comprising a glycine-histidine-lysine tripeptide and polyarginine linked to the carboxy-terminus of the tripeptide, and a composition for skin anti-aging and anti-wrinkle comprising the peptide. The peptide and composition may enter the cytoplasm more rapidly and efficiently than a conventional GHK tripeptide, and may exhibit skin anti-aging and anti-wrinkle effects similar to those of the GHK tripeptide even at a lower concentration than that of the GHK tripeptide.

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, an active pattern extending in a first direction on the substrate, a gate electrode extending in a second direction intersecting the first direction on the active pattern, a gate spacer extending in the second direction along side walls of the gate electrode, an interlayer insulating layer contacting side walls of the gate spacer, a trench formed on the gate electrode in the interlayer insulating layer, a first capping pattern provided along side walls of the trench, at least one side wall of the first capping pattern having an inclined profile, and a second capping pattern provided on the first capping pattern in the trench.

Abstract: A sub battery for easily charging includes: a battery body including a first surface facing toward a first direction and a second surface facing toward a second direction opposite the first direction, and an opening formed on at least a portion between the first and second surfaces; a holder having a charging connector cable attachably and detachably fixed thereto, and movably disposed in the opening; and a locking device mounted between the holder and the battery body to fix the holder to the battery body in a closed state, and to unlock the holder according to a movement of the holder by a first distance.

Abstract: A memory device may include a memory medium and a memory controller. The memory medium may be configured to perform a self-refresh operation and an auto-refresh operation in response to a self-refresh signal and an auto-refresh control signal, respectively. The memory controller may be configured to control the auto-refresh operation by transmitting the auto-refresh control signal to the memory medium. The memory medium includes a self-refresh controller. The self-refresh controller may be configured to control the self-refresh operation based on a self-refresh cycle varying according to an internal temperature of the memory medium and transmit the self-refresh signal to the memory controller. The memory controller may be configured to generate the auto-refresh control signal based on an auto-refresh cycle. The auto-refresh control signal may be determined by the self-refresh signal transmitted from the memory medium.

Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, and a gate contact in the gate structure. The gate structure includes a gate electrode extending in a first direction and a gate capping pattern on the gate electrode. The gate contact is connected to the gate electrode. The gate electrode includes a protrusion extending along a boundary between the gate contact and the gate capping pattern.

Abstract: A semiconductor device includes an active pattern extending in a first horizontal direction on a substrate, a gate electrode extending in a second horizontal direction across the active pattern, and including a first portion, and a second portion protruding upward from the first portion in a vertical direction, a capping pattern extending in the second horizontal direction on the gate electrode, and a gate contact disposed on the second portion of the gate electrode, overlapping the active pattern, and penetrating the capping pattern to connect the gate electrode.

Abstract: A semiconductor device includes a latch circuit and a code comparison circuit. The latch circuit latches an output code generated based on an active command. The latch circuit outputs the latched output code as a latch code in response to a write command. The code comparison circuit compares the latch code with a write code to generate a detection signal.

Abstract: A semiconductor device includes first and second active patterns protruding upward from a substrate, a gate electrode crossing the first and second active patterns and extending in a first direction, a first source/drain region on the first active pattern and on at least one side of the gate electrode, and a second source/drain region on the second active pattern and on at least one side of the gate electrode. The first and second source/drain regions have a conductivity type different from each other, and the second source/drain region has a bottom surface in contact with a top surface of the second active pattern and at a lower level than that of a bottom surface of the first source/drain region in contact with a top surface of the first active pattern. The first active pattern has a first width smaller than a second width of the second active pattern.