Patents by Inventor Jishnu Bhattacharjee

Jishnu Bhattacharjee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8117249
    Abstract: Systems and methods provide analog delay elements, which may be utilized in isolation or in a cascade, such as for use within equalizers or other types of applications. For example, a delay element may include a broadband amplifier and a passive, programmable filter, which may provide a desired magnitude and group delay response over a wide frequency range while being tolerant of process variations. An equalizer, for example, may include the delay element within its feed forward filter and/or within its other circuits, such as within its adaptive coefficient generator or slicer input time-align circuit.
    Type: Grant
    Filed: October 29, 2007
    Date of Patent: February 14, 2012
    Assignee: Scintera Networks, Inc.
    Inventors: Debanjan Mukherjee, Jishnu Bhattacharjee, Qian Yu, Abhijit Phanse
  • Patent number: 7627031
    Abstract: An apparatus and method for adaptively introducing a compensating signal latency related to a signal latency of a data symbol decision circuit. Adaptive timing control circuitry, including an interpolating mixer implemented as a tapped delay line with correlated tap coefficients, introduces a latency adaptively and substantially matching the latency of the data decision circuit for use within an adaptive equalizer, thereby minimizing the mean-squared error of such decision circuit. This adaptive latency is used in generating the feedback error signal which, in turn, can be used by the feedforward equalizer for dynamically adjusting its adaptive filter tap coefficients.
    Type: Grant
    Filed: July 21, 2005
    Date of Patent: December 1, 2009
    Assignee: Scintera Networks Inc.
    Inventors: Qian Yu, Venugopal Balasubramonian, Jishnu Bhattacharjee, Debanjan Mukherjee, Abhijit Phanse, Abhijit G. Shanbhag, Edem Ibragimov, Fabian Giroud
  • Patent number: 7561617
    Abstract: Systems and methods are disclosed to provide channel monitoring and/or performance monitoring for a communication channel. For example, in accordance with an embodiment of the present invention, an equalizer is disclosed that equalizes for channel distortions and also provides channel and performance monitoring information, such as for example bandwidth estimation, channel identification, signal-to-noise ratio, chromatic dispersion, and/or polarization-mode dispersion.
    Type: Grant
    Filed: September 21, 2007
    Date of Patent: July 14, 2009
    Assignee: INPHI Corporation
    Inventors: Abhijit G. Shanbhag, Abhijit Phanse, Jishnu Bhattacharjee, Debanjan Mukherjee, Prashant Choudhary, Edem Ibragimov, Venugopal Balasubramonian, Qian Yu, Madabusi Govindarajan
  • Patent number: 7505515
    Abstract: A continuous time equalizer for equalizing an input signal using a feedforward equalizer portion and a feedback equalizer portion is provided that includes: a slicer operable to make bit decisions on a combined output from the feedforward and feedback equalizer portions; an adaptive delay circuit operable to delay the combined output to form a delayed output; and a controller operable to control the delay provided by the adaptive delay circuit such that a first group delay through the slicer and a second group delay through the adaptive delay circuit in response to a sinusoidal form of the input signal are substantially equal.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: March 17, 2009
    Assignee: Scintera Networks, Inc.
    Inventors: Prashant Choudhary, Qian Yu, Edem Ibragimov, Venu Balasubramonian, Debanjan Mukherjee, Jishnu Bhattacharjee, Fabian Giroud
  • Patent number: 7433399
    Abstract: Systems and methods are disclosed to adaptively generate coefficients for continuous time least mean square error equalizers and to correct offset in high-gain amplifiers. An adaptive coefficient generator includes a bank of individual coefficient generators, each utilizing a first adaptive correction signal for a first correction and a second adaptive correction signal for a second more precise correction. The adaptive correction signals for offset correction can be a current or voltage. The first adaptive correction signal is set by maintaining the second adaptive correction signal constant, such as setting it to zero, and adjusting the first signal until the magnitude of the coefficient is minimized. The second adaptive correction signal is then set by maintaining the first adaptive correction signal at its set value by adjusting the second signal until the magnitude of the coefficient is again minimized.
    Type: Grant
    Filed: October 20, 2004
    Date of Patent: October 7, 2008
    Assignee: Scintera Networks, Inc.
    Inventors: Jishnu Bhattacharjee, Debanjan Mukherjee, Abhijit Phanse
  • Patent number: 7421022
    Abstract: A continuous time electronic dispersion compensation architecture using feed forward equalization and a non-linear decision feedback equalization forms an output signal by a linear combination of successively delayed versions of the input signal and the sliced output signal weighted by appropriate coefficients. A selected number of taps in the mixer used to generate a corresponding number of coefficients for use in the feed forward equalizer are held to a selected voltage to ensure that the coefficients associated with these two taps do not drift. This causes the other coefficients to converge to a unique minimum square error value. In one embodiment the selected voltage is the maximum system voltage.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: September 2, 2008
    Assignee: Inphi Corporation
    Inventors: Prashant Choudhary, Venugopal Balasubramonian, Jishnu Bhattacharjee, Debanjan Mukherjee, Abhijit Phanse, Abhijit Shanbhag, Qian Yu
  • Patent number: 7421021
    Abstract: An adaptive signal equalizer with a feedforward filter in which the feedback error signal and corresponding incoming data signal are dynamically aligned in time using signal interpolation, and further, to control the precursor/postcursor filter taps configuration, thereby producing more adaptive filter tap coefficient signals for significantly improved and robust signal equalization.
    Type: Grant
    Filed: June 7, 2007
    Date of Patent: September 2, 2008
    Assignee: Inphi Corporation
    Inventors: Venugopal Balasubramonian, Jishnu Bhattacharjee, Edem Ibragimov, Debanjan Mukherjee, Abhijit Phanse, Abhijit Shanbhag, Qian Yu
  • Patent number: 7379495
    Abstract: An apparatus and method for adaptively introducing a compensating signal latency related to a signal latency of a data symbol decision circuit. Adaptive timing control circuitry, including an interpolating mixer implemented as a tapped delay line with correlated tap coefficients, introduces a latency adaptively and substantially matching the latency of the data decision circuit for use within an adaptive equalizer, thereby minimizing the mean-squared error of such decision circuit. This adaptive latency is used in generating the feedback error signal which, in turn, can be used by the feedforward equalizer for dynamically adjusting its adaptive filter tap coefficients.
    Type: Grant
    Filed: February 27, 2004
    Date of Patent: May 27, 2008
    Assignee: Scintera Networks Inc.
    Inventors: Qian Yu, Venugopal Balasubramonian, Jishnu Bhattacharjee, Debanjan Mukherjee, Abhijit Phanse, Abhijit G. Shanbhag, Edem Ibragimov, Fabian Giroud
  • Patent number: 7339988
    Abstract: Systems and methods are disclosed to provide channel monitoring and/or performance monitoring for a communication channel. For example, in accordance with an embodiment of the present invention, an equalizer is disclosed that equalizes for channel distortions and also provides channel and performance monitoring information, such as for example bandwidth estimation, channel identification, signal-to-noise ratio, chromatic dispersion, and/or polarization-mode dispersion.
    Type: Grant
    Filed: July 3, 2003
    Date of Patent: March 4, 2008
    Assignee: Scintera Networks, Inc.
    Inventors: Abhijit G. Shanbhag, Abhijit Phanse, Jishnu Bhattacharjee, Debanjan Mukherjee, Prashant Choudhary, Edem Ibragimov, Venugopal Balasubramonian, Qian Yu, Madabusi Govindarajan
  • Patent number: 7327204
    Abstract: A tapped delay chain comprises a plurality of delay cells where each cell has at least two output taps: a primary one for feeding forward a delayed signal to a next cell in the chain, and a secondary output tap for feeding a slightly-differently delayed signal to a multiplier unit so that the slightly-differently delayed signal can be multiplied by a weighting coefficient. The split of output taps in each delay cell allows for a corresponding split of loading capacitance. Each output tap of the delay cell is loaded by a smaller capacitance than it would have had to otherwise drive had the split taps been instead lumped together as a common node. The reduced loading capacitance at each of the split taps allows for a wider frequency response range.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: February 5, 2008
    Assignee: Scintera Networks, Inc.
    Inventors: Debanjan Mukherjee, Jishnu Bhattacharjee
  • Patent number: 7302461
    Abstract: Systems and methods provide analog delay elements, which may be utilized in isolation or in a cascade. For example, a delay element may include a broadband amplifier and a passive, programmable filter, which may provide a desired magnitude and group delay response over a wide frequency range while being tolerant of process variations.
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: November 27, 2007
    Assignee: Scintera Networks, Inc.
    Inventors: Debanjan Mukherjee, Jishnu Bhattacharjee, Qian Yu, Abhijit Phanse
  • Publication number: 20070230557
    Abstract: An adaptive signal equalizer with a feedforward filter in which the feedback error signal and corresponding incoming data signal are dynamically aligned in time using signal interpolation, and further, to control the precursor/postcursor filter taps configuration, thereby producing more adaptive filter tap coefficient signals for significantly improved and robust signal equalization.
    Type: Application
    Filed: June 7, 2007
    Publication date: October 4, 2007
    Applicant: Scintera Networks, Inc.
    Inventors: Venugopal Balasubramonian, Jishnu Bhattacharjee, Edem Ibragimov, Debanjan Mukherjee, Abhijit Phanse, Abhijit Shanbhag, Qian Yu
  • Patent number: 7266145
    Abstract: An adaptive signal equalizer with a feedforward filter in which the feedback error signal and corresponding incoming data signal are dynamically aligned in time using signal interpolation, and further, to control the precursor/postcursor filter taps configuration, thereby producing more adaptive filter tap coefficient signals for significantly improved and robust signal equalization.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: September 4, 2007
    Assignee: Scintera Networks, Inc.
    Inventors: Venugopal Balasubramonian, Jishnu Bhattacharjee, Edem Ibragimov, Debanjan Mukherjee, Abhijit Phanse, Abhijit G. Shanbhag, Qian Yu
  • Patent number: 7265623
    Abstract: A waveform shaping method comprises: (a) receiving link-distorted signal pulses; (b) passing the link-distorted signal pulses through a series of differential amplifiers each have independently tunable, base gains, peak boost gains, boost frequencies and boost bandwidths; and (c) adjusting one or more of the base gains, peak boost gains, boost frequencies and boost bandwidths of the series of differential amplifiers so as to realize a selective and progressive waveform re-shaping of the link-distorted signal pulses.
    Type: Grant
    Filed: August 3, 2004
    Date of Patent: September 4, 2007
    Assignee: Scintera Networks, Inc.
    Inventors: Jishnu Bhattacharjee, Debanjan Mukherjee
  • Publication number: 20070115074
    Abstract: A tapped delay chain comprises a plurality of delay cells where each cell has at least two output taps: a primary one for feeding forward a delayed signal to a next cell in the chain, and a secondary output tap for feeding a slightly-differently delayed signal to a multiplier unit so that the slightly-differently delayed signal can be multiplied by a weighting coefficient. The split of output taps in each delay cell allows for a corresponding split of loading capacitance. Each output tap of the delay cell is loaded by a smaller capacitance than it would have had to otherwise drive had the split taps been instead lumped together as a common node. The reduced loading capacitance at each of the split taps allows for a wider frequency response range.
    Type: Application
    Filed: December 15, 2006
    Publication date: May 24, 2007
    Inventors: Debanjan Mukherjee, Jishnu Bhattacharjee
  • Patent number: 7203233
    Abstract: An adaptive coefficient signal generator for use in an adaptive signal equalizer with fractionally-spaced feedback. The signals representing the feedback tap coefficients are generated in conjunction with a timing interpolation parameter such that the fractionally-spaced feedback circuitry dynamically emulates symbol-spaced feedback circuitry.
    Type: Grant
    Filed: November 21, 2005
    Date of Patent: April 10, 2007
    Assignee: Scintera Networks, Inc.
    Inventors: Abhijit Shanbhag, Qian Yu, Abhijit Phanse, Jishnu Bhattacharjee, Debanjan Mukherjee, Fabian Giroud, Venugopal Balasubramonian
  • Patent number: 7190226
    Abstract: A tapped delay chain comprises a plurality of delay cells where each cell has at least two output taps: a primary one for feeding forward a delayed signal to a next cell in the chain, and a secondary output tap for feeding a slightly-differently delayed signal to a multiplier unit so that the slightly-differently delayed signal can be multiplied by a weighting coefficient. The split of output taps in each delay cell allows for a corresponding split of loading capacitance. Each output tap of the delay cell is loaded by a smaller capacitance than it would have had to otherwise drive had the split taps been instead lumped together as a common node. The reduced loading capacitance at each of the split taps allows for a wider frequency response range.
    Type: Grant
    Filed: August 27, 2004
    Date of Patent: March 13, 2007
    Assignee: Scintera Networks
    Inventors: Debanjan Mukherjee, Jishnu Bhattacharjee
  • Patent number: 7170349
    Abstract: T-coil structures are used in one embodiment to inject programmably-variable amounts of transistor biasing currents into the respective drains of current sinking transistor means of a broadband differential amplifier such that, when the differential amplifier is in common mode, total transistor drain current will exceed total voltage-dropping current passing through corresponding voltage-dropping resistances of the amplifier's transistor means. The T-coil structures keep the parasitic capacitances of the programmable current sources that provide the bias currents de-lumped from capacitances of the amplifier's output nodes and/or capacitances of the amplifier's voltage-dropping resistances (variable resistances) to thereby maintain a wide bandwidth.
    Type: Grant
    Filed: September 21, 2004
    Date of Patent: January 30, 2007
    Assignee: Scintera Networks, Inc.
    Inventors: Jishnu Bhattacharjee, Debanjan Mukherjee
  • Patent number: 7170274
    Abstract: A bandgap reference includes a current source providing a current that is proportional to the sum of a first voltage having a positive-to-absolute-temperature (PTAT) temperature dependency and a second voltage having a complementary-to-absolute-temperature (CTAT) dependency. The bandgap reference further includes a variable resistor comprising a fixed resistor that may be selectively combined with one or more of a plurality of selectable resistors, wherein the first voltage is inversely proportional to the resistance of the variable resistor.
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: January 30, 2007
    Assignee: Scintera Networks, Inc.
    Inventors: Debanjan Mukherjee, Jishnu Bhattacharjee, Abhijit Phanse
  • Publication number: 20060245486
    Abstract: A continuous time electronic dispersion compensation architecture using feed forward equalization and a non-linear decision feedback equalization forms an output signal by a linear combination of successively delayed versions of the input signal and the sliced output signal weighted by appropriate coefficients. A selected number of taps in the mixer used to generate a corresponding number of coefficients for use in the feed forward equalizer are held to a selected voltage to ensure that the coefficients associated with these two taps do not drift. This causes the other coefficients to converge to a unique minimum square error value. In one embodiment the selected voltage is the maximum system voltage.
    Type: Application
    Filed: April 27, 2005
    Publication date: November 2, 2006
    Inventors: Prashant Choudhary, Venugopal Balasubramonian, Jishnu Bhattacharjee, Debanjan Mukherjee, Abhijit Phanse, Abhijit Shanbhag, Qian Yu