Abstract: A linear interpolator is provided that includes differential pairs of transistors biased such that a first input voltage may be multiplied by a factor r wherein 0?r?1 and such that a second input voltage may be multiplied by the complement factor (1?r). By combining the multiplied input voltages, a linear interpolation is provided based upon the factor r.

Abstract: A low-voltage constrained coefficient adaptation and multiplication is provided. To provide the constrained coefficient adaptation, an adder adds an adaptive differential control voltage to a forcing differential control voltage to provide an effective coefficient. The adder is configured such that the forcing differential control voltage can prevent the adaptive differential control voltage from producing a sign change in the effective coefficient.

Abstract: An adaptive coefficient signal generator for use in an adaptive signal equalizer with fractionally-spaced feedback. The signals representing the feedback tap coefficients are generated in conjunction with a timing interpolation parameter such that the fractionally-spaced feedback circuitry dynamically emulates symbol-spaced feedback circuitry.

Abstract: An adaptive coefficient signal generator for use in an adaptive signal equalizer with fractionally-spaced feedback. The signals representing the feedback tap coefficients are generated in conjunction with a timing interpolation parameter such that the fractionally-spaced feedback circuitry dynamically emulates symbol-spaced feedback circuitry.

Abstract: Systems and methods are disclosed to adaptively generate coefficients for continuous time least mean square error equalizers and to correct offset in high-gain amplifiers. An adaptive coefficient generator includes a bank of individual coefficient generators, each utilizing a first adaptive correction signal for a first correction and a second adaptive correction signal for a second more precise correction. The adaptive correction signals for offset correction can be a current or voltage. The first adaptive correction signal is set by maintaining the second adaptive correction signal constant, such as setting it to zero, and adjusting the first signal until the magnitude of the coefficient is minimized. The second adaptive correction signal is then set by maintaining the first adaptive correction signal at its set value by adjusting the second signal until the magnitude of the coefficient is again minimized.

Abstract: A low-voltage constrained coefficient adaptation and multiplication is provided. To provide the constrained coefficient adaptation, an adder adds an adaptive differential control voltage to a forcing differential control voltage to provide an effective coefficient. The adder is configured such that the forcing differential control voltage can prevent the adaptive differential control voltage from producing a sign change in the effective coefficient.

Abstract: T-coil structures are used in one embodiment to inject programmably-variable amounts of transistor biasing currents into the respective drains of current sinking transistor means of a broadband differential amplifier such that, when the differential amplifier is in common mode, total transistor drain current will exceed total voltage-dropping current passing through corresponding voltage-dropping resistances of the amplifier's transistor means. The T-coil structures keep the parasitic capacitances of the programmable current sources that provide the bias currents de-lumped from capacitances of the amplifier's output nodes and/or capacitances of the amplifier's voltage-dropping resistances (variable resistances) to thereby maintain a wide bandwidth.

Abstract: Tap coefficients for fractionally-spaced equalizers are updated iteratively using error statistics from an input bit stream and an output bit stream, such as from a forward error correction circuit. The process continues until the errors converge to a sufficiently small number. Knowledge of the error patterns are used apriori to adaptively change the tap coefficients in a feedforward filter.

Abstract: A tapped delay chain comprises a plurality of delay cells where each cell has at least two output taps: a primary one for feeding forward a delayed signal to a next cell in the chain, and a secondary output tap for feeding a slightly-differently delayed signal to a multiplier unit so that the slightly-differently delayed signal can be multiplied by a weighting coefficient. The split of output taps in each delay cell allows for a corresponding split of loading capacitance. Each output tap of the delay cell is loaded by a smaller capacitance than it would have had to otherwise drive had the split taps been instead lumped together as a common node. The reduced loading capacitance at each of the split taps allows for a wider frequency response range.

Abstract: A linear interpolator is provided that includes differential pairs of transistors biased such that a first input voltage may be multiplied by a factor r wherein 0?r?1 and such that a second input voltage may be multiplied by the complement factor (1?r). By combining the multiplied input voltages, a linear interpolation is provided based upon the factor r.

Abstract: A programmable passive inductor includes two inductors or coils, each having a self-inductance, magnetically coupled together and having a mutual inductance proportional to a magnetic coupling factor. The relative magnitude of the currents through the two inductors can be dynamically varied, which changes the effective inductance.

Abstract: A waveform shaping method comprises: (a) receiving link-distorted signal pulses; (b) passing the link-distorted signal pulses through a series of differential amplifiers each have independently tunable, base gains, peak boost gains, boost frequencies and boost bandwidths; and (c) adjusting one or more of the base gains, peak boost gains, boost frequencies and boost bandwidths of the series of differential amplifiers so as to realize a selective and progressive waveform re-shaping of the link-distorted signal pulses.

Abstract: A digitally controlled transconductance cell includes a differential transistor pair coupled to load elements (either passive or active with resistive or impedance loads) and a variable bias current source, where the transconductance or gain is digitally varied by changing the aspect ratio of the transistors and the bias current.

Abstract: A programmable passive inductor includes two inductors or coils, each having a self-inductance, magnetically coupled together and having a mutual inductance proportional to a magnetic coupling factor. The relative magnitude of the currents through the two inductors can be dynamically varied, which changes the effective inductance.

Abstract: An apparatus and method for adaptively introducing a compensating signal latency related to a signal latency of a data symbol decision circuit. Adaptive timing control circuitry, including an interpolating mixer implemented as a tapped delay line with correlated tap coefficients, introduces a latency adaptively and substantially matching the latency of the data decision circuit for use within an adaptive equalizer, thereby minimizing the mean-squared error of such decision circuit. This adaptive latency is used in generating the feedback error signal which, in turn, can be used by the feedforward equalizer for dynamically adjusting its adaptive filter tap coefficients.

Abstract: Systems and methods are disclosed herein to provide reference generators. For example, in accordance with an embodiment of the present invention, a reference generator is provided for an electrical device, such as for example for an analog-to-digital converter. The reference generator may provide one or more reference signals having a common mode voltage that can track or be varied based on a common mode voltage of an input signal. Alternatively or in addition, the reference generator may provide reference signals for single-ended applications.

Abstract: Systems and methods provide automatic gain control, such as by employing analog and digital techniques. For example, overall gain may be controlled through coarse and fine control signals provided to gain stages, with the overall gain monitored via a power detector circuit.

Abstract: An integrated circuit including a differentially excited symmetric microstrip inductor formed over multiple layers while maintaining both electrical and geometrical symmetry.

Abstract: An adaptive coefficient signal generator for use in an adaptive signal equalizer with fractionally-spaced feedback. The signals representing the feedback tap coefficients are generated in conjunction with a timing interpolation parameter such that the fractionally-spaced feedback circuitry dynamically emulates symbol-spaced feedback circuitry.

Abstract: A linear interpolator is provided that includes differential pairs of transistors biased such that a first input voltage may be multiplied by a factor r wherein 0?r?1 and such that a second input voltage may be multiplied by the complement factor (1?r). By combining the multiplied input voltages, a linear interpolation is provided based upon the factor r.