Abstract: A semiconductor device and a method for forming the semiconductor device are provided. The method includes providing a semiconductor substrate including a first plug-cutting region and a fin-cutting region, and forming an initial to-be-cut fin partially extended to the fin-cutting region. The method also includes forming a gate structure across the initial to-be-cut fin, and forming a dielectric layer covering a sidewall of the gate structure and the initial to-be-cut fin. In addition, the method includes forming a cutting opening over the first plug-cutting region by removing a portion of the dielectric layer and a portion of the initial to-be-cut fin. A remaining initial to-be-cut fin forms a cutting fin. Further, the method includes forming a cutting structure in the cutting opening, and forming a first plug structure in a remaining dielectric layer. The cutting structure cuts the first plug structure in a width direction of the cutting fin.

Abstract: A semiconductor structure and a forming method thereof are provided.

Abstract: A semiconductor structure and a forming method thereof are provided.

Abstract: Semiconductor device and fabrication method are provided. A plurality of first-type fin groups and second-type fins, each between the first-type fin groups, are formed on a substrate. A first-type fin group includes first-type fins. The first-type fins and the second-type fins are arranged in a direction perpendicular to an extending direction of the first-type fins and the second-type fins. The second-type fins are removed to form first trenches between corresponding first-type fin groups. A protective layer is formed on sidewalls of the first trenches after removing the second-type fins. The protective layer covers sidewalls of the first-type fins that are perpendicular to a width direction of the first-type fins. Second trenches are formed in the substrate under the first trenches by etching the substrate at bottoms of the first trenches using the protective layer as an etch mask.

Abstract: Semiconductor structures and fabrication methods are provided. The method includes providing a to-be-etched layer having first regions, second regions and third regions; forming a first core layer on a first region; forming a first sidewall spacer on sidewalls of the first core layer; forming a sacrificial layer covering a portion of the first sidewall spacer on the to-be-etched layer, having a plurality of initial first openings and with a portion of the initial first opening exposing a portion of the first sidewall spacer on the second region; removing the portion of the first sidewall spacer exposed by the portion of the initial first opening to form a first opening; forming a second sidewall spacer in the first opening; and forming second openings in the sacrificial layer. The second openings expose one of or both a portion of the first sidewall spacer and a portion of the second sidewall spacer.

Abstract: Semiconductor structures and fabrication methods are provided. The semiconductor structure includes a substrate including a first region; a first polarization layer on the first region; and a first gate structure on the first polarization layer. A material of the first polarization layer includes a semiconductor compound material containing first polarization atoms.

Abstract: A semiconductor structure and a forming method of a semiconductor structure are provided.

Abstract: A semiconductor structure and a forming method thereof are provided, and the forming method includes: providing a base; forming, on the base, a plurality of conductive function layers extending in a first direction and sequentially arranged in a second direction, a bottom dielectric layer located on the base between the conductive function layers, and a blocking structure located in the conductive function layer, the blocking structure segmenting the conductive function layers located on two sides of the blocking structure in the first direction; forming a top dielectric layer covering the bottom dielectric layer, the conductive function layers, and the blocking structure; etching the top dielectric layer located above a junction of the blocking structure and the conductive function layer and a part of the blocking structure located at a side wall of the conductive function layer, to form a via running through the top dielectric layer and exposing a part of a top and a part of a side wall of the conductive fu

Abstract: A semiconductor device and a method for forming the semiconductor device are provided. The method includes providing a layer to-be-etched including first regions and second regions. A second region includes a second trench region. The method also includes forming a first mask layer over the first and second regions, and forming first trenches discretely in the first mask layer in the first regions. Moreover, the method includes forming a divided doped layer, and implanting dopant ions into the first mask layer disposed outside the second trench region. In addition, the method includes forming a mask sidewall spacer on a sidewall of a first trench after forming the divided doped layer and implanting the dopant ions into the first mask layer disposed outside the second trench region. Further, the method includes forming a second trench in the first mask layer in the second region.

Abstract: Static random access memory (SRAM) and its forming method are provided. The forming method includes: providing a semiconductor substrate including memory cell regions, each memory cell region including a transmission region, a pull-down region and a pull-up region including a pull-up fin cutting region; forming first fins on the transmission region and the pull-down region; forming second initial fins on the pull-up region; forming initial gate structures across the first fins and the second initial fins; forming a dielectric layer on the semiconductor substrate, the first fins and the second initial fins; forming a mask layer on the dielectric layer and the initial gate structures; forming a first cutting layer in the initial gate structures at a bottom of the mask opening; and forming a second cutting layer on the pull-up fin cutting region in the dielectric layer at the bottom of the mask opening and in the second initial fins.

Abstract: A semiconductor structure and a fabrication method of the semiconductor structure are provided in the present disclosure. The semiconductor structure includes a base substrate, a bottom electrode layer on the substrate, a magnetic tunnel junction layer on the bottom electrode layer, and a top electrode layer on the magnetic tunnel junction layer. An opening is formed at least exposing a portion of one of an upper surface and a lower surface of the magnetic tunnel junction layer.

Abstract: A process manufacturing method, a method for adjusting a threshold voltage, a device, and a storage medium are provided.

Abstract: A semiconductor structure and a method for forming the semiconductor structure are provided. The method includes providing a substrate including a first region and a second region, and forming a plurality of fins over the first region. The method also includes forming an isolation layer over a front surface of the substrate, and forming a power rail opening by etching the isolation layer and a first portion of the second region. In addition, the method includes forming a through-hole by etching a second portion of the substrate, and forming a first metal layer in the power rail opening and the through-hole. Further, the method includes thinning a back surface of the substrate until the first metal layer is exposed, and back-etching the back surface of the substrate to enable a back surface of the first metal layer to be above the back surface of the substrate.

Abstract: The method includes providing a to-be-etched layer including an first region and a second region adjoining the first region, forming a first mask layer on the to-be-etched layer, forming a patterned core layer on the first mask layer of the first region, forming a sidewall spacer on the core layer and the first mask layer, forming a first sacrificial layer on the sidewall spacer on the surface of the first mask layer of the second region, forming a second sacrificial layer on the sidewall spacer, removing the first sacrificial layer, the sidewall spacer on the surface of the first mask layer of the second region, and the sidewall spacer on a top of the core layer, removing the core layer, etching the first mask layer of the first region to form a first trench, and etching the first mask layer of the second region to form a second trench.

Abstract: A method for forming a semiconductor device includes providing a to-be-etched layer, forming a first mask layer on the to-be-etched layer, forming a patterned core layer on the first mask layer of a first region, forming a sidewall spacer material layer on the core layer and the first mask layer, removing the sidewall spacer material layer on a top surface of the core layer, removing the core layer and the first mask layer at a bottom of the core layer to form a first trench, removing the sidewall spacer material layer on the first mask layer of a second region, forming a first patterned layer exposing the first mask layer of the second region, and using the first patterned layer as a mask to remove the first mask layer of the second region to form a second trench.

Abstract: A method for forming a semiconductor structure includes providing a substrate, including a first region and a second region adjacent to the first region; forming a first dielectric layer on the substrate in the first region and the second region; and forming a plurality of first plug structures in the first dielectric layer. The top surface of each first plug structure is exposed by the first dielectric layer. The method further includes forming a first conductive layer on the first dielectric layer of the second region; forming a second dielectric layer on the first dielectric layer of the first region and on the first conductive layer of the second region; and forming a plurality of second plug structures in the second dielectric layer of the first region. The bottom surface of each second plug structure is in contact with the top surface of a first plug structure.

Abstract: Semiconductor structures and fabrication methods are provided. An exemplary fabrication method includes providing a to-be-etched layer; forming a first sacrificial film on the to-be-etched layer; and forming a plurality of discrete first sidewall spacers and sidewall trenches on the first sacrificial film. Each sidewall trench is located between two adjacent first sidewall spacers; the first sidewall trenches include a first sidewall trench and a second sidewall trench, and a width of the second sidewall trench is greater than that of the first sidewall trench. The method also includes forming a second sidewall spacer in the first sidewall trench to fill the first sidewall trench; and etching the first sacrificial film using the first sidewall spacers and the second sidewall spacer as an etching mask to form a plurality of discrete first sacrificial layers on the to-be-etched layer.

Abstract: A semiconductor device and a method for forming the semiconductor device are provided. The method includes providing a semiconductor substrate including a first plug-cutting region and a fin-cutting region, and forming an initial to-be-cut fin partially extended to the fin-cutting region. The method also includes forming a gate structure across the initial to-be-cut fin, and forming a dielectric layer covering a sidewall of the gate structure and the initial to-be-cut fin. In addition, the method includes forming a cutting opening over the first plug-cutting region by removing a portion of the dielectric layer and a portion of the initial to-be-cut fin. A remaining initial to-be-cut fin forms a cutting fin. Further, the method includes forming a cutting structure in the cutting opening, and forming a first plug structure in a remaining dielectric layer. The cutting structure cuts the first plug structure in a width direction of the cutting fin.

Abstract: Static random access memory (SRAM) and its forming method are provided. The forming method includes: providing a semiconductor substrate including memory cell regions, each memory cell region including a transmission region, a pull-down region and a pull-up region including a pull-up fin cutting region; forming first fins on the transmission region and the pull-down region; forming second initial fins on the pull-up region; forming initial gate structures across the first fins and the second initial fins; forming a dielectric layer on the semiconductor substrate, the first fins and the second initial fins; forming a mask layer on the dielectric layer and the initial gate structures; forming a first cutting layer in the initial gate structures at a bottom of the mask opening; and forming a second cutting layer on the pull-up fin cutting region in the dielectric layer at the bottom of the mask opening and in the second initial fins.

Abstract: A semiconductor device and its fabrication method are provided. The method includes providing a layer to be etched; forming a first mask layer on the layer to be etched; forming a first trench and a second trench in the first mask layer; forming a blocking layer over the first mask layer, where a portion of the blocking layer is formed in a first portion of the first trench and a first portion of the second trench; forming a first dividing layer in a first blocking opening to divide the first trench along a first direction; when forming the first dividing layer, forming second dividing layers on two sidewalls of a second blocking opening and arranged along the first direction, where the second dividing layers divide the second trench along the first direction; and after forming the first dividing layer and the second dividing layers, removing the blocking layer.