Patents by Inventor Jiun-Rong Pai
Jiun-Rong Pai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250230851Abstract: An apparatus is provided. The apparatus includes an equipment support structure configured to support a semiconductor fabrication component. The apparatus includes a damper assembly configured to resist a lateral force induced by a seismic event to the equipment support structure. The damper assembly includes a gear rack coupled to the equipment support structure. The damper assembly includes a first flywheel assembly including a first mass damper flywheel and a first gear meshed with the gear rack and selectively engaged with the first mass damper flywheel.Type: ApplicationFiled: January 12, 2024Publication date: July 17, 2025Inventors: Chen Hao LIAO, Chih-Tsung LEE, Ming-Yi LIN, Cheng-Lung WU, Jiun-Rong PAI
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Patent number: 12346034Abstract: A method of removing a particle from a pellicle includes moving a nozzle over a surface of a membrane of the pellicle to a location of the particle. A droplet of a liquid material is dispensed from the nozzle to cover the particle on the surface of the membrane. A contact of the droplet with the nozzle is monitored and maintained. The droplet carrying the particle is horizontally dragged along the surface of the membrane toward an edge thereof by the nozzle using the surface tension of the droplet. The droplet carrying the particle is sucked off from the edge of the membrane by a vacuum pump, thereby automatically and safely removing the particle without damaging the pellicle.Type: GrantFiled: April 21, 2023Date of Patent: July 1, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Cheng-Kang Hu, Yin Yuan Chen, Ya-Chieh Wen, Hsu-Shui Liu, Jiun-Rong Pai
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Patent number: 12347704Abstract: A method of a handling semiconductor wafers in a space of a semiconductor wafer processing facility includes: loading a cassette containing at least one semiconductor wafer into a storage buffer of a load port; measuring, from within the storage buffer, a position of a selected at least one semiconductor wafer being retrieve from the cassette residing in the storage buffer; and determining, at least in part based on said measuring, a variation of the position of the selected semiconductor wafer from a nominal position.Type: GrantFiled: March 15, 2022Date of Patent: July 1, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Cheng-Lung Wu, Chih-Hung Huang, Yang-Ann Chu, Jiun-Rong Pai
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Patent number: 12334373Abstract: An apparatus for inspecting wafer carriers is disclosed. In one example, the apparatus includes: a housing; a load port; a robot arm inside the housing; and a processor. The load port is configured to load a wafer carrier into the housing. The robot arm is configured to move a first camera connected to the robot arm. The first camera is configured to capture a plurality of images of the wafer carrier. The processor is configured to process the plurality of images to inspect the wafer carrier.Type: GrantFiled: February 16, 2024Date of Patent: June 17, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Cheng-Kang Hu, Shou-Wen Kuo, Sheng-Hsiang Chuang, Jiun-Rong Pai, Hsu-Shui Liu
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Publication number: 20250191948Abstract: A multiple die container load port may include a housing with an opening, and an elevator to accommodate a plurality of different sized die containers. The multiple die container load port may include a stage supported by the housing and moveable within the opening of the housing by the elevator. The stage may include one or more positioning mechanisms to facilitate positioning of the plurality of different sized die containers on the stage, and may include different portions movable by the elevator to accommodate the plurality of different sized die containers. The multiple die container load port may include a position sensor to identify one of the plurality of different sized die containers positioned on the stage.Type: ApplicationFiled: February 19, 2025Publication date: June 12, 2025Inventors: Chih-Hung HUANG, Cheng-Lung WU, Yi-Fam SHIU, Yu-Chen CHEN, Yang-Ann CHU, Jiun-Rong PAI
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Patent number: 12327747Abstract: A transport carrier docking device may be capable of forming an air-tight seal around a transport carrier while a front portion of the transport carrier is inserted into a chamber of the transport carrier docking device. Semiconductor wafers in the transport carrier may be accessed by a transport tool while the air-tight seal exists around the transport carrier, which prevents and/or reduces the likelihood that contaminants in a semiconductor fabrication facility will reach the semiconductor wafers. The air-tight seal around the transport carrier may reduce defects of the semiconductor wafers that might otherwise be caused by the contaminants, may increase manufacturing yield and quality in the semiconductor fabrication facility, and/or may permit the continued reduction in device and/or feature sizes of integrated circuits and/or semiconductor devices that are to be formed on semiconductor wafers.Type: GrantFiled: March 31, 2022Date of Patent: June 10, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Hung Huang, Cheng-Lung Wu, Yang-Ann Chu, Hsuan Lee, Jiun-Rong Pai
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Patent number: 12322628Abstract: An apparatus for automated wafer carrier handling includes a base plate and an active expansion component movably coupled to the base plate. The active expansion component is configured to change from a contracted form to an expanded form so as to be engaged with a top flange mounted on a wafer carrier.Type: GrantFiled: January 15, 2024Date of Patent: June 3, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ren-Hau Wu, Cheng-Lung Wu, Jiun-Rong Pai, Cheng-Kang Hu
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Publication number: 20250157842Abstract: A multiple transport carrier docking device may be capable of storing and/or staging a plurality of transport carriers in a chamber of the multiple transport carrier docking device, and may be capable of forming an air-tight seal around a transport carrier in the chamber. Semiconductor wafers in the transport carrier may be accessed by a wafer transport tool while the air-tight seal around the transport carrier prevents and/or reduces the likelihood that contaminants in the semiconductor fabrication facility will reach the semiconductor wafers. The air-tight seal around the transport carrier may reduce defects of the semiconductor wafers that might otherwise be caused by the contaminants, may increase manufacturing yield and quality in the semiconductor fabrication facility, and/or may permit the continued reduction in device and/or feature sizes of integrated circuits and/or semiconductor devices that are to be formed on semiconductor wafers.Type: ApplicationFiled: January 16, 2025Publication date: May 15, 2025Inventors: Chih-Hung HUANG, Cheng-Lung WU, Yang-Ann CHU, Hsuan LEE, Jiun-Rong PAI
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Publication number: 20250149360Abstract: An apparatus, system and method for storing die carriers and transferring a semiconductor die between the die carriers. A die stocker includes a rack enclosure with an integrated sorting system. The rack enclosure includes storage cells configured to receive and store die carriers having different physical configurations. A transport system transports first and second die carriers between a first plurality of storage cells and a first sorter load port, where the transport system introduces the first and second die carriers to a first sorter. The transport system transports third and fourth die carriers between a second plurality of storage cells and a second sorter load port, where the transport system introduces the third and fourth die carriers to a second sorter. The first and second die carriers have a first physical configuration, and the third and fourth die carriers have a second physical configuration, different than the first physical configuration.Type: ApplicationFiled: January 13, 2025Publication date: May 8, 2025Inventors: Tsung-Sheng KUO, Chih-Chun CHIU, Chih-Chieh FU, Chueng-Jen WANG, Hsuan LEE, Jiun-Rong PAI
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Publication number: 20250125176Abstract: A portable robotic semiconductor pod loader may detect, with at least one sensor, receipt of a semiconductor pod on a load port of the portable robotic semiconductor pod loader. The at least one sensor is supported by the load port. The portable robotic semiconductor pod loader may cause a robot, of the portable robotic semiconductor pod loader, to align with the semiconductor pod provided on the load port. The portable robotic semiconductor pod loader may cause the robot to attach to the semiconductor pod, and may cause the robot to provide the semiconductor pod from the load port to a staging area of a semiconductor processing tool.Type: ApplicationFiled: December 26, 2024Publication date: April 17, 2025Inventors: Chih-Kuo CHANG, Cheng-Lung WU, Ting-Yau SHIU, Wei-Chen LEE, Yang-Ann CHU, Jiun-Rong PAI
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Publication number: 20250114803Abstract: A plurality of purge nozzles of a purge load port include a nozzle gasket and a nozzle structure to inject a purging fluid into and through an internal chamber of a container (e.g., a FOUP) that is configured to, in operation, transport wafers or workpieces between various locations within a FAB. The nozzle gasket includes a deformable structure that abuts against a surface of a nozzle structure and a sealing structure opposite to the deformable structure that forms a seal between the container and the nozzle gasket. A nozzle hole of a nozzle of the nozzle structure includes a threaded region or portion that is configured to receive a threaded stopper structure to seal off the nozzle hole.Type: ApplicationFiled: October 10, 2023Publication date: April 10, 2025Inventors: Cheng-Lung WU, Yang-Ann CHU, Hsu-Shui LIU, Jiun-Rong PAI
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Patent number: 12272573Abstract: A load port is capable of monitoring various environmental parameters associated with a transport carrier to minimize and/or prevent exposure of the semiconductor substrates therein to increased humidity, increased oxygen, increased vibration, and/or one or more other elevated environmental conditions that might otherwise contaminate the semiconductor substrates, damage the semiconductor substrates, and/or cause processing defects. For example, the load port may monitor the environmental parameters as indicators of a potential blockage of a diffuser of the transport carrier, and a relief valve may be used to divert a gas away from the transport carrier based on a determination that a diffuser blockage has occurred. In this way, the gas may be diverted through the relief valve and away from the transport carrier to prevent increased humidity, contaminants, and/or vibration from contaminating and/or damaging the semiconductor substrates.Type: GrantFiled: June 28, 2021Date of Patent: April 8, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yi-Fam Shiu, Ting-Yau Shiu, Cheng-Lung Wu, Yang-Ann Chu, Jiun-Rong Pai
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Publication number: 20250112081Abstract: Disclosed is a vacuum chuck and a method for securing a warped semiconductor substrate during a semiconductor manufacturing process so as to improve its flatness during a semiconductor manufacturing process. For example, a semiconductor manufacturing system includes: a vacuum chuck configured to hold a substrate, wherein the vacuum chuck comprises, a plurality of vacuum grooves located on a top surface of the vacuum chuck, wherein the top surface is configured to face the substrate; and a plurality of flexible seal rings disposed on the vacuum chuck and extending outwardly from the top surface, wherein the plurality of flexible seal rings are configured to directly contact a bottom surface of the substrate and in adjacent to the plurality of vacuum grooves so as to form a vacuum seal between the substrate and the vacuum chuck, and wherein each of the plurality of flexible seal rings has a zigzag cross section.Type: ApplicationFiled: December 13, 2024Publication date: April 3, 2025Inventors: Chien-Fa LEE, Chin-Lin CHOU, Shang-Ying TSAI, Shou-Wen KUO, Kuei-Sung CHANG, Jiun-Rong PAI, Hsu-Shui LIU, Chun-wen CHENG
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Patent number: 12261069Abstract: A multiple die container load port may include a housing with an opening, and an elevator to accommodate a plurality of different sized die containers. The multiple die container load port may include a stage supported by the housing and moveable within the opening of the housing by the elevator. The stage may include one or more positioning mechanisms to facilitate positioning of the plurality of different sized die containers on the stage, and may include different portions movable by the elevator to accommodate the plurality of different sized die containers. The multiple die container load port may include a position sensor to identify one of the plurality of different sized die containers positioned on the stage.Type: GrantFiled: January 19, 2024Date of Patent: March 25, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Hung Huang, Cheng-Lung Wu, Yi-Fam Shiu, Yu-Chen Chen, Yang-Ann Chu, Jiun-Rong Pai
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Publication number: 20250096030Abstract: Apparatus and methods for handling semiconductor part carriers are disclosed. In one example, an apparatus for handling semiconductor part carriers is disclosed. The apparatus includes a mechanical arm and an imaging system coupled to the mechanical arm. The mechanical arm is configured for holding a semiconductor part carrier. The imaging system is configured for automatically locating a goal position on a surface onto which the semiconductor part carrier is to be placed.Type: ApplicationFiled: November 27, 2024Publication date: March 20, 2025Inventors: Ren-Hau WU, Yan-Han CHEN, Cheng-Kang HU, Feng-Kuang WU, Hsu-Shui LIU, Jiun-Rong PAI
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Patent number: 12237196Abstract: A multiple transport carrier docking device may be capable of storing and/or staging a plurality of transport carriers in a chamber of the multiple transport carrier docking device, and may be capable of forming an air-tight seal around a transport carrier in the chamber. Semiconductor wafers in the transport carrier may be accessed by a wafer transport tool while the air-tight seal around the transport carrier prevents and/or reduces the likelihood that contaminants in the semiconductor fabrication facility will reach the semiconductor wafers. The air-tight seal around the transport carrier may reduce defects of the semiconductor wafers that might otherwise be caused by the contaminants, may increase manufacturing yield and quality in the semiconductor fabrication facility, and/or may permit the continued reduction in device and/or feature sizes of integrated circuits and/or semiconductor devices that are to be formed on semiconductor wafers.Type: GrantFiled: May 15, 2023Date of Patent: February 25, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Hung Huang, Cheng-Lung Wu, Yang-Ann Chu, Hsuan Lee, Jiun-Rong Pai
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Publication number: 20250062153Abstract: A system and method for cleaning ring frames is disclosed. In one embodiment, a ring frame processing system includes: a plurality of blades for mechanically removing tapes and tape residues from surfaces of a ring frame; a plurality of wheel brushes for conditioning the surfaces of the ring frame; and a transport mechanism for transporting the ring frame.Type: ApplicationFiled: November 4, 2024Publication date: February 20, 2025Inventors: Chien-Fa LEE, Hsu-Shui LIU, Jiun-Rong PAI, Shou-Wen KUO, Jian-Hung CHEN, M.C. LIN, C.C. CHIEN, Hsuan LEE, Boris HUANG
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Patent number: 12217991Abstract: A portable robotic semiconductor pod loader may detect, with at least one sensor, receipt of a semiconductor pod on a load port of the portable robotic semiconductor pod loader. The at least one sensor is supported by the load port. The portable robotic semiconductor pod loader may cause a robot, of the portable robotic semiconductor pod loader, to align with the semiconductor pod provided on the load port. The portable robotic semiconductor pod loader may cause the robot to attach to the semiconductor pod, and may cause the robot to provide the semiconductor pod from the load port to a staging area of a semiconductor processing tool.Type: GrantFiled: July 29, 2021Date of Patent: February 4, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Kuo Chang, Cheng-Lung Wu, Ting-Yau Shiu, Wei-Chen Lee, Yang-Ann Chu, Jiun-Rong Pai
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Patent number: 12198956Abstract: An apparatus, system and method for storing die carriers and transferring a semiconductor die between the die carriers. A die stocker includes a rack enclosure with an integrated sorting system. The rack enclosure includes storage cells configured to receive and store die carriers having different physical configurations. A transport system transports first and second die carriers between a first plurality of storage cells and a first sorter load port, where the transport system introduces the first and second die carriers to a first sorter. The transport system transports third and fourth die carriers between a second plurality of storage cells and a second sorter load port, where the transport system introduces the third and fourth die carriers to a second sorter. The first and second die carriers have a first physical configuration, and the third and fourth die carriers have a second physical configuration, different than the first physical configuration.Type: GrantFiled: July 31, 2020Date of Patent: January 14, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITEDInventors: Tsung-Sheng Kuo, Chih-Chun Chiu, Chih-Chieh Fu, Chueng-Jen Wang, Hsuan Lee, Jiun-Rong Pai
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Patent number: 12191185Abstract: Disclosed is a vacuum chuck and a method for securing a warped semiconductor substrate during a semiconductor manufacturing process so as to improve its flatness during a semiconductor manufacturing process. For example, a semiconductor manufacturing system includes: a vacuum chuck configured to hold a substrate, wherein the vacuum chuck comprises, a plurality of vacuum grooves located on a top surface of the vacuum chuck, wherein the top surface is configured to face the substrate; and a plurality of flexible seal rings disposed on the vacuum chuck and extending outwardly from the top surface, wherein the plurality of flexible seal rings are configured to directly contact a bottom surface of the substrate and in adjacent to the plurality of vacuum grooves so as to form a vacuum seal between the substrate and the vacuum chuck, and wherein each of the plurality of flexible seal rings has a zigzag cross section.Type: GrantFiled: August 8, 2022Date of Patent: January 7, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chien-Fa Lee, Chin-Lin Chou, Shang-Ying Tsai, Shou-Wen Kuo, Kuei-Sung Chang, Jiun-Rong Pai, Hsu-Shui Liu, Chun-Wen Cheng