Patents by Inventor Jiun-Rong Pai

Jiun-Rong Pai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11302552
    Abstract: A multiple transport carrier docking device may be capable of storing and/or staging a plurality of transport carriers in a chamber of the multiple transport carrier docking device, and may be capable of forming an air-tight seal around a transport carrier in the chamber. Semiconductor wafers in the transport carrier may be accessed by a wafer transport tool while the air-tight seal around the transport carrier prevents and/or reduces the likelihood that contaminants in the semiconductor fabrication facility will reach the semiconductor wafers. The air-tight seal around the transport carrier may reduce defects of the semiconductor wafers that might otherwise be caused by the contaminants, may increase manufacturing yield and quality in the semiconductor fabrication facility, and/or may permit the continued reduction in device and/or feature sizes of integrated circuits and/or semiconductor devices that are to be formed on semiconductor wafers.
    Type: Grant
    Filed: January 7, 2021
    Date of Patent: April 12, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hung Huang, Cheng-Lung Wu, Yang-Ann Chu, Hsuan Lee, Jiun-Rong Pai
  • Patent number: 11299302
    Abstract: In certain embodiments, a system includes: an inspection station configured to receive a die vessel, wherein the inspection station is configured to inspect the die vessel for defects; a desiccant station configured to receive the die vessel from the inspection station, wherein the desiccant station is configured to add a desiccant to the die vessel; a bundle station configured to receive the die vessel from the desiccant station, wherein the bundle station is configured to combine the die vessel with another die vessel as a die bundle; and a bagging station configured to receive the die bundle from the bundle station, wherein the bagging station is configured to dispose the die bundle in a die bag and to heat seal the die bag with the die bundle inside.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: April 12, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tsung-Sheng Kuo, Hsu-Shui Liu, Jiun-Rong Pai, Yang-Ann Chu, Chieh-Chun Lin, Shine Chen
  • Patent number: 11302553
    Abstract: A transport carrier docking device may be capable of forming an air-tight seal around a transport carrier while a front portion of the transport carrier is inserted into a chamber of the transport carrier docking device. Semiconductor wafers in the transport carrier may be accessed by a transport tool while the air-tight seal exists around the transport carrier, which prevents and/or reduces the likelihood that contaminants in a semiconductor fabrication facility will reach the semiconductor wafers. The air-tight seal around the transport carrier may reduce defects of the semiconductor wafers that might otherwise be caused by the contaminants, may increase manufacturing yield and quality in the semiconductor fabrication facility, and/or may permit the continued reduction in device and/or feature sizes of integrated circuits and/or semiconductor devices that are to be formed on semiconductor wafers.
    Type: Grant
    Filed: January 7, 2021
    Date of Patent: April 12, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hung Huang, Cheng-Lung Wu, Yang-Ann Chu, Hsuan Lee, Jiun-Rong Pai
  • Patent number: 11295973
    Abstract: An apparatus and an operating method for automated wafer carrier handling are provided. The apparatus includes a base frame and an engaging mechanism disposed on the base frame. The engaging mechanism includes a controller and an active expansion component moveably coupled to the base frame and controlled by the controller to perform a reciprocating movement relative to the base frame. The active expansion component is driven by the controller to pass through the base frame to be engaged with a top flange mounted on the wafer carrier.
    Type: Grant
    Filed: February 11, 2020
    Date of Patent: April 5, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ren-Hau Wu, Cheng-Lung Wu, Jiun-Rong Pai, Cheng-Kang Hu
  • Patent number: 11270900
    Abstract: An apparatus for handling wafer carriers in a semiconductor fabrication facility (FAB) is disclosed. In one example, the apparatus includes: a table configured to receive a wafer carrier having a first door and operable to hold a plurality of wafers; an opening mechanism configured to open the first door of the wafer carrier; and a door storage space configured to store the first door. The apparatus may be either located on a floor of the FAB or physically coupled to a ceiling of the FAB.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: March 8, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsung-Sheng Kuo, Yang-Ann Chu, Alan Yang, Vic Huang, Hsu-Shui Liu, Jiun-Rong Pai
  • Publication number: 20220059376
    Abstract: A system and method for defect detection in a hole array on a substrate is disclosed herein. In one embodiment, a method for defect detection in a hole array on a substrate, includes: scanning a substrate surface using at least one optical detector, generating at least one image of the substrate surface; and analyzing the at least one image to detect defects in the hole array on the substrate surface based on a set of predetermined criteria.
    Type: Application
    Filed: August 18, 2020
    Publication date: February 24, 2022
    Inventors: Becky LIAO, Sheng-Hsiang CHUANG, Cheng-Kang HU, Hsu-Shui LIU, Jiun-Rong PAI, Shou-Wen KUO
  • Publication number: 20220059415
    Abstract: Some embodiments of the present disclosure relate to a processing tool. The tool includes a housing enclosing a processing chamber, and an input/output port configured to pass a wafer through the housing into and out of the processing chamber. A back-side macro-inspection system is arranged within the processing chamber and is configured to image a back side of the wafer. A front-side macro-inspection system is arranged within the processing chamber and is configured to image a front side of the wafer according to a first image resolution. A front-side micro-inspection system is arranged within the processing chamber and is configured to image the front side of the wafer according to a second image resolution which is higher than the first image resolution.
    Type: Application
    Filed: November 4, 2021
    Publication date: February 24, 2022
    Inventors: Chia-Han Lin, Chien-Fa Lee, Hsu-Shui Liu, Jiun-Rong Pai, Sheng-Hsiang Chuang, Surendra Kumar Soni, Shou-Wen Kuo, Wu-An Weng, Gary Tsai, Chien-Ko Liao, Ya Hsun Hsueh, Becky Liao, Ethan Yu, Ming-Chi Tsai, Kuo-Yi Liu
  • Publication number: 20220059393
    Abstract: Disclosed is a vacuum chuck and a method for securing a warped semiconductor substrate during a semiconductor manufacturing process so as to improve its flatness during a semiconductor manufacturing process. For example, a semiconductor manufacturing system includes: a vacuum chuck configured to hold a substrate, wherein the vacuum chuck comprises, a plurality of vacuum grooves located on a top surface of the vacuum chuck, wherein the top surface is configured to face the substrate; and a plurality of flexible seal rings disposed on the vacuum chuck and extending outwardly from the top surface, wherein the plurality of flexible seal rings are configured to directly contact a bottom surface of the substrate and in adjacent to the plurality of vacuum grooves so as to form a vacuum seal between the substrate and the vacuum chuck, and wherein each of the plurality of flexible seal rings has a zigzag cross section.
    Type: Application
    Filed: August 20, 2020
    Publication date: February 24, 2022
    Inventors: Chien-Fa LEE, Chin-Lin CHOU, Shang-Ying TSAI, Shou-Wen KUO, Kuei-Sung CHANG, Jiun-Rong PAI, Hsu-Shui LIU, Chun-wen CHENG
  • Patent number: 11251064
    Abstract: A wafer sorting and stoking system provides automated storage and retrieval of wafer frames carrying semiconductor wafers. A wafer frame cassette is received at a transfer port from a transfer system. A robot arm retrieves the wafer frames from the cassette and stores each wafer frame in a respective storage slot in one of a plurality of storage towers. The storage location of each wafer frame is recorded. Each wafer frame can be selectively retrieved and loaded into a wafer frame cassette by the robot arm for further processing.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: February 15, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tsung-Sheng Kuo, I-Lun Yang, Chih-Hung Huang, Jiun-Rong Pai, Chung-Hsin Chien, Yang-Ann Chu
  • Publication number: 20220037178
    Abstract: An apparatus, system and method for storing die carriers and transferring a semiconductor die between the die carriers. A die stocker includes a rack enclosure with an integrated sorting system. The rack enclosure includes storage cells configured to receive and store die carriers having different physical configurations. A transport system transports first and second die carriers between a first plurality of storage cells and a first sorter load port, where the transport system introduces the first and second die carriers to a first sorter. The transport system transports third and fourth die carriers between a second plurality of storage cells and a second sorter load port, where the transport system introduces the third and fourth die carriers to a second sorter. The first and second die carriers have a first physical configuration, and the third and fourth die carriers have a second physical configuration, different than the first physical configuration.
    Type: Application
    Filed: July 31, 2020
    Publication date: February 3, 2022
    Inventors: Tsung-Sheng KUO, Chih-Chun CHIU, Chih-Chieh FU, Chueng-Jen WANG, Hsuan LEE, Jiun-Rong PAI
  • Patent number: 11222802
    Abstract: A multiple die container load port may include a housing with an opening, and an elevator to accommodate a plurality of different sized die containers. The multiple die container load port may include a stage supported by the housing and moveable within the opening of the housing by the elevator. The stage may include one or more positioning mechanisms to facilitate positioning of the plurality of different sized die containers on the stage, and may include different portions movable by the elevator to accommodate the plurality of different sized die containers. The multiple die container load port may include a position sensor to identify one of the plurality of different sized die containers positioned on the stage.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: January 11, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chih-Hung Huang, Cheng-Lung Wu, Yi-Fam Shiu, Yu-Chen Chen, Yang-Ann Chu, Jiun-Rong Pai
  • Publication number: 20210407826
    Abstract: A multiple die container load port may include a housing with an opening, and an elevator to accommodate a plurality of different sized die containers. The multiple die container load port may include a stage supported by the housing and moveable within the opening of the housing by the elevator. The stage may include one or more positioning mechanisms to facilitate positioning of the plurality of different sized die containers on the stage, and may include different portions movable by the elevator to accommodate the plurality of different sized die containers. The multiple die container load port may include a position sensor to identify one of the plurality of different sized die containers positioned on the stage.
    Type: Application
    Filed: June 26, 2020
    Publication date: December 30, 2021
    Inventors: Chih-Hung HUANG, Cheng-Lung WU, Yi-Fam SHIU, Yu-Chen CHEN, Yang-Ann CHU, Jiun-Rong PAI
  • Publication number: 20210391197
    Abstract: A die sorter tool may include a first conveyor, and a first lane to receive, from one or more load ports and via the first conveyor, a carrier with a set of dies. The die sorter tool may include a die flip module to receive the carrier from the first lane, manipulate one or more dies of the set of dies by changing orientations of the one or more dies, and return the one or more dies to the carrier after manipulating the one or more dies and without changing positions of the one or more dies within the carrier. The die sorter tool may include a second conveyor, and a second lane to receive, via the second conveyor, the carrier from the die flip module, and provide, via the first conveyor, the carrier to the one or more load ports.
    Type: Application
    Filed: June 15, 2020
    Publication date: December 16, 2021
    Inventors: Chih-Hung HUANG, Cheng-Lung WU, Zheng-Lin HE, Yang-Ann CHU, Jiun-Rong PAI, Hsuan LEE
  • Publication number: 20210370363
    Abstract: A cleaning apparatus, method, and dry chamber are provided for cleaning a wafer carrier that holds wafers as part of a semiconductor fabrication process. The cleaning apparatus includes a wet chamber that receives the wafer carrier to be washed and a reservoir in fluid communication with the wet chamber. The reservoir stores a cleaning liquid that is introduced to the wafer carrier within the wet chamber during a washing operation, and a dry chamber is spaced apart from the wet chamber. The dry chamber receives the wafer carrier after the wafer carrier is washed in the wet chamber and holds the wafer carrier during a drying operation. A transport system transports the wafer carrier between the wet chamber and the dry chamber during a cleaning process.
    Type: Application
    Filed: May 29, 2020
    Publication date: December 2, 2021
    Inventors: Eason Chen, Yi-Fam Shiu, Sung-Chun Yang, Hsu-Shui Liu, Yang-Ann Chu, Jiun-Rong Pai
  • Publication number: 20210375653
    Abstract: Apparatus and methods for automatically handling die carriers are disclosed. In one example, a disclosed apparatus includes: at least one load port each configured for loading a die carrier operable to hold a plurality of dies; and an interface tool coupled to the at least one load port and a semiconductor processing unit. The interface tool comprises: a first robotic arm configured for transporting the die carrier from the at least one load port to the interface tool, and a second robotic arm configured for transporting the die carrier from the interface tool to the semiconductor processing unit for processing at least one die in the die carrier.
    Type: Application
    Filed: May 28, 2020
    Publication date: December 2, 2021
    Inventors: Tsung-Sheng KUO, Cheng-Lung Wu, Chih-Hung Huang, Yang-Ann Chu, Hsuan Lee, Jiun-Rong Pai
  • Publication number: 20210376649
    Abstract: An under-floor charging station can be mounted under a floor such that a top plate of the under-floor charging station is substantially flush with a top surface of the floor without touching the ground. Openings in the top plate allow charging elements to extend when in use to charge a mobile robot, and to retract under the floor when not in use. The retractable charging elements prevent tripping hazards and allow the mobile robot to move freely throughout a clean room. Moreover, because the charging elements can be retracted in an unobtrusive position when the under-floor charging station is not in use, the under-floor charging station is permitted to be positioned in locations in the clean room that allow the mobile robot to continue working while charging and/or allow non-stop running of the mobile robot.
    Type: Application
    Filed: May 29, 2020
    Publication date: December 2, 2021
    Inventors: Cheng-Lung WU, Sing-Tsung LI, Ren-Hau WU, Yang-Ann CHU, Jiun-Rong PAI, Feng-Kuang WU
  • Patent number: 11171065
    Abstract: Some embodiments of the present disclosure relate to a processing tool. The tool includes a housing enclosing a processing chamber, and an input/output port configured to pass a wafer through the housing into and out of the processing chamber. A back-side macro-inspection system is arranged within the processing chamber and is configured to image a back side of the wafer. A front-side macro-inspection system is arranged within the processing chamber and is configured to image a front side of the wafer according to a first image resolution. A front-side micro-inspection system is arranged within the processing chamber and is configured to image the front side of the wafer according to a second image resolution which is higher than the first image resolution.
    Type: Grant
    Filed: October 14, 2019
    Date of Patent: November 9, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Han Lin, Chien-Fa Lee, Hsu-Shui Liu, Jiun-Rong Pai, Sheng-Hsiang Chuang, Surendra Kumar Soni, Shou-Wen Kuo, Wu-An Weng, Gary Tsai, Chien-Ko Liao, Ya Hsun Hsueh, Becky Liao, Ethan Yu, Ming-Chi Tsai, Kuo-Yi Liu
  • Patent number: 11158531
    Abstract: An operating method of a wafer cassette handling apparatus includes at least the following steps. A stage that carries a wafer cassette is moved into a main body of a wafer cassette handling apparatus to open a cassette door of the wafer cassette. The stage that carries the wafer cassette is moved out of the main body after the cassette door is opened. A wafer is extracted from the wafer cassette and transferred to a processing system. Another operating method and a wafer cassette handling apparatus are also provided.
    Type: Grant
    Filed: December 15, 2019
    Date of Patent: October 26, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Sheng Kuo, Hsuan Lee, Hsu-Shui Liu, Jiun-Rong Pai, Chih-Hung Huang, Yang-Ann Chu
  • Patent number: 11152238
    Abstract: In an embodiment, a system includes a profiler configured to detect variations along a surface of a semiconductor stage; and a jig configured to move the profiler along an axis over the semiconductor stage.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: October 19, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Kang Hu, Hsu-Shui Liu, Jiun-Rong Pai, Shou-Wen Kuo, Sheng-Hsiang Chuang, Cheng-Hung Chen
  • Patent number: 11120539
    Abstract: A method for scanning and analyzing a surface, the method comprising: receiving a piece of equipment with a target surface for inspection; receiving an input from a user; determining at least one scan parameter based on the user input; scanning the target surface using an optical detector in accordance with the at least one scan parameter; generating an image of the target surface; correcting the image of the target surface to remove at least one undesired feature to generate a corrected image based on the at least one scan parameter; and analyzing the corrected image to determine at least one geometric parameter of the target surface.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: September 14, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Sheng-Hsiang Chuang, Jiao-Rou Liao, Cheng-Kang Hu, Shou-Wen Kuo, Jiun-Rong Pai, Hsu-Shui Liu