Patents by Inventor Ji Ung Lee

Ji Ung Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240088059
    Abstract: An electronic device structure having a shielding structure includes a substrate with an electronic component electrically connected to the substrate. The shielding structure includes conductive spaced-apart pillar structures that have proximate ends connected to the substrate and distal ends spaced apart from the substrate, and that are laterally spaced apart from the first electronic component. In one embodiment, the conductive pillar structures are conductive wires attached at one end to the substrate with an opposing end extending away from the substrate so that the conductive wires are provided generally perpendicular to the substrate. A package body encapsulates the electronic component and the conductive spaced-apart pillar structures. In one embodiment, the shielding structure further includes a shielding layer disposed adjacent to the package body, which is electrically connected to the conductive spaced-apart pillar structures.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Young Woo LEE, Jae Ung LEE, Byong Jin KIM, EunNaRa CHO, Ji Hoon OH, Young Seok KIM, Jin Young KHIM, Tae Kyeong HWANG, Jin Seong KIM, Gi Jung KIM
  • Publication number: 20220374680
    Abstract: A deep learning device and system including the same is provided. The deep learning device comprising processing circuitry configured to determine whether a received image is abnormal using an anomaly detection model; merge at least some vectors extracted from the anomaly detection model; input, to a probability approximation model, principal components generated by a principal component analysis (PCA) to detect whether out of distribution (OOD) occurs in data of the received image; store a result of the determinations; and extract at least some the data in which the OOD occurs, as target labeling, using a target labeling extraction model when a rate of the data in which the OOD occurs is greater than or equal to a threshold value, wherein the anomaly detection model determines whether the received image is abnormal using the target labeling.
    Type: Application
    Filed: November 18, 2021
    Publication date: November 24, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Young Jae KIM, Kae Weon YOU, Ji Ung LEE, Jun Haeng LEE, Kyoung Hoon KANG, Young Hak LEE
  • Patent number: 10850180
    Abstract: A golf information service method realized in a screen golf system, the golf information service method, includes: a mobile terminal of each of a plurality of users accessing a server connected to a simulator, configured to realize an image in which a virtual ball is simulated on a virtual golf course such that the users play a virtual golf game, over a network; the server receiving information about the golf game that is being performed by the simulator from the simulator; the server transmitting the information about the golf game, received from the simulator, and information about a course map based thereon to the mobile terminal; and the mobile terminal displaying information about progress of the golf game on the course map of a hole on which the golf game is being played based on the information about the golf game.
    Type: Grant
    Filed: March 14, 2017
    Date of Patent: December 1, 2020
    Assignee: GOLFZON CO., LTD.
    Inventors: Ji Ung Lee, Chang Sun Yang, Hee Su Lee, Chang Jin Hong
  • Publication number: 20190022509
    Abstract: A golf information service method realized in a screen golf system, the golf information service method, includes: a mobile terminal of each of a plurality of users accessing a server connected to a simulator, configured to realize an image in which a virtual ball is simulated on a virtual golf course such that the users play a virtual golf game, over a network; the server receiving information about the golf game that is being performed by the simulator from the simulator; the server transmitting the information about the golf game, received from the simulator, and information about a course map based thereon to the mobile terminal; and the mobile terminal displaying information about progress of the golf game on the course map of a hole on which the golf game is being played based on the information about the golf game.
    Type: Application
    Filed: March 14, 2017
    Publication date: January 24, 2019
    Applicant: GOLFZON CO., LTD.
    Inventors: Ji Ung LEE, Chang Sun YANG, Hee Su LEE, Chang Jin HONG
  • Patent number: 8274205
    Abstract: The system and method provided herein for limiting the effects of arcing in field-type electron emitter arrays improves the robustness of such arrays. Field-type electron emitter arrays generally have a substrate, an insulator, and a gating electrode. By including a resistive substance in the gate of the emitter array, arcing events may be isolated to a single emitter such that the remaining emitters of an array can continue electron emission and/or the short circuit current of the arc can be limited.
    Type: Grant
    Filed: December 5, 2006
    Date of Patent: September 25, 2012
    Assignee: General Electric Company
    Inventors: Colin R. Wilson, Ji-Ung Lee
  • Patent number: 7982570
    Abstract: An inductor includes an electrical conductor wound in a magnetic flux concentrating pattern, the electrical conductor comprises a plurality of carbon nanotubes that are substantially aligned with an axis along a center of the electrical conductor.
    Type: Grant
    Filed: November 7, 2006
    Date of Patent: July 19, 2011
    Assignee: General Electric Company
    Inventors: William E. Burdick, Jr., Ji-Ung Lee, Michael A. de Rooij
  • Patent number: 7902736
    Abstract: The present invention relates to gated nanorod field emission devices, wherein such devices have relatively small emitter tip-to-gate distances, thereby providing a relatively high emitter tip density and low turn on voltage. Such methods employ a combination of traditional device processing techniques (lithography, etching, etc.) with electrochemical deposition of nanorods. These methods are relatively simple, cost-effective, and efficient; and they provide field emission devices that are suitable for use in x-ray imaging applications, lighting applications, flat panel field emission display (FED) applications, etc.
    Type: Grant
    Filed: January 9, 2008
    Date of Patent: March 8, 2011
    Assignee: General Electric Company
    Inventors: Heather Diane Hudspeth, Ji Ung Lee, Reed Roeder Corderman, Anping Zhang, Renee Bushey Rohling, Lauraine Denault, Joleyn Eileen Balch
  • Publication number: 20100212727
    Abstract: A method for continuously growing carbon nanotubes may include providing a melt comprising carbon and a catalyst at a temperature between about 1,200 degrees Celsius and about 2,500 degrees Celsius, selecting a carbon nanotube seed having at least one of a semiconductor electrical property and a metallic electrical property from a plurality of carbon nanotube seeds, contacting the selected carbon nanotube seed to a surface of the melt, and moving the selected carbon nanotube seed away from the surface of the melt at a rate operable to continuously grow a carbon nanotube, and continuously growing the carbon nanotube having the selected electrical property. Method for continuously growing a graphene sheet, and apparatus for continuously growing carbon nanotubes and graphene sheets are also disclosed.
    Type: Application
    Filed: February 22, 2010
    Publication date: August 26, 2010
    Inventor: Ji Ung LEE
  • Publication number: 20090321721
    Abstract: The present invention is directed toward field effect transistors (FETs) and thin film transistors (TFTs) comprising carbon nanotubes (CNTs) and to methods of making such devices using solution-based processing techniques, wherein the CNTs within such devices have been fractionated so as to be concentrated in semiconducting CNTs. Additionally, the relatively low-temperature solution-based processing achievable with the methods of the present invention permit the use of plastics in the fabricated devices.
    Type: Application
    Filed: April 25, 2007
    Publication date: December 31, 2009
    Applicant: General Electric Company
    Inventors: Patrick Roland Lucien Malenfant, Ji-Ung Lee, Yun Li, Walter Vladimir Cicha
  • Patent number: 7521275
    Abstract: A method and associated structure for forming a free-standing electrostatically-doped carbon nanotube device is described. The method includes providing a carbon nanotube on a substrate in such a way as to have a free-standing portion. One way of forming a free-standing portion of the carbon nanotube is to remove a portion of the substrate. Another described way of forming a free-standing portion of the carbon nanotube is to dispose a pair of metal electrodes on a first substrate portion, removing portions of the first substrate portion adjacent to the metal electrodes, and conformally disposing a second substrate portion on the first substrate portion to form a trench.
    Type: Grant
    Filed: April 3, 2007
    Date of Patent: April 21, 2009
    Assignee: General Electric Company
    Inventor: Ji Ung Lee
  • Publication number: 20080129178
    Abstract: The present invention relates to gated nanorod field emission devices, wherein such devices have relatively small emitter tip-to-gate distances, thereby providing a relatively high emitter tip density and low turn on voltage. Such methods employ a combination of traditional device processing techniques (lithography, etching, etc.) with electrochemical deposition of nanorods. These methods are relatively simple, cost-effective, and efficient; and they provide field emission devices that are suitable for use in x-ray imaging applications, lighting applications, flat panel field emission display (FED) applications, etc.
    Type: Application
    Filed: January 9, 2008
    Publication date: June 5, 2008
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Heather Diane Hudspeth, Ji Ung Lee, Reed Roeder Corderman, Anping Zhang, Renee Bushey Rohling, Lauraine Denault, Joleyn Eileen Balch
  • Publication number: 20080129177
    Abstract: The system and method provided herein for limiting the effects of arcing in field-type electron emitter arrays improves the robustness of such arrays. Field-type electron emitter arrays generally have a substrate, an insulator, and a gating electrode. By including a resistive substance in the gate of the emitter array, arcing events may be isolated to a single emitter such that the remaining emitters of an array can continue electron emission and/or the short circuit current of the arc can be limited.
    Type: Application
    Filed: December 5, 2006
    Publication date: June 5, 2008
    Inventors: Colin R. Wilson, Ji-Ung Lee
  • Publication number: 20080122439
    Abstract: An inductor includes an electrical conductor wound in a magnetic flux concentrating pattern, the electrical conductor comprises a plurality of carbon nanotubes that are substantially aligned with an axis along a center of the electrical conductor.
    Type: Application
    Filed: November 7, 2006
    Publication date: May 29, 2008
    Inventors: William E. Burdick, Ji-Ung Lee, Michael A. de Rooij
  • Patent number: 7378715
    Abstract: A method and associated structure for forming a free-standing electrostatically-doped carbon nanotube device is described. The method includes providing a carbon nanotube on a substrate in such a way as to have a free-standing portion. One way of forming a free-standing portion of the carbon nanotube is to remove a portion of the substrate. Another described way of forming a free-standing portion of the carbon nanotube is to dispose a pair of metal electrodes on a first substrate portion, removing portions of the first substrate portion adjacent to the metal electrodes, and conformally disposing a second substrate portion on the first substrate portion to form a trench.
    Type: Grant
    Filed: February 18, 2005
    Date of Patent: May 27, 2008
    Assignee: General Electric Company
    Inventor: Ji Ung Lee
  • Patent number: 7329552
    Abstract: The present invention includes field effect transistors, field emission apparatuses, thin film transistors, and methods of forming field effect transistors. According to one embodiment, a field effect transistor includes a semiconductive layer configured to form a channel region; a pair of spaced conductively doped semiconductive regions in electrical connection with the channel region of the semiconductive layer; a gate intermediate the semiconductive regions; and a gate dielectric layer intermediate the semiconductive layer and the gate, the gate dielectric layer being configured to align the gate with the channel region of the semiconductive layer. In one aspect, chemical-mechanical polishing self-aligns the gate with the channel region. According to another aspect, a field emission device includes a transistor configured to control the emission of electrons from an emitter.
    Type: Grant
    Filed: February 5, 2002
    Date of Patent: February 12, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Ji Ung Lee, John Lee, Benham Moradi
  • Patent number: 7326328
    Abstract: The present invention relates to gated nanorod field emission devices, wherein such devices have relatively small emitter tip-to-gate distances, thereby providing a relatively high emitter tip density and low turn on voltage. Such methods employ a combination of traditional device processing techniques (lithography, etching, etc.) with electrochemical deposition of nanorods. These methods are relatively simple, cost-effective, and efficient; and they provide field emission devices that are suitable for use in x-ray imaging applications, lighting applications, flat panel field emission display (FED) applications, etc.
    Type: Grant
    Filed: July 19, 2005
    Date of Patent: February 5, 2008
    Assignee: General Electric Company
    Inventors: Heather Diane Hudspeth, Ji Ung Lee, Reed Roeder Corderman, Anping Zhang, Renee Bushey Rohling, Lauraine Denault, Joleyn Eileen Balch
  • Patent number: 7239076
    Abstract: A self-aligned gated field emission device and an associated method of fabrication are described. The device includes a substrate and a porous layer disposed adjacent to the surface of the substrate, wherein the porous layer defines a plurality of substantially cylindrical channels, each of the plurality of substantially cylindrical channels aligned substantially parallel to one another and substantially perpendicular to the surface of the substrate. The device also includes a plurality of substantially rod-shaped structures disposed within at least a portion of the plurality of substantially cylindrical channels defined by the porous layer and adjacent to the surface of the substrate, wherein a portion of each of the plurality of substantially rod-shaped structures protrudes above the surface of the porous layer.
    Type: Grant
    Filed: September 25, 2003
    Date of Patent: July 3, 2007
    Assignee: General Electric Company
    Inventors: Ji Ung Lee, Reed Roeder Corderman, William Hullinger Huber
  • Patent number: 7226818
    Abstract: The present invention is directed toward field effect transistors (FETs) and thin film transistors (TFTs) comprising carbon nanotubes (CNTs) and to methods of making such devices using solution-based processing techniques, wherein the CNTs within such devices have been fractionated so as to be concentrated in semiconducting CNTs. Additionally, the relatively low-temperature solution-based processing achievable with the methods of the present invention permit the use of plastics in the fabricated devices.
    Type: Grant
    Filed: October 15, 2004
    Date of Patent: June 5, 2007
    Assignee: General Electric Company
    Inventors: Patrick Roland Lucien Malenfant, Ji-Ung Lee, Yun Li, Walter Vladimir Cicha
  • Patent number: 7145152
    Abstract: Storage capacitor design for a solid state imager. The imager includes several pixels disposed on a substrate in an imaging array pattern. Each pixel includes a photosensor coupled to a thin film switching transistor. Several scan lines are disposed at a first level with respect to the substrate along a first axis and several data lines are disposed at a second level along a second axis of the imaging array. Several data lines disposed at a second level with respect to the substrate along a second axis of the imaging array pattern. Each pixel comprises a storage capacitor coupled parallel to the photosensor, the storage capacitor comprising a storage capacitor electrode and a capacitor common electrode.
    Type: Grant
    Filed: October 14, 2003
    Date of Patent: December 5, 2006
    Assignee: General Electric Company
    Inventors: Ji-Ung Lee, Douglas Albagli, George Edward Possin, William Andrew Hennessy, Ching-Yeu Wei
  • Patent number: RE41673
    Abstract: Organic light emitting devices are disclosed that use a micro electromechanical system (MEMS) structure to enable a pixel and pixel array wherein each pixel contains a MEMS and an OLED element. A MEMS structure is used for switching the OLED element. These OLED/MEMS pixels can be fabricated on flex circuit, silicon, as well as other inorganic materials. They can be fabricated in a large array for developing a 2-dimensional display application and each pixel can be addressed through conventional matrix scanning addressing scheme. The ability of fabricating these OLED/MEMS pixels on flexible organic substrates as well as other rigid substrates enables wider selection of substrate materials for use with different applications.
    Type: Grant
    Filed: January 13, 2006
    Date of Patent: September 14, 2010
    Assignee: General Electric Company
    Inventors: Kelvin Ma, Ji-Ung Lee, Anil Raj Duggal