Patents by Inventor Joerg Appenzeller

Joerg Appenzeller has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070048908
    Abstract: A method of fabricating a nanotube field-effect transistor having unipolar characteristics and a small inverse sub-threshold slope includes forming a local gate electrode beneath the nanotube between drain and source electrodes of the transistor and doping portions of the nanotube. In a further embodiment, the method includes forming at least one trench in the gate dielectric (e.g., a back gate dielectric) and back gate adjacent to the local gate electrode. Another aspect of the invention is a nanotube field-effect transistor fabricated using such a method.
    Type: Application
    Filed: October 26, 2006
    Publication date: March 1, 2007
    Inventors: Joerg Appenzeller, Phaedon Avouris, Yu-Ming Lin
  • Patent number: 7183568
    Abstract: A structure (and method) for a piezoelectric device, including a layer of piezoelectric material. A nanotube structure is mounted such that a change of shape of the piezoelectric material causes a change in a stress in the nanotube structure.
    Type: Grant
    Filed: December 23, 2002
    Date of Patent: February 27, 2007
    Assignee: International Business Machines Corporation
    Inventors: Joerg Appenzeller, Phaedon Avouris, Richard Martel, James Anthony Misewich, Alejandro Gabriel Schrott
  • Patent number: 7180107
    Abstract: A method of fabricating a tunneling nanotube field effect transistor includes forming in a nanotube an n-doped region and a p-doped region which are separated by an undoped channel region of the transistor. Electrical contacts are provided for the doped regions and a gate electrode that is formed upon a gate dielectric layer deposited on at least a portion of the channel region of the transistor.
    Type: Grant
    Filed: May 25, 2004
    Date of Patent: February 20, 2007
    Assignee: International Business Machines Corporation
    Inventors: Joerg Appenzeller, Joachim Knoch
  • Patent number: 7141727
    Abstract: A method of fabricating a nanotube field-effect transistor having unipolar characteristics and a small inverse sub-threshold slope includes forming a local gate electrode beneath the nanotube between drain and source electrodes of the transistor and doping portions of the nanotube. In a further embodiment, the method includes forming at least one trench in the gate dielectric (e.g., a back gate dielectric) and back gate adjacent to the local gate electrode. Another aspect of the invention is a nanotube field-effect transistor fabricated using such a method.
    Type: Grant
    Filed: May 16, 2005
    Date of Patent: November 28, 2006
    Assignee: International Business Machines Corporation
    Inventors: Joerg Appenzeller, Phaedon Avouris, Yu-Ming Lin
  • Publication number: 20060255414
    Abstract: A method of fabricating a nanotube field-effect transistor having unipolar characteristics and a small inverse sub-threshold slope includes forming a local gate electrode beneath the nanotube between drain and source electrodes of the transistor and doping portions of the nanotube. In a further embodiment, the method includes forming at least one trench in the gate dielectric (e.g., a back gate dielectric) and back gate adjacent to the local gate electrode. Another aspect of the invention is a nanotube field-effect transistor fabricated using such a method.
    Type: Application
    Filed: May 16, 2005
    Publication date: November 16, 2006
    Inventors: Joerg Appenzeller, Phaedon Avouris, Yu-Ming Lin
  • Publication number: 20050274992
    Abstract: A method of fabricating a tunneling nanotube field effect transistor includes forming in a nanotube an n-doped region and a p-doped region which are separated by an undoped channel region of the transistor. Electrical contacts are provided for the doped regions and a gate electrode that is formed upon a gate dielectric layer deposited on at least a portion of the channel region of the transistor.
    Type: Application
    Filed: May 25, 2004
    Publication date: December 15, 2005
    Inventors: Joerg Appenzeller, Joachim Knoch
  • Patent number: 6891227
    Abstract: A self-aligned carbon-nanotube field effect transistor semiconductor device comprises a carbon-nanotube deposited on a substrate, a source and a drain formed at a first end and a second end of the carbon-nanotube, respectively, and a gate formed substantially over a portion of the carbon-nanotube, separated from the carbon-nanotube by a dielectric film.
    Type: Grant
    Filed: March 20, 2002
    Date of Patent: May 10, 2005
    Assignee: International Business Machines Corporation
    Inventors: Joerg Appenzeller, Phaedon Avouris, Kevin K. Chan, Richard Martel, Hon-Sum Philip Wong, Philip G. Collins
  • Publication number: 20050056826
    Abstract: A self-aligned carbon-nanotube field effect transistor semiconductor device comprises a carbon-nanotube deposited on a substrate, a source and a drain formed at a first end and a second end of the carbon-nanotube, respectively, and a gate formed substantially over a portion of the carbon-nanotube, separated from the carbon-nanotube by a dielectric film.
    Type: Application
    Filed: October 1, 2004
    Publication date: March 17, 2005
    Inventors: Joerg Appenzeller, Phaedon Avouris, Kevin Chan, Philip Collins, Richard Martel, Hon-Sum Wong
  • Publication number: 20040120183
    Abstract: A structure (and method) for a piezoelectric device, including a layer of piezoelectric material. A nanotube structure is mounted such that a change of shape of the piezoelectric material causes a change in a stress in the nanotube structure.
    Type: Application
    Filed: December 23, 2002
    Publication date: June 24, 2004
    Applicant: International Business Machines Corporation
    Inventors: Joerg Appenzeller, Phaedon Avouris, Richard Martel, James Anthony Misewich, Alejandro Gabriel Schrott
  • Publication number: 20030178617
    Abstract: A self-aligned carbon-nanotube field effect transistor semiconductor device comprises a carbon-nanotube deposited on a substrate, a source and a drain formed at a first end and a second end of the carbon-nanotube, respectively, and a gate formed substantially over a portion of the carbon-nanotube, separated from the carbon-nanotube by a dielectric film.
    Type: Application
    Filed: March 20, 2002
    Publication date: September 25, 2003
    Applicant: International Business Machines Corporation
    Inventors: Joerg Appenzeller, Phaedon Avouris, Kevin K. Chan, Richard Martel, Hon-Sum Philip Wong, Philip G. Collins