Patents by Inventor Joerg Rockenberger

Joerg Rockenberger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7491782
    Abstract: Polysilanes, inks containing the same, and methods for their preparation are disclosed. The polysilane generally has the formula H—[(AHR)n(c-AmHpm?2)q]—H, where each instance of A is independently Si or Ge; R is H, —AaHa+1Ra, halogen, aryl or substituted aryl; (n+a)?10 if q=0, q?3 if n=0, and (n+q)?6 if both n and q?0; p is 1 or 2; and m is from 3 to 12. In one aspect, the method generally includes the steps of combining a silane compound of the formula AHaR14?a, the formula AkHgR1?h and/or the formula c-AmHpmR1rm with a catalyst of the formula R4xR5yMXz (or an immobilized derivative thereof) to form a poly(aryl)silane; then washing the poly(aryl)silane with an aqueous washing composition and contacting the poly(aryl)silane with an adsorbent to remove the metal M. In another aspect, the method includes the steps of halogenating a polyarylsilane to form a halopolysilane; and reducing the halopolysilane with a metal hydride to form the polysilane.
    Type: Grant
    Filed: August 13, 2007
    Date of Patent: February 17, 2009
    Assignee: Kovio, Inc.
    Inventors: Wenzhuo Guo, Vladimir K. Dioumaev, Joerg Rockenberger, Brent Ridley
  • Patent number: 7485691
    Abstract: Polysilanes, inks containing the same, and methods for their preparation are disclosed. The polysilane generally has the formula H—[(AHR)n(c-AmHpm?2)q]—H, where each instance of A is independently Si or Ge; R is H, —AaHa+1Ra, halogen, aryl or substituted aryl; (n+a)?10 if q=0, q?3 if n=0, and (n+q)?6 if both n and q?0; p is 1 or 2; and m is from 3 to 12. In one aspect, the method generally includes the steps of combining a silane compound of the formula AHaR14?a, the formula AkHgR1?h and/or the formula c-AmHpmR1rm with a catalyst of the formula R4xR5yMXz (or an immobilized derivative thereof) to form a poly(aryl)silane; then washing the poly(aryl)silane with an aqueous washing composition and contacting the poly(aryl)silane with an adsorbent to remove the metal M. In another aspect, the method includes the steps of halogenating a polyarylsilane to form a halopolysilane; and reducing the halopolysilane with a metal hydride to form the polysilane.
    Type: Grant
    Filed: October 6, 2005
    Date of Patent: February 3, 2009
    Assignee: Kovio, Inc
    Inventors: Wenzhuo Guo, Vladimir K. Dioumaev, Joerg Rockenberger, Brent Ridley
  • Publication number: 20090020829
    Abstract: Methods of forming contacts (and optionally, local interconnects) using an ink comprising a silicide-forming metal, electrical devices such as diodes and/or transistors including such contacts and (optional) local interconnects, and methods for forming such devices are disclosed. The method of forming contacts includes depositing an ink of a silicide-forming metal onto an exposed silicon surface, drying the ink to form a silicide-forming metal precursor, and heating the silicide-forming metal precursor and the silicon surface to form a metal silicide contact. Optionally, the metal precursor ink may be selectively deposited onto a dielectric layer adjacent to the exposed silicon surface to form a metal-containing interconnect. Furthermore, one or more bulk conductive metal(s) may be deposited on remaining metal precursor ink and/or the dielectric layer. Electrical devices, such as diodes and transistors may be made using such printed contact and/or local interconnects.
    Type: Application
    Filed: July 17, 2008
    Publication date: January 22, 2009
    Inventors: Aditi CHANDRA, Arvind KAMATH, James Montague CLEEVES, Joerg ROCKENBERGER, Mao Takashima, Erik SCHER
  • Publication number: 20090004370
    Abstract: Printable metal formulations, methods of making the formulations, and methods of coating or printing thin films from metal ink precursors are disclosed. The metal formulation generally includes one or more Group 4, 5, 6, 7, 8, 9, 10, 11, or 12 metal salts or metal complexes, one or more solvents adapted to facilitate coating and/or printing of the formulation, and one or more optional additives that form (only) gaseous or volatile byproducts upon reduction of the metal salt or metal complex to an elemental metal and/or alloy thereof. The formulation may be made by combining the metal salt(s) or metal complex(es) and the solvent(s), and dissolving the metal salt(s) or metal complex(es) in the solvent(s) to form the formulation. Thin films may be made by coating or printing the metal formulation on a substrate; removing the solvents to form a metal-containing precursor film; and reducing the metal-containing precursor film.
    Type: Application
    Filed: May 30, 2008
    Publication date: January 1, 2009
    Inventors: Fabio ZURCHER, Aditi Chandra, Wenzhuo Guo, Erik Scher, Mao Takashima, Joerg Rockenberger
  • Patent number: 7422708
    Abstract: Compositions, inks and methods for forming a patterned silicon-containing film and patterned structures including such a film. The composition generally includes (a) passivated semiconductor nanoparticles and (b) first and second cyclic Group IVA compounds in which the cyclic species predominantly contains Si and/or Ge atoms. The ink generally includes the composition and a solvent in which the composition is soluble. The method generally includes the steps of (1) printing the composition or ink on a substrate to form a pattern, and (2) curing the patterned composition or ink. In an alternative embodiment, the method includes the steps of (i) curing either a semiconductor nanoparticle composition or at least one cyclic Group IVA compound to form a thin film, (ii) coating the thin film with the other, and (iii) curing the coated thin film to form a semiconducting thin film.
    Type: Grant
    Filed: March 10, 2006
    Date of Patent: September 9, 2008
    Assignee: Kovio, Inc.
    Inventors: Klaus Kunze, Scott Haubrich, Fabio Zurcher, Brent Ridley, Joerg Rockenberger
  • Patent number: 7387260
    Abstract: A RF MOS- or nonlinear device-based surveillance and/or identification tag, and methods for its manufacture and use. The tag generally includes (a) an inductor, (b) a first capacitor plate coupled to the inductor, (c) a dielectric film on the first capacitor plate, (d) a semiconductor component on the dielectric film, and (e) a conductor that provides electrical communication between the semiconductor component and the inductor. The method of manufacture generally includes (1) depositing a semiconductor material (or precursor) on a dielectric film; (2) forming a semiconductor component from the semiconductor material/precursor; (3) forming a conductive structure at least partly on the semiconductor component; and (4) etching the electrically functional substrate to form (i) an inductor and/or (ii) a second capacitor plate.
    Type: Grant
    Filed: November 6, 2006
    Date of Patent: June 17, 2008
    Assignee: Kovio, Inc.
    Inventors: J. Devin MacKenzie, James Montague Cleeves, Vik Pavate, Christopher Gudeman, Fabio Zurcher, Max Davis, Dan Good, Joerg Rockenberger
  • Publication number: 20080085373
    Abstract: Compositions and methods for controlled polymerization and/or oligomerization of hydrosilanes compounds including those of the general formulae SinH2n and SinH2n+2 as well as alkyl- and arylsilanes, to produce soluble silicon polymers as a precursor to silicon films having low carbon content.
    Type: Application
    Filed: October 4, 2007
    Publication date: April 10, 2008
    Inventors: Dmitry KARSHTEDT, Joerg Rockenberger, Fabio Zurcher, Brent Ridley, Erik Scher
  • Publication number: 20080042212
    Abstract: An electronic device, including a substrate, a plurality of first semiconductor islands on the substrate, a plurality of second semiconductor islands on the substrate, a first dielectric film on the first subset of the semiconductor islands, second dielectric film on the second semiconductor islands, and a metal layer in electrical contact with the first and second semiconductor islands. The first semiconductor islands and the first dielectric film contain a first diffusible dopant, and the second semiconductor islands and the second dielectric layer film contain a second diffusible dopant different from the first diffusible dopant. The present electronic device can be manufactured using printing technologies, thereby enabling high-throughput, low-cost manufacturing of electrical circuits on a wide variety of substrates.
    Type: Application
    Filed: August 3, 2007
    Publication date: February 21, 2008
    Inventors: Arvind Kamath, James Montague Cleeves, Joerg Rockenberger, Patrick Smith, Fabio Zurcher
  • Publication number: 20080044964
    Abstract: A method for making an electronic device, such as a MOS transistor, including the steps of forming a plurality of semiconductor islands on an electrically functional substrate, printing a first dielectric layer on or over a first subset of the semiconductor islands and optionally a second dielectric layer on or over a second subset of the semiconductor islands, and annealing. The first dielectric layer contains a first dopant, and the (optional) second dielectric layer contains a second dopant different from the first dopant. The dielectric layer(s), semiconductor islands and substrate are annealed sufficiently to diffuse the first dopant into the first subset of semiconductor islands and, when present, the second dopant into the second subset of semiconductor islands.
    Type: Application
    Filed: August 3, 2007
    Publication date: February 21, 2008
    Inventors: Arvind Kamath, James Cleeves, Joerg Rockenberger, Patrick Smith, Fabio Zurcher
  • Publication number: 20080022897
    Abstract: Methods for forming doped silane and/or semiconductor thin films, doped liquid phase silane compositions useful in such methods, and doped semiconductor thin films and structures. The composition is generally liquid at ambient temperatures and includes a Group IVA atom source and a dopant source. By irradiating a doped liquid silane during at least part of its deposition, a thin, substantially uniform doped oligomerized/polymerized silane film may be formed on a substrate. Such irradiation is believed to convert the doped silane film into a relatively high-molecular weight species with relatively high viscosity and relatively low volatility, typically by cross-linking, isomerization, oligomerization and/or polymerization. A film formed by the irradiation of doped liquid silanes can later be converted (generally by heating and annealing/recrystallization) into a doped, hydrogenated, amorphous silicon film or a doped, at least partially polycrystalline silicon film suitable for electronic devices.
    Type: Application
    Filed: October 8, 2007
    Publication date: January 31, 2008
    Inventors: Fabio Zurcher, Wenzhuo Guo, Joerg Rockenberger, Vladimir Dioumaev, Brent Ridley, Klaus Kunze, James Cleeves
  • Patent number: 7315068
    Abstract: The present invention is directed to methods for making electronic devices with a thin anisotropic conducting layer interface layer formed between a substrate and an active device layer that is preferably patterned conductive layer. The interface layer preferably provides Ohmic and/or rectifying contact between the active device layer and the substrate and preferably provides good adhesion of the active device layer to the substrate. The active device layer is preferably fashioned from a nanoparticle ink solution that is patterned using embossing methods or other suitable printing and/or imaging methods. The active device layer is preferably patterned into an array of gate structures suitable for the fabrication of thin film transistors and the like.
    Type: Grant
    Filed: March 9, 2005
    Date of Patent: January 1, 2008
    Assignee: Kovio Inc.
    Inventors: Scott Haubrich, Klaus Kunze, James C. Dunphy, Chris Gudeman, Joerg Rockenberger, Fabio Zurcher, Nassrin Sleiman, Mao Takashima, Chris Spindt
  • Patent number: 7314513
    Abstract: Methods for forming doped silane and/or semiconductor thin films, doped liquid phase silane compositions useful in such methods, and doped semiconductor thin films and structures. The composition is generally liquid at ambient temperatures and includes a Group IVA atom source and a dopant source. By irradiating a doped liquid silane during at least part of its deposition, a thin, substantially uniform doped oligomerized/polymerized silane film may be formed on a substrate. Such irradiation is believed to convert the doped silane film into a relatively high-molecular weight species with relatively high viscosity and relatively low volatility, typically by cross-linking, isomerization, oligomerization and/or polymerization. A film formed by the irradiation of doped liquid silanes can later be converted (generally by heating and annealing/recrystallization) into a doped, hydrogenated, amorphous silicon film or a doped, at least partially polycrystalline silicon film suitable for electronic devices.
    Type: Grant
    Filed: September 24, 2004
    Date of Patent: January 1, 2008
    Assignee: Kovio, Inc.
    Inventors: Fabio Zürcher, Wenzhuo Guo, Joerg Rockenberger, Vladimir K. Dioumaev, Brent Ridley, Klaus Kunze, James Montague Cleeves
  • Publication number: 20070287237
    Abstract: A self-aligned top-gate thin film transistor (TFT) and a method of forming such a thin film transistor, by forming a semiconductor thin film layer; printing a doped glass pattern thereon, a gap in the doped glass pattern defining a channel region of the TFT; forming a gate electrode on or over the channel region, the gate electrode comprising a gate dielectric film and a gate conductor thereon; and diffusing a dopant from the doped glass pattern into the semiconductor thin film layer.
    Type: Application
    Filed: June 12, 2007
    Publication date: December 13, 2007
    Inventors: Joerg Rockenberger, James Cleeves, Arvind Kamath
  • Patent number: 7294449
    Abstract: Materials, compounds and compositions for radiation patternable functional thin films, methods of synthesizing such materials and compounds, and methods for forming an electronically functional thin film and structures including such a film. The compounds and compositions generally include (a) nanoparticles of an electronically functional material or substance and (b) ligands containing a (photo)reactive group. The method generally includes the steps of (1) irradiating the compound and/or composition, and (2) curing the irradiated compound and/or composition, generally to form an electronically functional film. The functional thin film includes a sintered mixture of nanoparticles. The thin film exhibits improved morphology and/or resolution relative to an otherwise identical structure made by an identical process, but without the (photo)functional group on the ligand, and/or relative to an otherwise identical material patterned by a conventional graphics art-based printing process.
    Type: Grant
    Filed: December 31, 2003
    Date of Patent: November 13, 2007
    Assignee: Kovio, Inc.
    Inventors: Christopher Gudeman, Joerg Rockenberger, Brian Hubert, Criswell Choi, Alfred Renaldo
  • Patent number: 7259100
    Abstract: A method for making nanoparticles, nanoparticle inks and device layers therefrom is disclosed. In accordance with the present invention, nanoparticles are isolated from a composite material that is formed by treating a metal oxide precursor to form the metal nanoparticles and a metal oxide matrix. The nanoparticles are then isolated from the composite material by etching at least a portion of the metal oxide matrix to release the metal nanoparticles. In accordance with the embodiments of the invention, the nanoparticles are treated with surfactants and wetting agents either while etching or after etching, are isolated from the etchant and dispersed in a solvent medium and/or are otherwise treated or modified for use in a nanoparticle inks. A layer of the metal nanoparticle ink can then be used to form doped, undoped, patterned and unpatterned device layers or structures in micro-devices.
    Type: Grant
    Filed: November 10, 2005
    Date of Patent: August 21, 2007
    Assignee: Kovio, Inc.
    Inventors: Fabio Zurcher, Brent Ridley, Klaus Kunze, Scott Haubrich, Joerg Rockenberger
  • Patent number: 7259101
    Abstract: A method for making nanoparticles, nanoparticle inks and device layers therefrom is disclosed. In accordance with the present invention, nanoparticles are isolated from a composite material that is formed by treating a metal oxide precursor to form the metal nanoparticles and a metal oxide matrix. The nanoparticles are then isolated from the composite material by etching at least a portion of the metal oxide matrix to release the metal nanoparticles. In accordance with the embodiments of the invention, the nanoparticles are treated with surfactants and wetting agents either while etching or after etching, are isolated from the etchant and dispersed in a solvent medium and/or are otherwise treated or modified for use in a nanoparticle inks. A layer of the metal nanoparticle ink can then be used to form doped, undoped, patterned and unpatterned device layers or structures in micro-devices.
    Type: Grant
    Filed: November 10, 2005
    Date of Patent: August 21, 2007
    Assignee: Kovio, Inc.
    Inventors: Fabio Zurcher, Brent Ridley, Klaus Kunze, Scott Haubrich, Joerg Rockenberger
  • Publication number: 20070167019
    Abstract: A method for making nanoparticles, nanoparticle inks and device layers therefrom is disclosed. In accordance with the present invention, nanoparticles are isolated from a composite material that is formed by treating a metal oxide precursor to form the metal nanoparticles and a metal oxide matrix. The nanoparticles are then isolated from the composite material by etching at least a portion of the metal oxide matrix to release the metal nanoparticles. In accordance with the embodiments of the invention, the nanoparticles are treated with surfactants and wetting agents either while etching or after etching, are isolated from the etchant and dispersed in a solvent medium and/or are otherwise treated or modified for use in a nanoparticle inks. A layer of the metal nanoparticle ink can then be used to form doped, undoped, patterned and unpatterned device layers or structures in micro-devices.
    Type: Application
    Filed: November 10, 2005
    Publication date: July 19, 2007
    Inventors: Fabio Zurcher, Brent Ridley, Klaus Kunze, Scott Haubrich, Joerg Rockenberger
  • Patent number: 7152804
    Abstract: A RF MOS- or nonlinear device-based surveillance and/or identification tag, and methods for its manufacture and use. The tag generally includes (a) an inductor, (b) a first capacitor plate coupled to the inductor, (c) a dielectric film on the first capacitor plate, (d) a semiconductor component on the dielectric film, and (e) a conductor that provides electrical communication between the semiconductor component and the inductor. The method of manufacture generally includes (1) depositing a semiconductor material (or precursor) on a dielectric film; (2) forming a semiconductor component from the semiconductor material/precursor; (3) forming a conductive structure at least partly on the semiconductor component; and (4) etching the electrically functional substrate to form (i) an inductor and/or (ii) a second capacitor plate.
    Type: Grant
    Filed: July 6, 2004
    Date of Patent: December 26, 2006
    Assignee: Kovlo, Inc.
    Inventors: J. Devin MacKenzie, James Montague Cleeves, Vik Pavate, Christopher Gudeman, Fabio Zurcher, Max Davis, Dan Good, Joerg Rockenberger
  • Publication number: 20060211187
    Abstract: A MOS transistor with a laser-patterned metal gate, and methods for its manufacture. The method generally includes forming a layer of metal-containing material on a dielectric film, wherein the dielectric film is on an electrically functional substrate comprising an inorganic semiconductor; laser patterning a metal gate from the metal-containing material layer; and forming source and drain terminals in the inorganic semiconductor in locations adjacent to the metal gate. The transistor generally includes an electrically functional substrate; a dielectric film on at least portions of the electrically functional substrate; a laser patterned metal gate on the dielectric film; and source and drain terminals comprising a doped inorganic semiconductor layer adjacent to the metal gate. The present invention advantageously provides MOS thin film transistors having reliable electrical characteristics quickly, efficiently, and/or at a low cost by eliminating one or more conventional photolithographic steps.
    Type: Application
    Filed: August 11, 2005
    Publication date: September 21, 2006
    Inventors: Criswell Choi, Joerg Rockenberger, J. MacKenzie, Christopher Gudeman
  • Publication number: 20060157677
    Abstract: Compositions, inks and methods for forming a patterned silicon-containing film and patterned structures including such a film. The composition generally includes (a) passivated semiconductor nanoparticles and (b) first and second cyclic Group IVA compounds in which the cyclic species predominantly contains Si and/or Ge atoms. The ink generally includes the composition and a solvent in which the composition is soluble. The method generally includes the steps of (1) printing the composition or ink on a substrate to form a pattern, and (2) curing the patterned composition or ink. In an alternative embodiment, the method includes the steps of (i) curing either a semiconductor nanoparticle composition or at least one cyclic Group IVA compound to form a thin film, (ii) coating the thin film with the other, and (iii) curing the coated thin film to form a semiconducting thin film.
    Type: Application
    Filed: March 10, 2006
    Publication date: July 20, 2006
    Inventors: Klaus Kunze, Scott Haubrich, Fabio Zurcher, Brent Ridley, Joerg Rockenberger