Abstract: The semiconductor device comprises a substrate (1) of semiconductor material, a dielectric layer (2) above the substrate, a waveguide (3) arranged in the dielectric layer, and a mirror region (4) arranged on a surface of a mirror support (5) integrated on the substrate. A mirror is thus formed facing the waveguide. The surface of the mirror support and hence the mirror are inclined with respect to the waveguide.

Abstract: The semiconductor device for detection of radiation comprises a semiconductor substrate (1) with a main surface (11), a dielectric layer (6) comprising at least one compound of a semiconductor material, an integrated circuit (2) including at least one component sensitive to radiation (3), a wiring (4) of the integrated circuit embedded in an intermetal layer (8) of the dielectric layer (6), an electrically conductive through-substrate via (5) contacting the wiring, and an optical filter element (7) arranged immediately on the dielectric layer above the component sensitive to radiation. The dielectric layer comprises a passivation layer (9) at least above the through-substrate via, the passivation layer comprises a dielectric material that is different from the intermetal layer (8), and the wiring is arranged between the main surface and the passivation layer.

Abstract: A relief structure is formed on a surface of a carrier provided for accommodating a wafer, which is fastened to the carrier by a removable adhesive contacting the carrier. The relief structure, which may be spatially confined to the centre of the carrier, reduces the strength of adhesion between the wafer and the carrier. If the adhesive is appropriately selected and maintains the connection between the wafer and the carrier at elevated temperatures, further process steps can be performed at temperatures of typically 300° C. or more. The subsequent mechanical separation of the adhesive joint is facilitated by the relief structure on the carrier.

Abstract: A device wafer having a main surface including an edge region and a carrier having a further main surface including an annular surface region corresponding to the edge region of the device wafer are provided. An adhesive is applied in the edge region and/or in the annular surface region, but not on the remaining areas of the main surfaces. The device wafer is fastened to the carrier by the adhesive. The main surface and the further main surface are brought into contact with one another when the device wafer is fastened to the carrier, while the main surface and the further main surface are fastened to one another only in the edge region. The device wafer is removed from the carrier after further process steps, which may include the formation of through-wafer vias in the device wafer.

Abstract: A semiconductor substrate (1) is provided with a structure (3) on an upper side (2), and an additional substrate (4) provided for handling the semiconductor substrate is likewise structured on an upper side (5). The structuring of the additional substrate takes place in at least partial correspondence with the structure of the semiconductor substrate. The structured upper sides of the semiconductor substrate and the additional substrate are positioned such that they face one another and are permanently connected to one another. Subsequently, the semiconductor substrate is thinned from the rear side (6), and the additional substrate is removed at least to such a degree that the structure of the semiconductor substrate is exposed to the extent required for the further use.

Abstract: The method of wafer-scale integration of semiconductor devices comprises the steps of providing a semiconductor wafer (1), a further semiconductor wafer (2), which differs from the first semiconductor wafer in at least one of diameter, thickness and semiconductor material, and a handling wafer (3), arranging the further semiconductor wafer on the handling wafer, and bonding the further semiconductor wafer to the semiconductor wafer. The semiconductor device may comprise an electrically conductive contact layer (6) arranged on the further semiconductor wafer (2) and a metal layer connecting the contact layer with an integrated circuit.

Abstract: A semiconductor substrate (1) is provided with a structure (3) on an upper side (2), and an additional substrate (4) provided for handling the semiconductor substrate is likewise structured on an upper side (5). The structuring of the additional substrate takes place in at least partial correspondence with the structure of the semiconductor substrate. The structured upper sides of the semiconductor substrate and the additional substrate are positioned such that they face one another and are permanently connected to one another. Subsequently, the semiconductor substrate is thinned from the rear side (6), and the additional substrate is removed at least to such a degree that the structure of the semiconductor substrate is exposed to the extent required for the further use.

Abstract: Through the intermetal dielectric (2) and the semiconductor material of the substrate (1) a contact hole is formed, and a contact area of a connection metal plane (3) that faces the substrate is exposed in the contact hole. A metallization (11) is applied, which forms a connection contact (12) on the contact area, a through-contact (13) in the contact hole and a connection contact (20) on a contact area facing away from the substrate and/or on a vertical conductive connection (15) of the upper metal plane (24).

Abstract: Through the intermetal dielectric (2) and the semiconductor material of the substrate (1) a contact hole is formed, and a contact area of a connection metal plane (3) that faces the substrate is exposed in the contact hole. A metallization (11) is applied, which forms a connection contact (12) on the contact area, a through-contact (13) in the contact hole and a connection contact (20) on a contact area facing away from the substrate and/or on a vertical conductive connection (15) of the upper metal plane (24).