Patents by Inventor John Bultitude

John Bultitude has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9779874
    Abstract: An method of forming a metal foil coated ceramic and a metal foil capacitor is provided in a method of making a metal foil coated ceramic comprising providing a metal foil; applying a ceramic precursor to the metal foil wherein the ceramic precursor comprises at least one susceptor and a high dielectric constant oxide and an organic binder, and sintering the ceramic precursor with a high intensity, high pulse frequency light energy to form the metal foil ceramic.
    Type: Grant
    Filed: July 5, 2012
    Date of Patent: October 3, 2017
    Assignee: KEMET Electronics Corporation
    Inventors: John E. McConnell, John Bultitude, Abhijit Gurav
  • Patent number: 9748043
    Abstract: A solid electrolytic capacitor is described which comprises an anode, a dielectric on the anode and a cathode on the dielectric. A conductive coating is on the cathode wherein the conductive layer comprises an exterior surface of a first high melting point metal. An adjacent layer is provided comprising a second high melting point metal, wherein the first high melting point metal and the second high melting point metal are metallurgically bonded with a low melting point metal.
    Type: Grant
    Filed: August 6, 2013
    Date of Patent: August 29, 2017
    Assignee: KEMET Electronics Corporation
    Inventors: Antony P. Chacko, John E. McConnell, Robert Ramsbottom, Philip M. Lessner, Randolph S. Hahn, John Bultitude
  • Publication number: 20170169955
    Abstract: An improved module is provided. The module comprises a multiplicity of electronic components wherein each electronic component comprises a first external termination with at least one first longitudinal edge and a second external termination with at least one second longitudinal edge. A first lead is connected to the first longitudinal edge by a first interconnect and a second lead is connected to the second longitudinal edge by a second interconnect.
    Type: Application
    Filed: December 9, 2015
    Publication date: June 15, 2017
    Inventors: Galen W. Miller, John E. McConnell, John Bultitude, Garry L. Renner
  • Publication number: 20170169956
    Abstract: Provided is a module comprising a carrier material, comprising a first conductive portion and a second conductive portion, and a multiplicity of electronic components wherein each electronic component comprises a first external termination with at least one first longitudinal edge and a second external termination with at least one second longitudinal edge. A first longitudinal edge of a first electronic component is connected to the first conductive portion by a first interconnect; and a second longitudinal edge of the first electronic component is connected to the second conductive portion by a second interconnect.
    Type: Application
    Filed: September 13, 2016
    Publication date: June 15, 2017
    Inventors: Galen W. Miller, John E. McConnell, John Bultitude, Garry L. Renner
  • Publication number: 20170025223
    Abstract: An electronic device is described wherein the electronic device comprises a substrate with a first conductive metal layer and a second conductive metal layer. A first microphonic noise reduction structure is in electrical contact with the first conductive metal layer wherein the first microphonic noise reduction layer comprises at least one of the group consisting of a compliant non-metallic layer and a shock absorbing conductor comprising offset mounting tabs with a space there between coupled with at least one stress relieving portion. An electronic component comprising a first external termination of a first polarity and a second external termination of a second polarity is integral to the electronic device and the first microphonic noise reduction structure and the first external termination are adhesively bonded by a transient liquid phase sintering adhesive.
    Type: Application
    Filed: October 4, 2016
    Publication date: January 26, 2017
    Inventors: John Bultitude, John E. McConnell, Galen W. Miller
  • Patent number: 9490072
    Abstract: A method for making multilayer ceramic capacitors is described with high voltage capability without the need of coating the part to resist surface arc-over. One design combines a high overlap area for higher capacitance whilst retaining a high voltage capability. A variation of this design has increased voltage capability over this design as well as another described in the prior art although overlap area and subsequently capacitance is lowered in this case.
    Type: Grant
    Filed: April 30, 2014
    Date of Patent: November 8, 2016
    Assignee: KEMET Electronics Corporation
    Inventors: John Bultitude, James R. Magee, Lonnie G. Jones
  • Patent number: 9472342
    Abstract: A stacked MLCC capacitor is provided wherein the capacitor stack comprises multilayered ceramic capacitors wherein each multilayered ceramic capacitor comprises first electrodes and second electrodes in an alternating stack with a dielectric between each first electrode and each adjacent second electrode. The first electrodes terminate at a first side and the second electrodes second side. A first transient liquid phase sintering conductive layer is the first side and in electrical contact with each first electrode; and a second transient liquid phase sintering conductive layer is on the second side and in electrical contact with each second electrode.
    Type: Grant
    Filed: August 6, 2013
    Date of Patent: October 18, 2016
    Inventors: John E. McConnell, Garry L. Renner, John Bultitude, Allen Hill
  • Publication number: 20160254097
    Abstract: An improved method for forming a capacitor is provided as is a capacitor, or electrical component, formed by the method. The method includes providing an aluminum containing anode with an aluminum oxide dielectric thereon; forming a cathode on a first portion of the aluminum oxide dielectric; bonding an anode lead to the aluminum anode on a second portion of the aluminum oxide by a transient liquid phase sintered conductive material thereby metallurgical bonding the aluminum anode to the anode lead; and bonding a cathode lead to said cathode.
    Type: Application
    Filed: May 9, 2016
    Publication date: September 1, 2016
    Inventors: John E. McConnell, Garry L. Renner, John Bultitude
  • Patent number: 9357634
    Abstract: An improved discrete electronic device and method of making the improved discrete electronic device is described. The discrete electronic device has an electronic passive component with a termination and a lead frame. A compensating compliant component is between the termination and the lead frame. The compensating compliant component has a composite core and a first conductor on the composite core. The first conductor is in electrical contact with the termination. A second conductor is also on the composite core wherein the second conductor is in electrical contact with the lead frame.
    Type: Grant
    Filed: April 25, 2013
    Date of Patent: May 31, 2016
    Assignee: Kemet Electronics Corporation
    Inventors: John E. McConnell, Alan P. Webster, John Bultitude, Abhijit Gurav
  • Patent number: 9287844
    Abstract: An improved electronic filter is provided with capacitance and integral inductance properties. The filter has a capacitor with first planer internal electrodes in electrical contact with a first termination and second planer internal electrodes in electrical contact with a second termination. A dielectric is between the first planer internal electrodes and the second planer internal electrodes. A third termination is provided and a conductive trace on a surface of the capacitor is between the third termination and the first termination. A ferromagnetic or ferrimagnetic material is coupled to the conductive trace.
    Type: Grant
    Filed: July 5, 2012
    Date of Patent: March 15, 2016
    Assignee: KEMET Electronics Corporation
    Inventors: John Bultitude, Mark R. Laps, James R. Magee, Lonnie G. Jones
  • Publication number: 20160071650
    Abstract: A stacked MLCC capacitor is provided wherein the capacitor stack comprises multilayered ceramic capacitors wherein each multilayered ceramic capacitor comprises first electrodes and second electrodes in an alternating stack with a dielectric between each first electrode and each adjacent second electrode. The first electrodes terminate at a first side and the second electrodes second side. A first transient liquid phase sintering conductive layer is the first side and in electrical contact with each first electrode; and a second transient liquid phase sintering conductive layer is on the second side and in electrical contact with each second electrode.
    Type: Application
    Filed: October 28, 2015
    Publication date: March 10, 2016
    Inventors: John E. McConnell, Garry L. Renner, John Bultitude, Allen Hill
  • Patent number: 9171672
    Abstract: A stacked leaded array is provided wherein the stacked leaded array allows for increased packing density of electronic components. The stacked leaded array has a multiplicity of electronic components in a stacked array. Each electronic component comprises a first termination and a second termination. A multiplicity of first leads are provided wherein each first lead is in electrical contact with at least one first termination. Second leads are in electrical contact with second terminations.
    Type: Grant
    Filed: June 26, 2012
    Date of Patent: October 27, 2015
    Assignee: Kemet Electronics Corporation
    Inventors: John E. McConnell, John Bultitude, Lonnie Jones, Alan Webster
  • Patent number: 9142353
    Abstract: A discharge capacitor for use in electronic circuits is described. The discharge capacitor has first internal electrodes in electrical contact with a first external termination and second internal electrodes parallel to and interleaved with the first internal electrodes wherein the second internal electrodes are in electrical contact with a second external termination. A dielectric is between the first internal electrodes and adjacent second internal electrodes. A first discharge gap is between at least one first internal electrode of said first internal electrodes and said second external termination.
    Type: Grant
    Filed: April 28, 2014
    Date of Patent: September 22, 2015
    Assignee: KEMET Electronics Corporation
    Inventors: John Bultitude, Mark R. Laps, Lonnie G. Jones
  • Patent number: 9087648
    Abstract: An improved multi-layered ceramic capacitor, and method of making the multi-layered ceramic capacitor, is described. The capacitor has an active area comprising first layers and second layers in alternating parallel arrangement with dielectric there between. The first layer comprises a first active electrode and a first floating electrode in a common plane and the second layer comprises a second active electrode and a second floating electrode in a second common plane. At least one shield layer is adjacent to an outermost first layer of the first layers wherein the shield layer has a first projection and the first layers have a second projection wherein the first projection and the second projection are different.
    Type: Grant
    Filed: March 25, 2013
    Date of Patent: July 21, 2015
    Assignee: Kemet Electronics Corporation
    Inventors: John Bultitude, Lonnie G. Jones, James R. Magee, Kitae Park
  • Patent number: 9025311
    Abstract: An improved high capacitance module for multi-layer ceramic capacitors is described. The module contains a flexible substrate comprising at least one first conductive trace and at least one second conductive trace. A first termination trace is in electrical connection with each first trace and a second termination trace is in electrical connection with each second trace. Each capacitor comprises interleaved conductors wherein alternate conductors are terminated to a first external termination and adjacent conductors are terminated to a second external termination. Each capacitor is mounted on the substrate with the first termination in electrical contact with the first trace and the second termination in electrical contact with the second trace. A housing with the substrate is received in the housing. A first lead tab is in electrical contact with the first termination wherein the first lead tab extends from the housing.
    Type: Grant
    Filed: April 23, 2013
    Date of Patent: May 5, 2015
    Assignee: Kemet Electronics Corporation
    Inventors: John Bultitude, John E. McConnell, Abhijit Gurav
  • Patent number: 8947852
    Abstract: An improved electronic component is described. The electronic component has a capacitor with first planer internal electrodes in electrical contact with a first termination and second planer internal electrodes in electrical contact with a second termination. A dielectric is between the first planer electrodes and the second planer internal electrodes. The electronic component further comprises at least one of: an inductor comprising a conductive trace wherein said conductive trace is between the first termination and a third termination; and an overvoltage protection component comprising: a third internal electrode contained within the dielectric and wherein the third internal electrode is electrically connected to the first termination; a fourth internal electrode contained within the ceramic and electrically connected to a fourth termination; and a gap between the third internal electrode and the fourth internal electrode.
    Type: Grant
    Filed: May 30, 2013
    Date of Patent: February 3, 2015
    Assignee: Kemet Electronics Corporation
    Inventors: Lonnie G. Jones, John Bultitude, Mark R. Laps, James R. Magee, Jeffrey W. Bell
  • Patent number: 8904609
    Abstract: A capacitor with a combined with a resistor and/or fuse is described. This safe capacitor can rapidly discharge through the resistor when shorted. The presence of a fuse in series with the capacitor and results in a resistive failure when this opens during and overcurrent condition. Furthermore, the presence of a resistor in parallel to the capacitor allows the energy to be rapidly dissipated when a failure occurs.
    Type: Grant
    Filed: December 8, 2011
    Date of Patent: December 9, 2014
    Assignee: Kemet Electronics Corporation
    Inventors: John Bultitude, John E. McConnell
  • Patent number: 8902565
    Abstract: A capacitor has first planer internal electrodes in electrical contact with a first external termination. Second planer internal electrodes are interleaved with the first planer internal electrodes wherein the second planer internal electrodes are in electrical contact with a second external termination. A dielectric is between the first planer internal electrodes and the second planer internal electrodes and at least one of the external terminations comprises a material selected from a polymer solder and a transient liquid phase sintering adhesive.
    Type: Grant
    Filed: May 24, 2011
    Date of Patent: December 2, 2014
    Assignee: Kemet Electronics Corporation
    Inventors: John E. McConnell, John Bultitude, Reggie Phillips, Robert Allen Hill, Garry L. Renner, Philip M. Lessner, Antony P. Chacko, Jeffrey Bell, Keith Brown
  • Patent number: 8896986
    Abstract: A solid electrolytic capacitor with an anode and a dielectric on the anode. A cathode is on the dielectric and a conductive coating on the dielectric. A cathode lead is electrically connected to the conductive coating by an adhesive selected from the group consisting of a transient liquid phase sinterable material and polymer solder.
    Type: Grant
    Filed: May 24, 2011
    Date of Patent: November 25, 2014
    Assignee: Kemet Electronics Corporation
    Inventors: Antony P. Chacko, John E. McConnell, Philip M. Lessner, Randolph S. Hahn, John Bultitude
  • Patent number: 8885319
    Abstract: New designs for multilayer ceramic capacitors are described with high voltage capability without the need of coating the part to resist surface arc-over. One design combines a high overlap area for higher capacitance while retaining a high voltage capability. A variation of this design has increased voltage capability over this design as well as another described in the prior art although overlap area and subsequently capacitance is lowered in this case. These designs are compared to the prior art in examples below.
    Type: Grant
    Filed: July 1, 2010
    Date of Patent: November 11, 2014
    Assignee: Kemet Electronics Corporation
    Inventors: John Bultitude, James R. Magee, Lonnie G. Jones