Patents by Inventor John E. Bowers

John E. Bowers has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11693178
    Abstract: A photonic integrated circuit (PIC) includes a semiconductor substrate, one or more passive components, and one or more active components. The one or more passive components are fabricated on the semiconductor substrate, wherein the passive components are fabricated in a III-V type semiconductor layer. The one or more active components are fabricated on top of the one or more passive components, wherein optical signals are communicated between the one or more active components via the one or more passive components.
    Type: Grant
    Filed: August 8, 2022
    Date of Patent: July 4, 2023
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: John E. Bowers, Arthur Gossard, Daehwan Jung, Justin Norman, Chen Shang, Yating Wan
  • Publication number: 20220390669
    Abstract: A photonic integrated circuit (PIC) includes a semiconductor substrate, one or more passive components, and one or more active components. The one or more passive components are fabricated on the semiconductor substrate, wherein the passive components are fabricated in a III-V type semiconductor layer. The one or more active components are fabricated on top of the one or more passive components, wherein optical signals are communicated between the one or more active components via the one or more passive components.
    Type: Application
    Filed: August 8, 2022
    Publication date: December 8, 2022
    Inventors: John E. BOWERS, Arthur GOSSARD, Daehwan JUNG, Justin NORMAN, Chen SHANG, Yating WAN
  • Patent number: 11435524
    Abstract: A photonic integrated circuit (PIC) includes a semiconductor substrate, one or more passive components, and one or more active components. The one or more passive components are fabricated on the semiconductor substrate, wherein the passive components are fabricated in a III-V type semiconductor layer. The one or more active components are fabricated on top of the one or more passive components, wherein optical signals are communicated between the one or more active components via the one or more passive components.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: September 6, 2022
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: John E. Bowers, Arthur Gossard, Daehwan Jung, Justin Norman, Chen Shang, Yating Wan
  • Publication number: 20220121084
    Abstract: An integrated laser/non-linear device includes a semiconductor/dielectric substrate, a nonlinear device fabricated on the semiconductor/dielectric substrate and a pump laser fabricated on the same semiconductor/dielectric substrate.
    Type: Application
    Filed: October 1, 2021
    Publication date: April 21, 2022
    Inventors: John E. Bowers, Lin Chang
  • Publication number: 20210218230
    Abstract: A quantum dot (QD) laser comprises a semiconductor substrate and an active region epitaxially deposited on the semi-conductor substrate. The active region includes a plurality of barrier layers and a plurality of QD layers interposed between each of the plurality of barrier layers. A net compressive strain associated with the plurality of QD layers is maintained below a maximum allowable strain to prevent formation of misfit dislocations within the active region of the QD laser.
    Type: Application
    Filed: May 24, 2019
    Publication date: July 15, 2021
    Inventors: John E. BOWERS, Arthur GOSSARD, Daehwan JUNG, Kunal MUKHERJEE, Justin NORMAN, Jenny SELVIDGE
  • Publication number: 20210208336
    Abstract: A photonic integrated circuit (PIC) includes a semiconductor substrate, one or more passive components, and one or more active components. The one or more passive components are fabricated on the semiconductor substrate, wherein the passive components are fabricated in a III-V type semiconductor layer. The one or more active components are fabricated on top of the one or more passive components, wherein optical signals are communicated between the one or more active components via the one or more passive components.
    Type: Application
    Filed: May 24, 2019
    Publication date: July 8, 2021
    Inventors: John E. BOWERS, Arthur GOSSARD, Daehwan JUNG, Justin NORMAN, Chen SHANG, Yating WAN
  • Patent number: 11016317
    Abstract: Reconfigurable non-reciprocal integrated-optics-based devices are disclosed. The non-reciprocal devices include: a phase-sensitive device, such as a microring waveguide; a magneto-optic layer; and an electromagnet. These elements are operatively coupled such that a magnetic field generated by current flow through the electromagnet gives rise to a non-reciprocal phase shift in the phase-sensitive device. The non-reciprocal phase shift leads to a difference in the way that a light signal travels in the forward and backward directions through one or more bus waveguides that are operatively coupled with the phase-sensitive element. The non-reciprocity is reversible by reversing the direction of drive current flow in the electromagnet, which enables the inter-port connectivity of the ports of these bus waveguides to be reconfigured based on the direction of the drive current flow. Examples of reconfigurable isolator and circulator embodiments are described.
    Type: Grant
    Filed: February 1, 2017
    Date of Patent: May 25, 2021
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: John E. Bowers, Paolo Pintus, Duanni Huang
  • Publication number: 20190049757
    Abstract: Reconfigurable non-reciprocal integrated-optics-based devices are disclosed. The non-reciprocal devices include: a phase-sensitive device, such as a microring waveguide; a magneto-optic layer; and an electromagnet. These elements are operatively coupled such that a magnetic field generated by current flow through the electromagnet gives rise to a non-reciprocal phase shift in the phase-sensitive device. The non-reciprocal phase shift leads to a difference in the way that a light signal travels in the forward and backward directions through one or more bus waveguides that are operatively coupled with the phase-sensitive element. The non-reciprocity is reversible by reversing the direction of drive current flow in the electromagnet, which enables the inter-port connectivity of the ports of these bus waveguides to be reconfigured based on the direction of the drive current flow. Examples of reconfigurable isolator and circulator embodiments are described.
    Type: Application
    Filed: February 1, 2017
    Publication date: February 14, 2019
    Inventors: John E. Bowers, Paolo Pintus, Duanni Huang
  • Patent number: 10180325
    Abstract: A fiber-optic gyroscope is disclosed, wherein the fiber-optic gyroscope has counter-propagating light signals in a closed-loop optical path, and where the light signals are characterized by an orthogonality that mitigates optical coupling between them. In some embodiments, the orthogonality is a difference in frequency of the two signals. In some embodiments, the orthogonality is a difference in the polarizations of the two signals. The orthogonality is imparted on the light signals by a non-reciprocal element that is optically coupled with the optical path. In some embodiments, a gain-balancing filter is also included to ensure that the loop gain for each light signal is substantially equal to one. In some embodiments, the light signals are provided by a gain element that is characterized by inhomogeneous broadening.
    Type: Grant
    Filed: April 24, 2017
    Date of Patent: January 15, 2019
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: John E. Bowers, Tin Komljenovic, Roger Helkey
  • Patent number: 10067031
    Abstract: A dual-comb optical-frequency comb generator includes a tunable comb-generating laser, a coarse-comb generator, a fine-comb generator, a second harmonic generator, a coarse-comb offset photodetector, a dual-comb offset photodetector, and a fine-comb photodetector. The coarse comb is self-referencing and coupled to the fine comb so as to enable absolute determination of the frequencies of the fine comb.
    Type: Grant
    Filed: May 8, 2017
    Date of Patent: September 4, 2018
    Assignees: CALIFORNIA INSTITUTE OF TECHNOLOGY, THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, THE UNITED STATES OF AMERICA
    Inventors: Kerry Vahala, John E. Bowers, Kartik A. Srinivasan, Scott B. Papp, Scott A. Diddams
  • Publication number: 20180095003
    Abstract: A dual-comb optical-frequency comb generator includes a tunable comb-generating laser, a coarse-comb generator, a fine-comb generator, a second harmonic generator, a coarse-comb offset photodetector, a dual-comb offset photodetector, and a fine-comb photodetector. The coarse comb is self-referencing and coupled to the fine comb so as to enable absolute determination of the frequencies of the fine comb.
    Type: Application
    Filed: May 8, 2017
    Publication date: April 5, 2018
    Inventors: Kerry Vahala, John E. Bowers, Kartik A. Srinivasan, Scott B. Papp, Scott A. Diddams
  • Patent number: 9910220
    Abstract: Photonic integrated circuits on silicon are disclosed. By bonding a wafer of HI-V material as an active region to silicon and removing the substrate, the lasers, amplifiers, modulators, and other devices can be processed using standard photolithographic techniques on the silicon substrate. The coupling between the silicon waveguide and the III-V gain region allows for integration of low threshold lasers, tunable lasers, and other photonic integrated circuits with Complimentary Metal Oxide Semiconductor (CMOS) integrated circuits.
    Type: Grant
    Filed: July 8, 2015
    Date of Patent: March 6, 2018
    Assignee: The Regents of the University of California
    Inventor: John E. Bowers
  • Publication number: 20170307375
    Abstract: A fiber-optic gyroscope is disclosed, wherein the fiber-optic gyroscope has counter-propagating light signals in a closed-loop optical path, and where the light signals are characterized by an orthogonality that mitigates optical coupling between them. In some embodiments, the orthogonality is a difference in frequency of the two signals. In some embodiments, the orthogonality is a difference in the polarizations of the two signals. The orthogonality is imparted on the light signals by a non-reciprocal element that is optically coupled with the optical path. In some embodiments, a gain-balancing filter is also included to ensure that the loop gain for each light signal is substantially equal to one. In some embodiments, the light signals are provided by a gain element that is characterized by inhomogeneous broadening.
    Type: Application
    Filed: April 24, 2017
    Publication date: October 26, 2017
    Inventors: John E. Bowers, Tin Komljenovic, Roger Helkey
  • Publication number: 20170227708
    Abstract: A method of fabricating a heterogeneous semiconductor wafer includes depositing a III-V type semiconductor epitaxial layer on a first wafer having a semiconductor substrate. The first wafer is then bonded to a second wafer having a patterned silicon layer formed on a semiconductor substrate, wherein the III-V type semiconductor epitaxial layer is bonded to the patterned silicon layer of the second wafer. The semiconductor substrate associated with the first wafer is removed to expose the III-V type semiconductor epitaxial layer.
    Type: Application
    Filed: June 3, 2016
    Publication date: August 10, 2017
    Applicant: The Regents of the University of California
    Inventors: John E. BOWERS, Jock BOVINGTON
  • Patent number: 9360623
    Abstract: A method of fabricating a heterogeneous semiconductor wafer includes depositing a III-V type semiconductor epitaxial layer on a first wafer having a semiconductor substrate. The first wafer is then bonded to a second wafer having a patterned silicon layer formed on a semiconductor substrate, wherein the III-V type semiconductor epitaxial layer is bonded to the patterned silicon layer of the second wafer. The semiconductor substrate associated with the first wafer is removed to expose the III-V type semiconductor epitaxial layer.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: June 7, 2016
    Assignee: The Regents of the University of California
    Inventors: John E. Bowers, Jock Bovington
  • Patent number: 9285540
    Abstract: A method for realizing a semiconductor waveguide and an ultra-low-loss dielectric waveguide disposed on the same substrate is disclosed. The method includes forming a partial dielectric waveguide structure on the substrate, wherein the dielectric waveguide is annealed to reduce hydrogen incorporation, and wherein the top cladding of the dielectric waveguide is only partially formed by a first dielectric layer. A second substrate comprising a semiconductor layer having a second dielectric layer disposed on its top surface is bonded to the first substrate such that the first and second dielectric layers collectively form the complete top cladding for the dielectric waveguide. The second substrate is then removed and the semiconductor layer is patterned to define the semiconductor waveguide core.
    Type: Grant
    Filed: September 20, 2013
    Date of Patent: March 15, 2016
    Assignee: The Regents of the University of California
    Inventors: Jared Bauters, John E. Bowers, Jock Bovington, Martijn Heck, Michael Davenport, Daniel Blumenthal, Jonathon Scott Barton
  • Publication number: 20150309254
    Abstract: Photonic integrated circuits on silicon are disclosed. By bonding a wafer of HI-V material as an active region to silicon and removing the substrate, the lasers, amplifiers, modulators, and other devices can be processed using standard photolithographic techniques on the silicon substrate. The coupling between the silicon waveguide and the III-V gain region allows for integration of low threshold lasers, tunable lasers, and other photonic integrated circuits with Complimentary Metal Oxide Semiconductor (CMOS) integrated circuits.
    Type: Application
    Filed: July 8, 2015
    Publication date: October 29, 2015
    Inventor: John E. Bowers
  • Patent number: 9136456
    Abstract: Composite epitaxial materials that comprise semimetallic ErAs nanoparticles or nanoislands epitaxially embedded in a semiconducting In0.53Ga0.47As matrix both as superlattices and randomly distributed throughout the matrix are disclosed. The presence of these particles increases the free electron concentration in the material while providing scattering centers for phonons. Electron concentration, mobility, and Seebeck coefficient of these materials are discussed and their potential for use in thermoelectric power generators is postulated. These composite materials in accordance with the present invention have high electrical conductivity, low thermal conductivity, and a high Seebeck coefficient. The ErAs nanoislands provides additional scattering mechanism for the mid to long wavelength phonon—the combination reduces the thermal conductivity below the alloy limit.
    Type: Grant
    Filed: June 14, 2007
    Date of Patent: September 15, 2015
    Assignee: The Regents of the University of California
    Inventors: Joshua M. O. Zide, Arthur C. Gossard, Ali Shakouri, John E. Bowers
  • Publication number: 20150226918
    Abstract: A method for realizing a semiconductor waveguide and an ultra-low-loss dielectric waveguide disposed on the same substrate is disclosed. The method includes forming a partial dielectric waveguide structure on the substrate, wherein the dielectric waveguide is annealed to reduce hydrogen incorporation, and wherein the top cladding of the dielectric waveguide is only partially formed by a first dielectric layer. A second substrate comprising a semiconductor layer having a second dielectric layer disposed on its top surface is bonded to the first substrate such that the first and second dielectric layers collectively form the complete top cladding for the dielectric waveguide. The second substrate is then removed and the semiconductor layer is patterned to define the semiconductor waveguide core.
    Type: Application
    Filed: September 20, 2013
    Publication date: August 13, 2015
    Inventors: Jared Bauters, John E. Bowers, Jock Bovington, Martijn Heck, Michael Davenport, Daniel Blumenthal, Jonathon Scott Barton
  • Patent number: 9097848
    Abstract: Photonic integrated circuits on silicon are disclosed. By bonding a wafer of HI-V material as an active region to silicon and removing the substrate, the lasers, amplifiers, modulators, and other devices can be processed using standard photolithographic techniques on the silicon substrate. The coupling between the silicon waveguide and the III-V gain region allows for integration of low threshold lasers, tunable lasers, and other photonic integrated circuits with Complimentary Metal Oxide Semiconductor (CMOS) integrated circuits.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: August 4, 2015
    Assignee: The Regents of the University of California
    Inventor: John E. Bowers