Patents by Inventor John E. Bowers
John E. Bowers has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7915639Abstract: Embodiments of detectors made using lattice matched photoabsorbing layers are disclosed. A photodiode apparatus in accordance with one or more embodiments of the present invention comprises an indium phosphide substrate, and a photoabsorbing region comprising at least an indium gallium arsenide antimonide nitride (InGaAsSbN) layer, wherein the InGaAsSbN layer has a thickness of at least 100 nanometers and is nominally lattice-matched to the indium phosphide substrate.Type: GrantFiled: October 20, 2008Date of Patent: March 29, 2011Assignee: Aerius Photonics LLCInventors: Michael MacDougal, Jonathan Geske, John E. Bowers
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Publication number: 20100128576Abstract: Apparatuses and methods for making and using laser-assisted magnetic recording devices. A slider for use in a magnetic recording apparatus in accordance with one or more embodiments of the present invention comprises a magnetic recording element having a first pole and a second pole, a magnetic reader, and a laser resonator integrally formed on said slider, having an optical emission point of said resonator positioned between the first pole and the second pole of the magnetic recording element; wherein the laser resonator comprises a semiconductor gain media positioned between a first reflector and a near field optical element having a nonzero optical reflection to the semiconductor gain media.Type: ApplicationFiled: November 21, 2008Publication date: May 27, 2010Inventors: Alexander W. Fang, John E. Bowers, Gregory A. Fish
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Publication number: 20100096665Abstract: Embodiments of detectors made using lattice matched photoabsorbing layers are disclosed. A photodiode apparatus in accordance with one or more embodiments of the present invention comprises an indium phosphide substrate, and a photoabsorbing region comprising at least an indium gallium arsenide antimonide nitride (InGaAsSbN) layer, wherein the InGaAsSbN layer has a thickness of at least 100 nanometers and is nominally lattice-matched to the indium phosphide substrate.Type: ApplicationFiled: October 20, 2008Publication date: April 22, 2010Applicant: AERIUS PHOTONICS LLCInventors: Michael MacDougal, Jonathan Geske, John E. Bowers
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Publication number: 20090245298Abstract: Photonic integrated circuits on silicon are disclosed. By bonding a wafer of compound semiconductor material as an active region to silicon and removing the substrate, the lasers, amplifiers, modulators, and other devices can be processed using standard photolithographic techniques on the silicon substrate. A silicon laser intermixed integrated device in accordance with one or more embodiments of the present invention comprises a silicon-on-insulator substrate, comprising at least one waveguide in a top surface, and a compound semiconductor substrate comprising a gain layer, the compound semiconductor substrate being subjected to a quantum well intermixing process, wherein the upper surface of the compound semiconductor substrate is bonded to the top surface of the silicon-on-insulator substrate.Type: ApplicationFiled: January 16, 2009Publication date: October 1, 2009Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Matthew N. Sysak, John E. Bowers, Alexander W. Fang, Hyundai Park
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Publication number: 20090016399Abstract: Photodetectors and integrated circuits including photodetectors are disclosed. A photodetector in accordance with the present invention comprises a silicon-on-insulator (SOI) structure resident on a first substrate, the SOI structure comprising a passive waveguide, and a III-V structure bonded to the SOI structure, the III-V structure comprising a quantum well region, a hybrid waveguide, coupled to the quantum well region and the SOI structure adjacent to the passive waveguide, and a mesa, coupled to the quantum well region, wherein when light passes through the hybrid waveguide, the quantum well region detects the light and generates current based on the light detected.Type: ApplicationFiled: April 12, 2007Publication date: January 15, 2009Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventor: John E. Bowers
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Patent number: 7457033Abstract: A MEMS-tunable semiconductor optical amplifier (SOA). A device in accordance with the present invention comprises a substrate, a first mirror, coupled to the substrate, a second mirror, an active region, coupled between the first and second mirror, and a microelectromechanical actuator, coupled to the second mirror, wherein a voltage is applied to the microelectromechanical actuator to tune the SOA.Type: GrantFiled: May 26, 2006Date of Patent: November 25, 2008Assignee: The Regents of the University of CaliforniaInventors: Garrett D. Cole, E. Staffan Björlin, Qi Chen, Noel C. MacDonald, John E. Bowers
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Publication number: 20080002929Abstract: An apparatus and method electrically pumping a hybrid evanescent laser. For one example, an apparatus includes an optical waveguide disposed in silicon. An active semiconductor material is disposed over the optical waveguide defining an evanescent coupling interface between the optical waveguide and the active semiconductor material such that an optical mode to be guided by the optical waveguide overlaps both the optical waveguide and the active semiconductor material. A current injection path is defined through the active semiconductor material and at least partially overlapping the optical mode such that light is generated in response to electrical pumping of the active semiconductor material in response to current injection along the current injection path at least partially overlapping the optical mode.Type: ApplicationFiled: June 30, 2006Publication date: January 3, 2008Inventors: John E. Bowers, Oded Cohen, Alexander W. Fang, Richard Jones, Mario J. Paniccia, Hyundai Park
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Patent number: 7196833Abstract: An apparatus for simultaneous OTDM demultiplexing, electrical clock recovery and optical clock generation, and optical clock recovery using a traveling-wave electroabsorption modulator. The apparatus includes a TW-EAM and a PLL coupled thereto. The TW-EAM includes a first, a second, a third, and a fourth. The first port is used for an optical input and the third port is used for optical output. The second port is coupled to an input, and the fourth port is coupled to an output, of the PLL. When the first port receives optical input, the second port produces a photocurrent to be applied to the PLL, and the fourth port receives a recovered clock produced by the PLL, and the third port produces demultiplexed data and an optical clock. Using the same configuration, the apparatus produces a recovered optical clock signal.Type: GrantFiled: August 23, 2005Date of Patent: March 27, 2007Assignees: KDDI R&D Laboratories, Inc., The Regents of the University of CaliforniaInventors: Zhaoyang Hu, Kohsuke Nishimura, Hsu-Feng Chou, Daniel J. Blumenthal, John E. Bowers, Ryo Inohara, Masashi Usami
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Patent number: 7184189Abstract: An apparatus for simultaneous OTDM demultiplexing, electrical clock recovery and optical clock generation, and optical clock recovery using a traveling-wave electroabsorption modulator. The apparatus includes a TW-EAM and a PLL coupled thereto. The TW-EAM includes a first, a second, a third, and a fourth. The first port is used for an optical input and the third port is used for optical output. The second port is coupled to an input, and the fourth port is coupled to an output, of the PLL. When the first port receives optical input, the second port produces a photocurrent to be applied to the PLL, and the fourth port receives a recovered clock produced by the PLL, and the third port produces demultiplexed data and an optical clock. Using the same configuration, the apparatus produces a recovered optical clock signal.Type: GrantFiled: August 23, 2005Date of Patent: February 27, 2007Assignees: KDDI R&D Laboratories, Inc., The Regents of the University of CaliforniaInventors: Zhaoyang Hu, Kohsuke Nishimura, Hsu-Feng Chou, Daniel J. Blumenthal, John E. Bowers, Ryo Inohara, Masashi Usami
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Patent number: 7142744Abstract: A method for equalizing optical signal power in a group of optical signals transmitted through an optical switch in an optical transmission system. In one embodiment a group of optical signals is input into an optical switch having at least one movable mirror array with a plurality of reflectors formed thereon, the optical beam being directed onto a selected at least one reflector and wherein attenuating the optical beam is accomplished by controllably detuning at least one of the selected at least one reflector to attenuate the optical beam.Type: GrantFiled: February 24, 2005Date of Patent: November 28, 2006Assignee: Calient NetworksInventors: Tony Walter, Dan Blumenthal, John E. Bowers, Peter Hunt, Roger J. Helkey, Xuezhe Zheng
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Patent number: 6819815Abstract: An optical switch embodiment includes a switching array of arranged to accomplish switching of input light beams to any of a plurality of output channels and an array of beam monitoring elements for indirectly measuring and providing information used for adjusting output beams. The beam monitoring element further includes means for measuring the angular misalignment and the positional misalignment of a monitor beam and adjusting the reflectors based on monitor beam information such that optical beams are output from the switch having the desired optical characteristics, such as optimized power. Another optical switch embodiment includes an array of rhomboid prism assemblies positioned to receive the output beams from the switching array and such that the beams are split into substantially parallel working and monitor beams.Type: GrantFiled: December 12, 2001Date of Patent: November 16, 2004Assignee: Calient NetworksInventors: Charles Corbalis, John E. Bowers, Shifu Yuan, David Welsh, Roger J. Helkey
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Publication number: 20040120636Abstract: A method for equalizing optical signal power in a group of optical signals transmitted through an optical switch in an optical transmission system. In one embodiment a group of optical signals is input into an optical switch having at least one movable mirror array with a plurality of reflectors formed thereon, the optical beam being directed onto a selected at least one reflector and wherein attenuating the optical beam is accomplished by controllably detuning at least one of the selected at least one reflector to attenuate the optical beam.Type: ApplicationFiled: December 10, 2003Publication date: June 24, 2004Applicant: Calient NetworksInventors: Tony Walter, Dan Blumenthal, John E. Bowers, Peter Hunt, Roger J. Helkey, Xuezhe Zheng
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Patent number: 6697547Abstract: A method for equalizing optical signal power in a group of optical signals transmitted through an optical switch in an optical transmission system. In one embodiment a group of optical signals is input into an optical switch having at least one movable mirror array with a plurality of reflectors formed thereon, the optical beam being directed onto a selected at least one reflector and wherein attenuating the optical beam is accomplished by controllably detuning at least one of the selected at least one reflector to attenuate the optical beam.Type: GrantFiled: May 14, 2001Date of Patent: February 24, 2004Assignee: Calient NetworksInventors: Tony Walter, Dan Blumenthal, John E. Bowers, Peter Hunt, Roger J. Helkey, Xuezhe Zheng
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Patent number: 6552256Abstract: A multi-stage cooler is formed from monolithically integrated thermionic and thermoelectric coolers, wherein the thermionic and thermoelectric coolers each have a separate electrical connection and a common ground, thereby forming a three terminal device. The thermionic cooler is comprised of a superlattice barrier surrounded by cathode and anode layers grown onto an appropriate substrate, one or more metal contacts with a finite surface area deposited on top of the cathode layer, and one or more mesas of different areas formed by etching around the contacts to the anode layer. The thermoelectric cooler is defined by metal contacts deposited on the anode layer or the substrate itself. A backside metal is deposited on the substrate for connecting to the common ground.Type: GrantFiled: March 6, 2001Date of Patent: April 22, 2003Assignee: The Regents of the University of CaliforniaInventors: Ali Shakouri, Christopher J. LaBounty, John E. Bowers
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Publication number: 20020168131Abstract: A method for equalizing optical signal power in a group of optical signals transmitted through an optical switch in an optical transmission system. In one embodiment a group of optical signals is input into an optical switch having at least one movable mirror array with a plurality of reflectors formed thereon, the optical beam being directed onto a selected at least one reflector and wherein attenuating the optical beam is accomplished by controllably detuning at least one of the selected at least one reflector to attenuate the optical beam.Type: ApplicationFiled: May 14, 2001Publication date: November 14, 2002Inventors: Tony Walter, Dan Blumenthal, John E. Bowers, Peter Hunt, Roger J. Helkey, Xuezhe Zheng
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Patent number: 6465803Abstract: By using wafer fusion, various structures for photodetectors and photodetectors integrated with other electronics can be achieved. The use of silicon as a multiplication region and III—V compounds as an absorption region create photodetectors that are highly efficient and tailored to specific applications. Devices responsive to different regions of the optical spectrum, or that have higher efficiencies are created.Type: GrantFiled: June 20, 2000Date of Patent: October 15, 2002Assignee: The Regents of the University of CaliforniaInventors: John E. Bowers, Aaron R. Hawkins
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Patent number: 6403874Abstract: A heterostructure thermionic cooler and a method for making thermionic coolers, employing a barrier layer of varying conduction bandedge for n-type material, or varying valence bandedge for p-type material, that is placed between two layers of material. The barrier layer bandedge is at least kBT higher than the Fermi level of the semiconductor layer, which allows only selected, “hot” electrons, or electrons of high enough energy, across the barrier. The barrier layer is constructed to have an internal electric field such that the electrons that make it over the initial barrier are assisted in travel to the anode. Once electrons drop to the energy level of the anode, they lose energy to the lattice, thus heating the lattice at the anode. The barrier height of the barrier layer is high enough to prevent the electrons from traveling in the reverse direction.Type: GrantFiled: November 17, 1999Date of Patent: June 11, 2002Assignee: The Regents of the University of CaliforniaInventors: Ali Shakouri, John E. Bowers
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Patent number: 6396976Abstract: An array of micromachined mirrors are arranged on a first substrate at the intersections of input and output optical paths and oriented at approximately forty-five degrees to the paths. An array of split-electrodes are arranged on a second substrate above the respective mirrors. Each split electrode includes a first electrode configured to apply an electrostatic force that rotates the mirror approximately ninety degrees into one of the input optical paths to deflect the optical signal along one of the output optical paths, and a second electrode configured to apply an electrostatic force that maintains the mirror position. Stability may be improved by using the first and second electrodes in combination to first actuate the mirror and then balance the forces on the mirror to maintain its position. Reproducibly accurate positioning of the mirrors requires either the use of active positioning control or of mechanical stops.Type: GrantFiled: April 14, 2000Date of Patent: May 28, 2002Assignee: Solus Micro Technologies, Inc.Inventors: Michael J. Little, John Jeffrey Lyon, John E. Bowers, Roger Helkey
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Patent number: 6385376Abstract: A vertical directional coupler fabricated using wafer fusion with a very short coupling length for fabrication of switches, filters and other electro-optic devices. Using the fused vertical coupler, planar waveguides can be fabricated on two different substrates in a three-dimensional structure in which there is vertical coupling between arrays through fused regions. Switches, including crossbar switches based on coupling between independent arrays of waveguides, as well as filters, can be fabricated.Type: GrantFiled: October 22, 1999Date of Patent: May 7, 2002Assignee: The Regents of the University of CaliforniaInventors: John E. Bowers, Bin Liu, Patrick Abraham, Boo-Gyoun Kim, Ali Shakouri
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Publication number: 20020033188Abstract: A heterostructure thermionic cooler and a method for making thermionic coolers, employing a barrier layer of varying conduction bandedge for n-type material, or varying valence bandedge for p-type material, that is placed between two layers of material. The barrier layer has a high enough barrier for the cold side to only allow “hot” electrons, or electrons of high enough energy, across the barrier. The barrier layer is constructed to have an internal electric field such that the electrons that make it over the initial barrier are assisted in travel to the anode. Once electrons drop to the energy level of the anode, they lose energy to the lattice, thus heating the lattice at the anode. The barrier height of the barrier layer is high enough to prevent the electrons from traveling in the reverse direction.Type: ApplicationFiled: October 12, 2001Publication date: March 21, 2002Inventors: Ali Shakouri, John E. Bowers