Patents by Inventor John J. Browne

John J. Browne has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240152460
    Abstract: An example disclosed apparatus comprises a trigger monitor to detect an event satisfying a cache scrape trigger rule during execution of a workload, and a cache scraper to scrape cache data from cache in hardware during the execution of the workload.
    Type: Application
    Filed: December 19, 2023
    Publication date: May 9, 2024
    Inventors: John J. Browne, Kshitij Arun Doshi, Thijs Metsch, Francesc Guim Bernat, Adrian Hoban
  • Publication number: 20240143505
    Abstract: Methods and apparatus for dynamic selection of super queue size for CPUs with higher number of cores. An apparatus includes a plurality of compute modules, each module including a plurality of processor cores with integrated first level (L1) caches and a shared second level (L2) cache, a plurality of Last Level Caches (LLCs) or LLC blocks and a plurality of memory interface blocks interconnect via a mesh interconnect. A compute module is configured to arbitrate access to the shared L2 cache and enqueue L2 cache misses in a super queue (XQ). The compute module further is configured to dynamically adjust the size of the XQ during runtime operations. The compute module tracks parameters comprising an L2 miss rate or count and LLC hit latency and adjusts the XQ size as a function of these parameters. A lookup table using the L2 miss rate/count and LLC hit latency may be implemented to dynamically select the XQ size.
    Type: Application
    Filed: December 22, 2023
    Publication date: May 2, 2024
    Inventors: Amruta MISRA, Ajay RAMJI, Rajendrakumar CHINNAIYAN, Chris MACNAMARA, Karan PUTTANNAIAH, Pushpendra KUMAR, Vrinda KHIRWADKAR, Sanjeevkumar Shankrappa ROKHADE, John J. BROWNE, Francesc GUIM BERNAT, Karthik KUMAR, Farheena Tazeen SYEDA
  • Publication number: 20240111587
    Abstract: Examples described herein relate to an accelerator that includes an interface and circuitry coupled to the interface. In some examples, the circuitry is configured to access compressed data, decompress the compressed data, and output the decompressed data based on a call to an application programming interface (API). In some examples, based on a first call to the API having first values, the circuitry is to decompress at least a subset of the data and output at least one strict subset of the decompressed data. In some examples, based on a second call to the API having second values, the circuitry is to decompress an entirety of the data and output the decompressed data.
    Type: Application
    Filed: December 1, 2023
    Publication date: April 4, 2024
    Inventors: Marian HORGAN, Mateusz POLROLA, Fei Z. WANG, John J. BROWNE, Laurent COQUEREL
  • Publication number: 20240089206
    Abstract: A computing device includes an appliance status table to store at least one of reliability and performance data for one or more network functions virtualization (NFV) appliances and one or more legacy network appliances. The computing device includes a load controller to configure an Internet Protocol (IP) filter rule to select a packet for which processing of the packet is to be migrated from a selected one of the one or more legacy network appliances to a selected one of the one or more NFV appliances, and to update the appliance status table with received at least one of reliability and performance data for the one or more legacy network appliances and the one or more NFV appliances. The computing device includes a packet distributor to receive the packet, to select one of the one or more NFV appliances based at least in part on the appliance status table, and to send the packet to the selected NFV appliance. Other embodiments are described herein.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Inventors: Patrick CONNOR, Andrey CHILIKIN, Brendan RYAN, Chris MACNAMARA, John J. BROWNE, Krishnamurthy JAMBUR SATHYANARAYANA, Stephen DOYLE, Tomasz KANTECKI, Anthony KELLY, Ciara LOFTUS, Fiona TRAHE
  • Patent number: 11907704
    Abstract: Various systems and methods for enabling derivation and distribution of an attestation manifest for a software update image are described. In an example, these systems and methods include orchestration functions and communications, providing functionality and components for a software update process which also provides verification and attestation among multiple devices and operators.
    Type: Grant
    Filed: May 2, 2022
    Date of Patent: February 20, 2024
    Assignee: Intel Corporation
    Inventors: Ned M. Smith, Kshitij Arun Doshi, John J. Browne, Vincent J. Zimmer, Francesc Guim Bernat, Kapil Sood
  • Publication number: 20240031219
    Abstract: Methods, apparatus, and systems are disclosed for mapping active assurance intents to resource orchestration and life cycle management. An example apparatus disclosed herein is to reserve a probe on a compute device in a cluster of compute devices based on a request to satisfy a resource availability criterion associated with a resource of the cluster, apply a risk mitigation operation based on the resource availability criterion before deployment of a workload to the cluster, and monitor whether the criterion is satisfied based on data from the probe after deployment of the workload to the cluster.
    Type: Application
    Filed: September 29, 2023
    Publication date: January 25, 2024
    Inventors: John J. Browne, Kshitij Arun Doshi, Francesc Guim Bernat, Adrian Hoban, Mats Agerstam, Shekar Ramachandran, Thijs Metsch, Timothy Verrall, Ciara Loftus, Emma Collins, Krzysztof Kepka, Pawel Zak, Aibhne Breathnach, Ivens Zambrano, Shanshu Yang
  • Publication number: 20240012459
    Abstract: Examples described herein relate to receiving a configuration, wherein the configuration is to specify a first level of renewable energy utilized by one or more devices based on telemetry, wherein the telemetry comprises a level of renewable energy supplied to the one or more devices. Based on a second level of available supplied renewable energy, a portion of the first level of available supplied renewable energy can be allocated to one or more devices to perform the process. Based on a third level of available supplied renewable energy, increase renewable energy allocated to the one or more devices, to perform the process, to above the first level.
    Type: Application
    Filed: September 22, 2023
    Publication date: January 11, 2024
    Applicant: Intel Corporation
    Inventors: Francesc GUIM BERNAT, Karthik KUMAR, John J. BROWNE, Chris MACNAMARA, Patrick CONNOR
  • Publication number: 20240015067
    Abstract: A computing apparatus, including: a hardware platform; and an interworking broker function (IBF) hosted on the hardware platform, the IBF including a translation driver (TD) associated with a legacy network appliance lacking native interoperability with an orchestrator, the IBF configured to: receive from the orchestrator a network function provisioning or configuration command for the legacy network appliance; operate the TD to translate the command to a format consumable by the legacy network appliance; and forward the command to the legacy network appliance.
    Type: Application
    Filed: September 19, 2023
    Publication date: January 11, 2024
    Applicant: Intel Corporation
    Inventors: John J. Browne, Timothy Verrall, Maryam Tahhan, Michael J. McGrath, Sean Harte, Kevin Devey, Jonathan Kenny, Christopher MacNamara
  • Patent number: 11855897
    Abstract: A computing device includes an appliance status table to store at least one of reliability and performance data for one or more network functions virtualization (NFV) appliances and one or more legacy network appliances. The computing device includes a load controller to configure an Internet Protocol (IP) filter rule to select a packet for which processing of the packet is to be migrated from a selected one of the one or more legacy network appliances to a selected one of the one or more NFV appliances, and to update the appliance status table with received at least one of reliability and performance data for the one or more legacy network appliances and the one or more NFV appliances. The computing device includes a packet distributor to receive the packet, to select one of the one or more NFV appliances based at least in part on the appliance status table, and to send the packet to the selected NFV appliance. Other embodiments are described herein.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: December 26, 2023
    Assignee: Intel Corporation
    Inventors: Patrick Connor, Andrey Chilikin, Brendan Ryan, Chris MacNamara, John J. Browne, Krishnamurthy Jambur Sathyanarayana, Stephen Doyle, Tomasz Kantecki, Anthony Kelly, Ciara Loftus, Fiona Trahe
  • Publication number: 20230412459
    Abstract: Technologies for dynamically selecting resources for virtual switching include a computing device configured to identify a present demand on processing resources of the computing device that are configured to process data associated with network packets received by the computing device. Additionally, the computing device is configured to determine a present capacity of one or more acceleration resources of the computing device and configure the virtual switch based on the present demand and the present capacity of the acceleration resources. Other embodiments are described herein.
    Type: Application
    Filed: September 1, 2023
    Publication date: December 21, 2023
    Inventors: Ciara Loftus, Chris MacNamara, John J. Browne, Patrick Fleming, Tomasz Kantecki, John BARRY, Patrick Connor
  • Publication number: 20230379271
    Abstract: Technologies for dynamically managing a batch size of packets include a network device. The network device is to receive, into a queue, packets from a remote node to be processed by the network device, determine a throughput provided by the network device while the packets are processed, determine whether the determined throughput satisfies a predefined condition, and adjust a batch size of packets in response to a determination that the determined throughput satisfies a predefined condition. The batch size is indicative of a threshold number of queued packets required to be present in the queue before the queued packets in the queue can be processed by the network device.
    Type: Application
    Filed: July 31, 2023
    Publication date: November 23, 2023
    Applicant: Intel Corporation
    Inventors: Ren Wang, Mia PRIMORAC, Tsung-Yuan C. Tai, Saikrishna EDUPUGANTI, John J. Browne
  • Patent number: 11818008
    Abstract: A computing apparatus, including: a hardware platform; and an interworking broker function (IBF) hosted on the hardware platform, the IBF including a translation driver (TD) associated with a legacy network appliance lacking native interoperability with an orchestrator, the IBF configured to: receive from the orchestrator a network function provisioning or configuration command for the legacy network appliance; operate the TD to translate the command to a format consumable by the legacy network appliance; and forward the command to the legacy network appliance.
    Type: Grant
    Filed: September 15, 2022
    Date of Patent: November 14, 2023
    Assignee: Intel Corporation
    Inventors: John J. Browne, Timothy Verrall, Maryam Tahhan, Michael J. McGrath, Sean Harte, Kevin Devey, Jonathan Kenny, Christopher MacNamara
  • Publication number: 20230353508
    Abstract: Examples described herein relate to a system within a package. In some examples, the system includes a communication fabric and circuitry to adjust a packet throughput rate associated with the communication fabric based at least in part on incoming receive rate across multiple input ports and fabric usage. In some examples, the communication fabric is to communicatively couple devices in the package including one or more of: an accelerator, a processor, a memory, or a network interface device.
    Type: Application
    Filed: July 10, 2023
    Publication date: November 2, 2023
    Inventors: Kapil SOOD, Patrick CONNOR, Scott P. DUBAL, James R. HEARN, Brendan RYAN, Chris MACNAMARA, Conor WALSH, David HUNT, John J. BROWNE, Kevin LAATZ
  • Patent number: 11805065
    Abstract: Packets are differentiated based on their traffic class. A traffic class is allocated bandwidth for transmission. One or more core or thread can be allocated to process packets of a traffic class for transmission based on allocated bandwidth for that traffic class. If multiple traffic classes are allocated bandwidth, and a traffic class underutilizes allocated bandwidth or a traffic class is allocated insufficient bandwidth, then allocated bandwidth can be adjusted for a future transmission time slot. For example, a higher priority traffic class with excess bandwidth can share the excess bandwidth with a next highest priority traffic class for use to allocate packets for transmission for the same time slot.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: October 31, 2023
    Assignee: Intel Corporation
    Inventors: Jasvinder Singh, John J. Browne, Tomasz Kantecki, Chris Macnamara
  • Publication number: 20230342458
    Abstract: Examples include techniques to mitigate or prevent cache-based side-channel attacks to a cache. Examples include use of assigned class of service (COS) assigned to cores of a process to determine whether to notify an OS of a potential malicious application attempting to access a cache line cached to a processor cache. Examples also include marking pages in an application memory address space of a processor cache as unflushable to prevent a potentially malicious application from accessing sensitive data loaded to the application memory address space of the processor cache.
    Type: Application
    Filed: June 27, 2023
    Publication date: October 26, 2023
    Inventors: Marcel CORNU, Tomasz KANTECKI, John J. BROWNE
  • Publication number: 20230342206
    Abstract: An accelerator or system including an accelerator can include an input interface to receive input data to be compressed and user application parameters for invocation of compression. The accelerator can include circuitry to identify a compression algorithm from configuration data provided with the input data. The user application parameters may not include parameters specifying entropy thresholds for compression of the input data. The circuitry can generate headers specific to the compression algorithm. The circuitry can generate uncompressed data blocks comprising blocks of the input data and corresponding headers. The circuitry can determine whether to provide the uncompressed data blocks or compressed data blocks based at least in part on entropy of the input data. Other methods, systems, and apparatuses are described.
    Type: Application
    Filed: June 27, 2023
    Publication date: October 26, 2023
    Inventors: Laurent Coquerel, Fei Wang, Smita Kumar, Phani Krishna Sagiraju, John J. Browne
  • Publication number: 20230325246
    Abstract: A platform includes a plurality of hardware blocks to provide respective functionality for use in execution of an application. A subset of the plurality of hardware blocks are deactivated and unavailable for use in the execution of the application at the start of the execution of the application. A hardware profile modification block of the platform identifies receives telemetry data generated by a set of sensors and dynamically activates at least a particular one of the subset of hardware blocks based on the physical characteristics, where following activation of the particular hardware block, the execution of the application continues and uses the particular hardware block.
    Type: Application
    Filed: May 31, 2023
    Publication date: October 12, 2023
    Applicant: Intel Corporation
    Inventors: Francesc Guim Bernat, Karthik Kumar, John J. Browne, Amruta Misra, Chris M. MacNamara
  • Publication number: 20230315143
    Abstract: A processing device includes a plurality of processing cores, a control register, associated with a first processing core of the plurality of processing cores, to store a first base clock frequency value at which the first processing core is to run, and a power management circuit to receive a base clock frequency request comprising a second base clock frequency value, store the second base clock frequency value in the control register to cause the first processing core to run at the second base clock frequency value, and expose the second base clock frequency value on a hardware interface associated with the power management circuit.
    Type: Application
    Filed: June 5, 2023
    Publication date: October 5, 2023
    Inventors: Vasudevan Srinivasan, Krishnakanth V. Sistla, Corey D. Gough, Ian M. Steiner, Nikhil Gupta, Vivek Garg, Ankush Varma, Sujal A. Vora, David P. Lerner, Joseph M. Sullivan, Nagasubramanian Gurumoorthy, William J. Bowhill, Venkatesh Ramamurthy, Chris MacNamara, John J. Browne, Ripan Das
  • Publication number: 20230289197
    Abstract: A method is described. The method includes repeatedly reading accelerator telemetry data from register and/or memory space allocated for the keeping of the accelerator telemetry data and writing the accelerator telemetry data into a physical file structure within memory and/or mass storage. The method also includes repeatedly reading the accelerator telemetry data from the physical file structure and storing the accelerator telemetry data into virtual files that are visible to application software programs that invoke the accelerator. The accelerator telemetry data describes an input/output memory management unit’s performance regarding its translation of virtual addresses to physical addresses for the accelerator.
    Type: Application
    Filed: April 3, 2023
    Publication date: September 14, 2023
    Inventors: Gordon MCFADDEN, Laurent COQUEREL, Fei Z. WANG, John J. BROWNE
  • Patent number: 11757802
    Abstract: Technologies for dynamically managing a batch size of packets include a network device. The network device is to receive, into a queue, packets from a remote node to be processed by the network device, determine a throughput provided by the network device while the packets are processed, determine whether the determined throughput satisfies a predefined condition, and adjust a batch size of packets in response to a determination that the determined throughput satisfies a predefined condition. The batch size is indicative of a threshold number of queued packets required to be present in the queue before the queued packets in the queue can be processed by the network device.
    Type: Grant
    Filed: June 13, 2022
    Date of Patent: September 12, 2023
    Assignee: Intel Corporation
    Inventors: Ren Wang, Mia Primorac, Tsung-Yuan C. Tai, Saikrishna Edupuganti, John J. Browne