Patents by Inventor John J. Browne

John J. Browne has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220116455
    Abstract: Various systems and methods for implementing computational storage are described herein.
    Type: Application
    Filed: December 23, 2021
    Publication date: April 14, 2022
    Inventors: Arun Raghunath, Mohammad Chowdhury, Michael Mesnier, Ravishankar R. Iyer, Ian Adams, Thijs Metsch, John J. Browne, Adrian Hoban, Veeraraghavan Ramamurthy, Patrick Koeberl, Francesc Guim Bernat, Kshitij Arun Doshi, Susanne M. Balle, Bin Li
  • Patent number: 11301020
    Abstract: In an example, there is disclosed a demand scaling engine, including: a processor interface to communicatively couple to a processor; a network controller interface to communicatively couple to a network controller and to receive network demand data; a scaleup criterion; a current processor frequency scale datum; and logic, provided at least partly in hardware, to: receive the network demand data; compare the network demand data to the scaleup criterion; determine that the network demand data exceeds the scaleup criterion; and instruct the processor via the processor interface to scaleup processor frequency.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: April 12, 2022
    Assignee: Intel Corporation
    Inventors: Christopher MacNamara, John J. Browne, William J. Bowhill, Christopher Nolan, Nemanja Marjanovic, Rory Sexton, Padraic Agnew, Colin Hanily
  • Publication number: 20220060391
    Abstract: In one embodiment, a method comprises determining whether an automation recommendation for a network is to be forwarded to a management system of the network, wherein the automation recommendation specifies an action to take with respect to a plurality of platforms of the network and is received from a recommendation system utilizing artificial intelligence to generate the automation recommendation; responsive to a determination to forward the automation recommendation, assessing an impact of the automation recommendation; and performing an action with respect to the automation recommendation based on the impact.
    Type: Application
    Filed: November 2, 2021
    Publication date: February 24, 2022
    Applicant: Intel Corporation
    Inventors: John J. Browne, Chris M. MacNamara
  • Publication number: 20220027278
    Abstract: Examples include techniques for core-specific metrics collection. Examples include fetching metrics of a core of a multi-core processor from one or more registers responsive to scheduling of an event. The fetched metrics are pushed to a shared memory space of a memory that is accessible to a user-space application and accessible to other cores of the multi-core processor. The user-space application to access the shared memory space to aggregate core-specific metrics associated with at least the core of the multi-core processor and then publish the aggregated core-specific metrics.
    Type: Application
    Filed: October 6, 2021
    Publication date: January 27, 2022
    Inventors: Piotr WYSOCKI, Francesc GUIM BERNAT, John J. BROWNE, Pawel ZAK, Rafal SZTEJNA, Przemyslaw PERYCZ, Timothy VERRALL, Szymon KONEFAL
  • Publication number: 20220011843
    Abstract: Telemetry information in the form of platform telemetry, virtualization layer telemetry, and application telemetry can be used to estimate power consumption of a software entity, such as a virtual machine, container, application, or network slice. A controller can take various actions based on software entity power consumption information. If a power limit of an integrated circuit component is exceeded, the controller can reduce the power consumption of a software entity or move the software entity to another integrated circuit component to reduce the power consumption of the integrated circuit component. The controller can determine a total software entity power consumption for software entities associated with a user entity and take actions to keep the total software entity power consumption within a power budget.
    Type: Application
    Filed: September 22, 2021
    Publication date: January 13, 2022
    Applicant: Intel Corporation
    Inventors: Chris M. MacNamara, John J. Browne, Amruta Misra
  • Publication number: 20220006884
    Abstract: Techniques for reassembling fragmented datagrams are disclosed. Packets may be received and classified. Packets of a fragmented datagram may be stored for later reassembly. In the illustrative embodiment, a datagram is reassembled based on an identified class of service associated with the datagram. Additionally or alternatively, in the illustrative embodiment, a replay window of a replay attack detector may be tuned based on hardware performance of a compute device.
    Type: Application
    Filed: September 16, 2021
    Publication date: January 6, 2022
    Applicant: Intel Corporation
    Inventors: John J. Browne, Chris M. MacNamara, Declan W. Doherty, Konstantin Ananyev
  • Patent number: 11212085
    Abstract: Technologies for accelerated key caching in an edge hierarchy include multiple edge appliance devices organized in tiers. An edge appliance device receives a request for a key, such as a private key. The edge appliance device determines whether the key is included in a local key cache and, if not, requests the key from an edge appliance device included in an inner tier of the edge hierarchy. The edge appliance device may request the key from an edge appliance device included in a peer tier of the edge hierarchy. The edge appliance device may activate per-tenant accelerated logic to identify one or more keys in the key cache for eviction. The edge appliance device may activate per-tenant accelerated logic to identify one or more keys for pre-fetching. Those functions of the edge appliance device may be performed by an accelerator such as an FPGA. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: December 28, 2021
    Assignee: Intel Corporation
    Inventors: Timothy Verrall, Thomas Willhalm, Francesc Guim Bernat, Karthik Kumar, Ned M. Smith, Rajesh Poornachandran, Kapil Sood, Tarun Viswanathan, John J. Browne, Patrick Kutch
  • Patent number: 11169560
    Abstract: A processing device includes a plurality of processing cores, a control register, associated with a first processing core of the plurality of processing cores, to store a first base clock frequency value at which the first processing core is to run, and a power management circuit to receive a base clock frequency request comprising a second base clock frequency value, store the second base clock frequency value in the control register to cause the first processing core to run at the second base clock frequency value, and expose the second base clock frequency value on a hardware interface associated with the power management circuit.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: November 9, 2021
    Assignee: Intel Corporation
    Inventors: Vasudevan Srinivasan, Krishnakanth V. Sistla, Corey D. Gough, Ian M. Steiner, Nikhil Gupta, Vivek Garg, Ankush Varma, Sujal A. Vora, David P. Lerner, Joseph M. Sullivan, Nagasubramanian Gurumoorthy, William J. Bowhill, Venkatesh Ramamurthy, Chris Macnamara, John J. Browne, Ripan Das
  • Publication number: 20210326262
    Abstract: A system comprising a first processor unit comprising a first register to store a metric for the first processor unit; and circuitry to initiate sharing of the metric with a second processor unit without the use of an inter-processor interrupt.
    Type: Application
    Filed: June 25, 2021
    Publication date: October 21, 2021
    Inventors: David Hunt, Jeffrey B. Shaw, Tewodros A. Wolde, Paul Hough, Biwei Guo, John J. Browne, Liang Ma, Sunku Ranganath, Chris M. MacNamara
  • Publication number: 20210320870
    Abstract: A computing device includes an appliance status table to store at least one of reliability and performance data for one or more network functions virtualization (NFV) appliances and one or more legacy network appliances. The computing device includes a load controller to configure an Internet Protocol (IP) filter rule to select a packet for which processing of the packet is to be migrated from a selected one of the one or more legacy network appliances to a selected one of the one or more NFV appliances, and to update the appliance status table with received at least one of reliability and performance data for the one or more legacy network appliances and the one or more NFV appliances. The computing device includes a packet distributor to receive the packet, to select one of the one or more NFV appliances based at least in part on the appliance status table, and to send the packet to the selected NFV appliance. Other embodiments are described herein.
    Type: Application
    Filed: June 23, 2021
    Publication date: October 14, 2021
    Inventors: Patrick CONNOR, Andrey CHILIKIN, Brendan RYAN, Chris MACNAMARA, John J. BROWNE, Krishnamurthy JAMBUR SATHYANARAYANA, Stephen DOYLE, Tomasz KANTECKI, Anthony KELLY, Ciara LOFTUS, Fiona TRAHE
  • Publication number: 20210320881
    Abstract: In one embodiment, a system comprising a network interface controller comprising circuitry to determine per-flow analytics information for a plurality of packet flows; and facilitate differential rate processing of a plurality of packet queues for the plurality of packet flows based on the per-flow analytics information.
    Type: Application
    Filed: June 25, 2021
    Publication date: October 14, 2021
    Applicant: Intel Corporation
    Inventors: David Coyle, Brendan Ryan, John J. Browne, Jeffery G. Oliver, Pallavi Manaji Kadam, Sunku Ranganath
  • Patent number: 11122129
    Abstract: There is disclosed in an example, a computer-implemented method of providing network function virtualization orchestration (NFVO), including: determining that a first virtual network function (VNF) instance, providing a virtual service appliance on a virtual network, is to be migrated; provisioning a second VNF instance of the virtual service appliance; cloning configuration data from the first VNF to the second VNF; starting the second VNF without copying traffic data; and halting the first VNF. There is also disclosed an apparatus for performing the method, and a computer-readable medium having instructions for performing the method.
    Type: Grant
    Filed: December 31, 2016
    Date of Patent: September 14, 2021
    Assignee: Intel Corporation
    Inventors: Ben-Zion Friedman, Eliezer Tamir, John J. Browne, Stephen Thomas Palermo
  • Publication number: 20210281618
    Abstract: In one embodiment, a system includes a device and a host. The device includes a device stream buffer. The host includes a processor to execute at least a first application and a second application, a host stream buffer, and a host scheduler. The first application is associated with a first transmit streaming channel to stream first data from the first application to the device stream buffer. The first transmit streaming channel has a first allocated amount of buffer space in the device stream buffer. The host scheduler schedules enqueue of the first data from the first application to the first transmit streaming channel based at least in part on availability of space in the first allocated amount of buffer space in the device stream buffer. Other embodiments are described and claimed.
    Type: Application
    Filed: May 6, 2021
    Publication date: September 9, 2021
    Inventors: LOKPRAVEEN MOSUR, ILANGO GANGA, ROBERT CONE, KSHITIJ ARUN DOSHI, JOHN J. BROWNE, MARK DEBBAGE, STEPHEN DOYLE, PATRICK FLEMING, DODDABALLAPUR JAYASIMHA
  • Patent number: 11080202
    Abstract: A computing apparatus, including: a processor; a pointer to a counter memory location; and a lazy increment counter engine to: receive a stimulus to update the counter; and lazy increment the counter including issuing a weakly-ordered increment directive to the pointer.
    Type: Grant
    Filed: September 30, 2017
    Date of Patent: August 3, 2021
    Assignee: Intel Corporation
    Inventors: Niall D. McDonnell, Christopher MacNamara, John J. Browne, Andrew Cunningham, Brendan Ryan, Patrick Fleming, Namakkal N. Venkatesan, Bruce Richardson, Tomasz Kantecki, Sean Harte, Pierre Laurent
  • Publication number: 20210224128
    Abstract: Techniques for managing workloads in processor cores are disclosed. High priority or mission critical workloads may be assigned to processor cores of a processor. When a power limited throttling condition is met, the processor may throttle some of its cores while not throttling the cores with the high priority or mission critical workloads assigned to it. Such an approach can ensure that mission critical workloads continue even upon throttling of the processor cores.
    Type: Application
    Filed: December 24, 2020
    Publication date: July 22, 2021
    Applicant: Intel Corporation
    Inventors: Chris M. MacNamara, John J. Browne, Amruta Misra, Niall C. Power, Dave Cremins, Tomasz Kantecki, Paul Hough, Killian Muldoon
  • Patent number: 11070476
    Abstract: A computing device includes an appliance status table to store at least one of reliability and performance data for one or more network functions virtualization (NFV) appliances and one or more legacy network appliances. The computing device includes a load controller to configure an Internet Protocol (IP) filter rule to select a packet for which processing of the packet is to be migrated from a selected one of the one or more legacy network appliances to a selected one of the one or more NFV appliances, and to update the appliance status table with received at least one of reliability and performance data for the one or more legacy network appliances and the one or more NFV appliances. The computing device includes a packet distributor to receive the packet, to select one of the one or more NFV appliances based at least in part on the appliance status table, and to send the packet to the selected NFV appliance. Other embodiments are described herein.
    Type: Grant
    Filed: April 26, 2019
    Date of Patent: July 20, 2021
    Assignee: Intel Corporation
    Inventors: Patrick Connor, Andrey Chilikin, Brendan Ryan, Chris MacNamara, John J. Browne, Krishnamurthy Jambur Sathyanarayana, Stephen Doyle, Tomasz Kantecki, Anthony Kelly, Ciara Loftus, Fiona Trahe
  • Patent number: 11057306
    Abstract: Examples include a method of determining a first traffic overload protection policy for a first service provided by a first virtual network function in a network of virtual network functions in a computing system and determining a second traffic overload protection policy for a second service provided by a second virtual network function in the network of virtual network functions. The method includes applying the first traffic overload protection policy to the first virtual network function and the second traffic overload protection policy to the second virtual network function, wherein the first traffic overload protection policy and the second traffic overload protection policy are different.
    Type: Grant
    Filed: March 14, 2019
    Date of Patent: July 6, 2021
    Assignee: Intel Corporation
    Inventors: Jasvinder Singh, John J. Browne, Shobhi Jain, Sunku Ranganath, John O'Loughlin, Emma L. Foley
  • Patent number: 11050682
    Abstract: A network interface device, including: an ingress interface; a host platform interface to communicatively couple to a host platform; and a packet preprocessor including logic to: receive via the ingress interface a data sequence including a plurality of discrete data units; identify the data sequence as data for a parallel processing operation; reorder the discrete data units into a reordered data frame, the reordered data frame configured to order the discrete data units for consumption by the parallel operation; and send the reordered data to the host platform via the host platform interface.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: June 29, 2021
    Assignee: Intel Corporation
    Inventors: Tomasz Kantecki, Niall Power, John J. Browne, Christopher MacNamara, Stephen Doyle
  • Publication number: 20210182194
    Abstract: A performance monitor provides cache miss stall and memory bandwidth usage metric samples to a resource exhaustion detector. The detector can detect the presence of last-level cache and memory bandwidth exhaustion conditions based on the metric samples. If cache miss stalls and memory bandwidth usage are both trending up, the detector reports a memory bandwidth exhaustion condition to a resource controller. If cache miss stalls are trending up and memory bandwidth usage is trending down, the detector reports a last-level cache exhaustion condition to the resource controller. The resource controller can allocate additional last-level cache or memory bandwidth to the processor unit to remediate the resource exhaustion condition. If bandwidth-related metric samples indicate that a processor unit may be overloaded due to receiving high bandwidth traffic, the resource controller can take a traffic rebalancing remedial action.
    Type: Application
    Filed: February 25, 2021
    Publication date: June 17, 2021
    Applicant: Intel Corporation
    Inventors: John J. Browne, Adrian Boczkowski, Marcel D. Cornu, David Hunt, Shobhi Jain, Tomasz Kantecki, Liang Ma, Chris M. MacNamara, Amruta Misra, Terence Nally
  • Publication number: 20210157626
    Abstract: Examples described herein relate to circuitry to boot a virtualized execution environment (VEE) by use of system resources, wherein the system resources are allocated based on a priority level of the VEE. In some examples, the circuitry to boot a VEE by use of system resources is to access an identification of system resources to use to boot the VEE and priority level of the VEE from stored data. In some examples, the priority level of the VEE is based on a service level agreement (SLA), service level objective (SLO), or class of service (COS) that identifies boot time of the VEE. In some examples, the circuitry is to boot a VEE by use of system resources, wherein the system resources are allocated based on a priority level of the VEE and also based on a number of VEEs that boot concurrently.
    Type: Application
    Filed: February 2, 2021
    Publication date: May 27, 2021
    Inventors: Amruta MISRA, Chris MACNAMARA, John J. BROWNE, Liang MA, Shobhi JAIN, David HUNT