Patents by Inventor John J. Browne

John J. Browne has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210153019
    Abstract: A service coordinating entity device includes communications circuitry to communicate with a first access network, processing circuitry, and a memory device. The processing circuitry is to perform operations to, in response to a request for establishing a connection with a user equipment (UE) in a second access network, retrieve a first Trusted Level Agreement (TLA) including trust attributes associated with the first access network. One or more exchanges of the trust attributes of the first TLA and trust attributes of a second TLA associated with the second access network are performed using a computing service executing on the service coordinating entity. A common TLA with trust attributes associated with communications between the first and second access networks is generated based on the exchanges. Data traffic is routed from the first access network to the UE in the second access network based on the trust attributes of the common TLA.
    Type: Application
    Filed: October 21, 2020
    Publication date: May 20, 2021
    Inventors: Alexander Bachmutsky, Dario Sabella, Francesc Guim Bernat, John J. Browne, Kapil Sood, Kshitij Arun Doshi, Mats Gustav Agerstam, Ned M. Smith, Rajesh Poornachandran, Tarun Viswanathan
  • Publication number: 20210136680
    Abstract: A system comprising an interface to access a network slice power consumption parameter for a network slice comprising a logical network between two endpoints through a plurality of physical computing platforms; and a controller comprising circuitry, the controller to specify operating parameters for a plurality of hardware resources of a first physical computing platform in accordance with the network slice power consumption parameter.
    Type: Application
    Filed: December 11, 2020
    Publication date: May 6, 2021
    Applicant: Intel Corporation
    Inventors: John J. Browne, Chris M. MacNamara, David Hunt, Amruta Misra, Tomasz Kantecki, Shobhi Jain, Liang Ma
  • Patent number: 10999209
    Abstract: Technologies for network packet processing include a computing device that receives incoming network packets. The computing device adds the incoming network packets to an input lockless shared ring, and then classifies the network packets. After classification, the computing device adds the network packets to multiple lockless shared traffic class rings, with each ring associated with a traffic class and output port. The computing device may allocate bandwidth between network packets active during a scheduling quantum in the traffic class rings associated with an output port, schedule the network packets in the traffic class rings for transmission, and then transmit the network packets in response to scheduling. The computing device may perform traffic class separation in parallel with bandwidth allocation and traffic scheduling. In some embodiments, the computing device may perform bandwidth allocation and/or traffic scheduling on each traffic class ring in parallel.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: May 4, 2021
    Assignee: Intel Corporation
    Inventors: John J. Browne, Tomasz Kantecki, Chris Macnamara, Pierre Laurent, Sean Harte, Peter McCarthy, Jacqueline F. Jardim, Liang Ma
  • Publication number: 20210117307
    Abstract: In one embodiment, a computing device includes processing circuitry to receive a request to evaluate a plurality of platform configurations for deployment of an application workload on a compute platform, wherein the application workload is to be deployed based on one or more workload requirements; deploy a representative workload on the compute platform based on the plurality of platform configurations, wherein the representative workload is representative of the application workload; obtain performance data for the plurality of platform configurations, wherein the performance data is obtained based on deploying the representative workload on the compute platform; and determine, based on the performance data, whether the plurality of platform configurations satisfy the one or more workload requirements.
    Type: Application
    Filed: December 26, 2020
    Publication date: April 22, 2021
    Inventors: Chris M. MacNamara, John J. Browne, Amruta Misra, David Hunt, Niall C. Power, Tomasz Kantecki, Dave Cremins
  • Publication number: 20210119878
    Abstract: Telemetry information provided by a computing device includes switching key performance indicators (KPIs), platform KPIs, and topology information. The telemetry information is used to identify performance issues at the computing device, such as packets being dropped in a virtual switching stack or misconfiguration errors. A virtual switching monitor can identify which layers in the switching stack have errors and whether the errors occur along a transmit or receive path in the switching stack. A virtual switching controller can identify remedial actions that can be taken at the computing device to remedy a performance issue. A remedial action can be taken automatically, subject to user approval, or automatically after additional criteria are met.
    Type: Application
    Filed: December 9, 2020
    Publication date: April 22, 2021
    Applicant: Intel Corporation
    Inventors: Ciara Loftus, John J. Browne, Timothy Verrall, Patrick G. Kutch, Chris M. Macnamara, Brendan Ryan, Dave Cremins, Andrey Chilikin
  • Publication number: 20210111942
    Abstract: Examples described herein relate to a management system that determines which services to redeploy on one or more platforms. A platform can receive a configuration to perform during a failure of connectivity with a management system. The platform can monitor activity of one or more services. The platform can, based on failure of connectivity with the management system and recovery of connectivity with the management system, provide the monitored activity of one or more services to the management system to influence services re-deployed by the management system. In some examples, based on failure to re-establish a connection with the management system within an amount of time, the platform can connect with the management system using a secondary management interface.
    Type: Application
    Filed: October 23, 2020
    Publication date: April 15, 2021
    Inventors: Maryam TAHHAN, Shobhi JAIN, John J. BROWNE, Emma L. FOLEY, John O'LOUGHLIN, Sunku RANGANATH, Krzysztof KEPKA, Swati SEHGAL
  • Patent number: 10979328
    Abstract: Particular embodiments described herein provide for a network element that can be configured to receive a link monitoring message, determine one or more resources associated with the link monitoring message, determine a status of each of the one or more resources, and send a response that provides an indication of the status of each of the one or more resources. In an example, the link monitoring is part of a bidirectional forwarding detection packet.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: April 13, 2021
    Assignee: Intel Corporation
    Inventors: Mark D. Gray, John J. Browne, Maryam Tahhan
  • Publication number: 20210075732
    Abstract: In one embodiment, a system comprises an interface to receive a plurality of packets; and a plurality of processor units to execute a plurality of transmission sub-interfaces, each transmission sub-interface to perform hierarchical quality of service (HQoS) scheduling on a distinct subset of the plurality of packets, wherein each transmission sub-interface is to schedule its subset of the plurality of packets for transmission by a network interface controller by assigning the packets of the subset to a plurality of transmission queues that each correspond to a distinct traffic class.
    Type: Application
    Filed: November 19, 2020
    Publication date: March 11, 2021
    Applicant: Intel Corporation
    Inventors: Jasvinder Singh, Thomas Long, Eoin Walsh, John J. Browne
  • Patent number: 10936449
    Abstract: Discussed herein are component redundancy systems, devices, and methods. A method to transfer a workload from a first component to a second component of a same device may include monitoring a wear indicator associated with the first component, and in response to an indication that the first component is stressed based on the wear indicator, transferring a workload of the first component to the second component.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: March 2, 2021
    Assignee: Intel Corporation
    Inventors: Hang T. Nguyen, Stephen T. Palermo, John J. Browne, Chris MacNamara, Pradeepsunder Ganesh
  • Publication number: 20210021484
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to schedule workloads based on secure edge to device telemetry by calculating a difference between a first telemetric data received from a first hardware device and an operating parameter and computing an adjustment for a second hardware device based on the difference between the first telemetric data and the operating parameter.
    Type: Application
    Filed: September 25, 2020
    Publication date: January 21, 2021
    Inventors: Kapil Sood, Timothy Verrall, Ned M. Smith, Tarun Viswanathan, Kshitij Doshi, Francesc Guim Bernat, John J. Browne, Katalin Bartfai-Walcott, Maryam Tahhan, Eoin Walsh, Damien Power
  • Publication number: 20210014324
    Abstract: Examples described herein relate to a network interface apparatus that includes an interface; circuitry to determine whether to store content of a received packet into a cache or into a memory, at least during a configuration of the network interface to store content directly into the cache, based at least in part on a fill level of a region of the cache allocated to receive copies of packet content directly from the network interface; and circuitry to store content of the received packet into the cache or the memory based on the determination, wherein the cache is external to the network interface. In some examples, the network interface is to determine to store content of the received packet into the memory based at least in part on a fill level of the region of the cache being identified as full or determine to store content of the received packet into the cache based at least in part on a fill level of the region of the cache being identified as not filled.
    Type: Application
    Filed: September 24, 2020
    Publication date: January 14, 2021
    Inventors: Andrey CHILIKIN, Tomasz KANTECKI, Chris MACNAMARA, John J. BROWNE, Declan DOHERTY, Niall POWER
  • Patent number: 10860714
    Abstract: Technologies for cache side channel attack detection and mitigation include an analytics server and one or more monitored computing devices. The analytics server polls each computing device for analytics counter data. The computing device generates the analytics counter data using a resource manager of a processor of the computing device. The analytics counter data may include last-level cache data or memory bandwidth data. The analytics server identifies suspicious core activity based on the analytics counter data and, if identified, deploys a detection process to the computing device. The computing device executes the detection process to identify suspicious application activity. If identified, the computing device may perform one or more corrective actions. Corrective actions include limiting resource usage by a suspicious process using the resource manager of the processor. The resource manager may limit cache occupancy or memory bandwidth used by the suspicious process.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: December 8, 2020
    Assignee: Intel Corporation
    Inventors: John J. Browne, Marcel Cornu, Timothy Verrall, Tomasz Kantecki, Niall Power, Weigang Li, Eoin Walsh, Maryam Tahhan
  • Publication number: 20200374310
    Abstract: Examples described herein relate to a computing system that alters a frequency of operation of a peripheral device interface between a network interface card and a processor based on detection of a traffic violation. In some examples, a frequency of operation of a peripheral device interface is reduced based on detection of a traffic violation. In some examples, IP packet fragments can include one or more of: IP packet fragments that are incomplete packets, IP packet fragment that are too small, IP packet fragments that result in excessive packets, or IP packet fragmentation buffer being full. In some examples, detecting a traffic violation is based on detection of IP packet fragments at one or more of: a network appliance, the network interface card, uncore, system agent, operating system, application, or a computing platform. In some examples, the peripheral device interface includes one or more of: a system agent, an uncore, a bus, a device interface, and a cache.
    Type: Application
    Filed: August 11, 2020
    Publication date: November 26, 2020
    Inventors: Amruta MISRA, John J. BROWNE, Chris MACNAMARA
  • Patent number: 10848974
    Abstract: A service coordinating entity device includes communications circuitry to communicate with a first access network, processing circuitry, and a memory device. The processing circuitry is to perform operations to, in response to a request for establishing a connection with a user equipment (UE) in a second access network, retrieve a first Trusted Level Agreement (TLA) including trust attributes associated with the first access network. One or more exchanges of the trust attributes of the first TLA and trust attributes of a second TLA associated with the second access network are performed using a computing service executing on the service coordinating entity. A common TLA with trust attributes associated with communications between the first and second access networks is generated based on the exchanges. Data traffic is routed from the first access network to the UE in the second access network based on the trust attributes of the common TLA.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: November 24, 2020
    Assignee: Intel Corporation
    Inventors: Alexander Bachmutsky, Dario Sabella, Francesc Guim Bernat, John J. Browne, Kapil Sood, Kshitij Arun Doshi, Mats Gustav Agerstam, Ned M. Smith, Rajesh Poornachandran, Tarun Viswanathan
  • Publication number: 20200259763
    Abstract: Examples described herein relate to a device configured to allocate memory resources for packets received by the network interface based on received configuration settings. In some examples, the device is a network interface. Received configuration settings can include one or more of: latency, memory bandwidth, timing of when the content is expected to be accessed, or encryption parameters. In some examples, memory resources include one or more of: a cache, a volatile memory device, a storage device, or persistent memory. In some examples, based on a configuration settings not being available, the network interface is to perform one or more of: dropping a received packet, store the received packet in a buffer that does not meet the configuration settings, or indicate an error. In some examples, configuration settings are conditional where the settings are applied if one or more conditions is met.
    Type: Application
    Filed: April 27, 2020
    Publication date: August 13, 2020
    Inventors: Francesc GUIM BERNAT, Patrick CONNOR, Patrick G. KUTCH, John J. BROWNE, Alexander BACHMUTSKY
  • Publication number: 20200225724
    Abstract: Examples herein relate to assigning, by a system agent of a central processing unit (CPU), an operating frequency to a core group based priority level of the core group while avoiding throttling of the system agent. Avoiding throttling of the system agent can include maintaining a minimum performance level of the system agent. A minimum performance level of the system agent can be based on a minimum operating frequency. Assigning, by a system agent of a central processing unit, an operating frequency to a core group based priority level of the core group while avoiding throttling of the system agent can avoid a thermal limit of the CPU. Avoiding thermal limit of the CPU can include adjusting the operating frequency to the core group to avoid performance indicators of the CPU. A performance indicator can indicate CPU utilization corresponds to Thermal Design Point (TDP).
    Type: Application
    Filed: March 27, 2020
    Publication date: July 16, 2020
    Inventors: Chris MACNAMARA, John J. BROWNE, Tomasz KANTECKI, David HUNT, Anatoly BURAKOV, Srihari MAKINENI, Nikhil GUPTA, Ankush VARMA, Dorit SHAPIRA, Vasudevan SRINIVASAN, Bryan T. BUTTERS, Shrikant M. SHAH
  • Publication number: 20200218633
    Abstract: A method for monitoring health of processes includes a compute device having a performance monitoring parameter manager and an analytics engine. The compute device accesses performance monitoring parameters associated with a monitored process of the compute device. The compute device samples one or more hardware counters associated with the monitored process and applies a performance monitor filter to the sampled one or more hardware counters to generate hardware counter values. The compute device performs a process fault check on the monitored process based on the hardware counter values and the performance monitoring parameters.
    Type: Application
    Filed: March 16, 2020
    Publication date: July 9, 2020
    Inventors: John J. Browne, Tomasz Kantecki, Wojciech Andralojc, Timothy Verrall, Maryam Tahhan, Eoin Walsh, Damien Power, Chris Macnamara
  • Patent number: 10673750
    Abstract: There is disclosed in one example a computing apparatus, including: a hardware platform including at least a processor; and one or more memories having encoded thereon instructions to instruct the hardware platform to: receive a request to generate a receive descriptor profile (RDP) for the requestor's network flow; receive at least one parameter for the RDP; generate the RDP from the at least one parameter; and send the RDP to a network interface controller for the requestor.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: June 2, 2020
    Assignee: Intel Corporation
    Inventors: Ronen Chayat, Andrey Chilikin, John J. Browne
  • Publication number: 20200150734
    Abstract: Examples described herein provide for a first core to map a measurement of packet processing activity and operating parameters so that a second core can access the measurement of packet processing activity and potentially modify an operating parameter of the first core. The second core can modify operating parameters of the first core based on the measurement of packet processing activity. The first and second cores can be provisioned on start-up with a common key. The first and second cores can use the common key to encrypt or decrypt measurement of packet processing activity and operating parameters that are shared between the first and second cores. Accordingly, operating parameters of the first core can be modified by a different core while providing for secure modification of operating parameters.
    Type: Application
    Filed: January 20, 2020
    Publication date: May 14, 2020
    Inventors: Liang MA, Weigang LI, Madhusudana RAGHUPATRUNI, Hongjun NI, Xuekun HU, Changzheng WEI, Chris MACNAMARA, John J. BROWNE
  • Publication number: 20200117625
    Abstract: Examples described herein relate to configuring an interrupt controller to gather zero or more interrupts of a first type and provide the zero or more interrupts of the first type to a first core after a threshold amount of time has elapsed. The interrupt controller is configured to transfer interrupts of a second type to a second core that executes at least one network protocol processing-related task. However, in some examples, the first core can perform any network protocol processing-related task. The first type of interrupts can be associated with faults that are correctable by an interrupt issuer or its delegate. The first core can be configured to perform a corrective action and acknowledge receipt of the group of interrupts or to merely acknowledge receipt of the group of interrupts but not perform a corrective action.
    Type: Application
    Filed: December 16, 2019
    Publication date: April 16, 2020
    Inventors: John J. BROWNE, Sunku RANGANATH, Jabir KANHIRA KADAVATHU, Shobhi JAIN, Emma L. FOLEY, Timothy VERRALL, John O'LOUGHLIN, Krzysztof KEPKA