Patents by Inventor John Kenney
John Kenney has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250121825Abstract: A system for controlling an adaptive cruise control system can include a processor and a memory. The memory can store an override ascertainment module, an intent ascertainment module, and an intent utilization module. The override ascertainment module can include instructions that cause the processor to determine, during an operation of the adaptive cruise control system, that an action, performed by an operator of an ego vehicle, is an override of the adaptive cruise control system. The intent ascertainment module can include instructions that cause the processor to determine, during the override, an intent of the operator to change a setting of a mechanism, of the adaptive cruise control system, to control a motion-related aspect of the ego vehicle, from a current setting to a preferred setting. The intent utilization module can include instructions that cause the processor to cause the adaptive cruise control system to utilize information about the intent.Type: ApplicationFiled: March 22, 2024Publication date: April 17, 2025Applicants: Toyota Motor Engineering & Manufacturing North America, Inc., Toyota Jidosha Kabushiki KaishaInventors: Amr Abdelraouf, Rohit Gupta, Kyungtae Han, Tomohiro Matsuda, Nicholas E. Merkel, Matthew J. Hill, Samanthule Nola, Onur Altintas, John Kenney
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Publication number: 20250119865Abstract: A method for positioning in a sidelink communication. The method includes detecting, by an anchor component, a presence of at least one user equipment; and activating, by the anchor component, a transmission of a positioning reference signal to the user equipment responsive to the detected presence of the at least one user equipment.Type: ApplicationFiled: November 23, 2024Publication date: April 10, 2025Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Taylan SAHIN, Torsten WILDSCHEK, John KENNEY, Takayuki SHIMIZU, Ling YU, Mikko SAILY
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Patent number: 12265376Abstract: There is disclosed herein programmable delay lines and control methods having glitch suppression. In particular, the programmable delay lines may include latches that are triggered based on a trigger event of an input signal (which is often an edge of the input signal). The programmable delay lines may include one or more latches coupled between capacitor and transistor subassemblies and the latches, where the latches cause a delay between the time the trigger event arrives at the capacitor and transistor subassemblies and the latches. The delay can prevent the latches from updating at the same time that the edge of the input signal arrives at the capacitor and transistor subassemblies, which can suppress glitches that can causes errors in operation.Type: GrantFiled: November 14, 2022Date of Patent: April 1, 2025Assignee: Analog Devices, Inc.Inventor: John Kenney
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Publication number: 20250106883Abstract: One example embodiment provides one or more of: measuring, via a user equipment (UE), sidelink received signal strength indicator (SL-RSSI) values and sidelink reference signal power received (SL-RSRP) values from a current window of a communication channel shared among a plurality of UEs, measuring, via the UE, the SL-RSRP values from a frequency-domain and a time-domain of a current window of a communication channel shared among the plurality of UEs, excluding a first subset of communication resources from a next window of the communication channel based on the RSSI values in the current window, excluding a first subset of communication resources from a next window of the communication channel based on the SL-RSRP values from a time-domain, excluding a second subset of communication resources from the next window of the communication channel based on the RSRP values, excluding a second subset of communication resources from the next window of the communication channel based on the SL-RSRP values from a freqType: ApplicationFiled: December 10, 2024Publication date: March 27, 2025Applicant: TOYOTA MOTOR ENGINEERING & MANUFACTURING NORTH AMERICA, INC.Inventors: Isfar Tariq, Takayuki Shimizu, Chang-Heng Wang, Hongsheng Lu, John Kenney
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Publication number: 20250106882Abstract: One example embodiment provides one or more of: measuring, via a user equipment (UE), sidelink received signal strength indicator (SL-RSSI) values and sidelink reference signal power received (SL-RSRP) values from a current window of a communication channel shared among a plurality of UEs, measuring, via the UE, the SL-RSRP values from a frequency-domain and a time-domain of a current window of a communication channel shared among the plurality of UEs, excluding a first subset of communication resources from a next window of the communication channel based on the RSSI values in the current window, excluding a first subset of communication resources from a next window of the communication channel based on the SL-RSRP values from a time-domain, excluding a second subset of communication resources from the next window of the communication channel based on the RSRP values, excluding a second subset of communication resources from the next window of the communication channel based on the SL-RSRP values from a freqType: ApplicationFiled: December 10, 2024Publication date: March 27, 2025Applicant: TOYOTA MOTOR ENGINEERING & MANUFACTURING NORTH AMERICA, INC.Inventors: Isfar Tariq, Takayuki Shimizu, Chang-Heng Wang, Hongsheng Lu, John Kenney
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Patent number: 12261608Abstract: Apparatus and methods for control and calibration of external oscillators are provided herein. In certain embodiments, an electronic oscillator system includes a semiconductor die and a controllable oscillator that is external to the semiconductor die. The oscillation frequency of the controllable oscillator is tuned by a first varactor and a second varactor. The semiconductor die includes a phase-locked loop (PLL) that provides fine tuning to the controllable oscillator by controlling the first varactor, and a calibration circuit that provides coarse tuning to the controllable oscillator by controlling the second varactor.Type: GrantFiled: December 7, 2021Date of Patent: March 25, 2025Assignee: Analog Devices, Inc.Inventors: Hyman Shanan, John Kenney
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Patent number: 12193044Abstract: One example embodiment provides one or more of: measuring, via a user equipment (UE), sidelink received signal strength indicator (SL-RSSI) values and sidelink reference signal power received (SL-RSRP) values from a current window of a communication channel shared among a plurality of UEs, measuring, via the UE, the SL-RSRP values from a frequency-domain and a time-domain of a current window of a communication channel shared among the plurality of UEs, excluding a first subset of communication resources from a next window of the communication channel based on the RSSI values in the current window, excluding a first subset of communication resources from a next window of the communication channel based on the SL-RSRP values from a time-domain, excluding a second subset of communication resources from the next window of the communication channel based on the RSRP values, excluding a second subset of communication resources from the next window of the communication channel based on the SL-RSRP values from a freqType: GrantFiled: February 25, 2022Date of Patent: January 7, 2025Assignee: TOYOTA MOTOR ENGINEERING & MANUFACTURING NORTH AMERICA, INC.Inventors: Isfar Tariq, Takayuki Shimizu, Chang-Heng Wang, Hongsheng Lu, John Kenney
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Patent number: 12169775Abstract: A vehicle includes one or more sensors configured to obtain raw data related to a scene, one or more processors, and machine readable instructions stored in one or more memory modules. The one machine readable instructions, when executed by the one or more processors, cause the vehicle to: process the raw data with a first neural network stored in the one or more memory modules to obtain a first prediction about the scene, transmit the raw data to a computing device external to the vehicle, receive a second prediction about the scene from the computing device in response to transmitting the raw data to the computing device, and determine an updated prediction about the scene based on a combination of the first prediction and the second prediction.Type: GrantFiled: October 8, 2020Date of Patent: December 17, 2024Assignee: Toyota Motor Engineering & Manufacturing North America, Inc.Inventors: Hongsheng Lu, Bin Cheng, Rui Guo, Onur Altintas, John Kenney
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Patent number: 11941648Abstract: The disclosure includes implementations for providing a recommendation to a driver of a second DSRC-equipped vehicle. The recommendation may describe an estimate of how long it would take the second DSRC-equipped vehicle to receive a roadside service from a drive-through business. A method according to some implementations may include receiving, by the second DSRC-equipped vehicle, a Dedicated Short Range Communication message (“DSRC message”) that includes path history data. The path history data may describe a path of a first DSRC-equipped vehicle over a plurality of different times while the first DSRC-equipped vehicle is located in a queue of the drive-through business. The method may include determining delay time data for the second DSRC-equipped vehicle based on the path history data for the first DSRC-equipped vehicle. The delay time data may describe the estimate. The method may include providing the recommendation to the driver. The recommendation may include the estimate.Type: GrantFiled: March 7, 2019Date of Patent: March 26, 2024Inventors: Gaurav Bansal, Hongsheng Lu, John Kenney, Toru Nakanishi
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Patent number: 11901898Abstract: A disclosed apparatus for accomplishing such a task may include (1) a circuit board incorporated into a module designed for insertion into slots of computing devices, (2) at least one conductive contact disposed on the circuit board, (3) a counter circuit disposed on the circuit board and communicatively coupled to the conductive contact, wherein the counter circuit comprises (A) a signal-change detector that detects signal changes as the module is inserted into one of the slots of the computing devices and (B) a counter device that maintains a dynamic count indicative of a number of times that the module has been inserted into one of the slots of the computing devices based at least in part on the signal changes, (4) a battery electrically coupled to the counter circuit, wherein the battery powers the counter device prior to the insertion. Various other apparatuses, systems, and methods are also disclosed.Type: GrantFiled: August 4, 2022Date of Patent: February 13, 2024Assignee: Juniper Networks, Inc.Inventors: John Kenney, Bo Mi, Ryan Holmes
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Publication number: 20230412175Abstract: Apparatus and methods for control and calibration of external oscillators are provided herein. In certain embodiments, an electronic oscillator system includes a semiconductor die and a controllable oscillator that is external to the semiconductor die. The oscillation frequency of the controllable oscillator is tuned by a first varactor and a second varactor. The semiconductor die includes a phase-locked loop (PLL) that provides fine tuning to the controllable oscillator by controlling the first varactor, and a calibration circuit that provides coarse tuning to the controllable oscillator by controlling the second varactor.Type: ApplicationFiled: December 7, 2021Publication date: December 21, 2023Inventors: Hyman Shanan, John Kenney
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Publication number: 20230276409Abstract: One example embodiment provides one or more of: measuring, via a user equipment (UE), sidelink received signal strength indicator (SL-RSSI) values and sidelink reference signal power received (SL-RSRP) values from a current window of a communication channel shared among a plurality of UEs, excluding a first subset of communication resources from a next window of the communication channel based on the SL-RSSI values in the current window, excluding a second subset of communication resources from the next window of the communication channel based on the SL-RSRP values, and selecting and reserving a resource(s) remaining in the next window of the communication channel after exclusion of the first and second subsets of communication resources from the next window.Type: ApplicationFiled: February 25, 2022Publication date: August 31, 2023Inventors: Isfar Tariq, Takayuki Shimizu, Chang-Heng Wang, Hongsheng Lu, John Kenney
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Publication number: 20230276482Abstract: One example embodiment provides one or more of: measuring, via a user equipment (UE), sidelink received signal strength indicator (SL-RSSI) values and sidelink reference signal power received (SL-RSRP) values from a current window of a communication channel shared among a plurality of UEs, measuring, via the UE, the SL-RSRP values from a frequency-domain and a time-domain of a current window of a communication channel shared among the plurality of UEs, excluding a first subset of communication resources from a next window of the communication channel based on the RSSI values in the current window, excluding a first subset of communication resources from a next window of the communication channel based on the SL-RSRP values from a time-domain, excluding a second subset of communication resources from the next window of the communication channel based on the RSRP values, excluding a second subset of communication resources from the next window of the communication channel based on the SL-RSRP values from a freqType: ApplicationFiled: February 25, 2022Publication date: August 31, 2023Inventors: Isfar Tariq, Takayuki Shimizu, Chang-Heng Wang, Hongsheng Lu, John Kenney
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Patent number: 11711200Abstract: Apparatus and methods for multiphase clock generation are provided herein. In certain embodiments, a multiphase clock generator includes a first clock buffer that generates a first output clock signal based on a first input clock signal, a second clock buffer that generates a second output clock signal based on a second input clock signal, and a first clock interpolation circuit that generates a third output clock signal based on interpolating the first input clock signal and the second input clock signal. The first clock interpolation circuit generates the third output clock signal based on multiplying the first input clock signal by a first adjustable current to generate a first multiplied current, multiplying the second input clock signal by a second adjustable current to generate a second multiplied current, combining the first multiplied current and the second multiplied current to generate a combined current, and integrating the combined current.Type: GrantFiled: December 16, 2021Date of Patent: July 25, 2023Assignee: Analog Devices, Inc.Inventors: Michael St. Germain, John Kenney
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Publication number: 20230198734Abstract: Apparatus and methods for multiphase clock generation are provided herein. In certain embodiments, a multiphase clock generator includes a first clock buffer that generates a first output clock signal based on a first input clock signal, a second clock buffer that generates a second output clock signal based on a second input clock signal, and a first clock interpolation circuit that generates a third output clock signal based on interpolating the first input clock signal and the second input clock signal. The first clock interpolation circuit generates the third output clock signal based on multiplying the first input clock signal by a first adjustable current to generate a first multiplied current, multiplying the second input clock signal by a second adjustable current to generate a second multiplied current, combining the first multiplied current and the second multiplied current to generate a combined current, and integrating the combined current.Type: ApplicationFiled: December 16, 2021Publication date: June 22, 2023Inventors: Michael St. Germain, John Kenney
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Patent number: 11680804Abstract: Methods and systems for verifying a state of a road. The system includes a sensor of a vehicle configured to detect sensor data associated with the road. The system also includes a memory of the vehicle configured to store map data. The system also includes an electronic control unit (ECU) of the vehicle connected to the sensor and configured to determine road data or maneuvering data associated with the road based on the sensor data, and update the map data with the determined road data or maneuvering data.Type: GrantFiled: December 2, 2019Date of Patent: June 20, 2023Assignee: TOYOTA MOTOR NORTH AMERICA, INC.Inventors: Michael C. Edwards, Jay Bartholomew, John Kenney, Jason Schell
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Patent number: 11676427Abstract: The disclosure describes embodiments for modifying a vehicle component of an ego vehicle based on ranging and misbehavior information determined from digital data included in a Vehicle-to-Everything (V2X) message. In some embodiments, a method includes generating Received Signal Strength (RSS) data describing an RSS value for the V2X message which is originated by a remote vehicle. The method includes determining range data corresponding to the RSS value describing a first range from the ego vehicle to the remote vehicle. The method includes determining that the remote vehicle is providing inaccurate sensor data (an example of misbehavior information) by comparing the first range to a second range which is described by the sensor data which is extracted from the V2X message. The method includes modifying an operation of the vehicle component so that the vehicle component does not consider the sensor data that is provided by the remote vehicle.Type: GrantFiled: February 12, 2019Date of Patent: June 13, 2023Inventors: Hongsheng Lu, John Kenney, Takayuki Shimizu
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Publication number: 20230134891Abstract: A disclosed apparatus for accomplishing such a task may include (1) a circuit board incorporated into a module designed for insertion into slots of computing devices, (2) at least one conductive contact disposed on the circuit board, (3) a counter circuit disposed on the circuit board and communicatively coupled to the conductive contact, wherein the counter circuit comprises (A) a signal-change detector that detects signal changes as the module is inserted into one of the slots of the computing devices and (B) a counter device that maintains a dynamic count indicative of a number of times that the module has been inserted into one of the slots of the computing devices based at least in part on the signal changes, (4) a battery electrically coupled to the counter circuit, wherein the battery powers the counter device prior to the insertion. Various other apparatuses, systems, and methods are also disclosed.Type: ApplicationFiled: August 4, 2022Publication date: May 4, 2023Inventors: John Kenney, Bo Mi, Ryan Holmes
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Publication number: 20230070085Abstract: There is disclosed herein programmable delay lines and control methods having glitch suppression. In particular, the programmable delay lines may include latches that are triggered based on a trigger event of an input signal (which is often an edge of the input signal). The programmable delay lines may include one or more latches coupled between capacitor and transistor subassemblies and the latches, where the latches cause a delay between the time the trigger event arrives at the capacitor and transistor subassemblies and the latches. The delay can prevent the latches from updating at the same time that the edge of the input signal arrives at the capacitor and transistor subassemblies, which can suppress glitches that can causes errors in operation.Type: ApplicationFiled: November 14, 2022Publication date: March 9, 2023Applicant: Analog Devices, Inc.Inventor: John KENNEY
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Patent number: 11526153Abstract: There is disclosed herein programmable delay lines and control methods having glitch suppression. In particular, the programmable delay lines may include latches that are triggered based on a trigger event of an input signal (which is often an edge of the input signal). The programmable delay lines may include one or more latches coupled between capacitor and transistor subassemblies and the latches, where the latches cause a delay between the time the trigger event arrives at the capacitor and transistor subassemblies and the latches. The delay can prevent the latches from updating at the same time that the edge of the input signal arrives at the capacitor and transistor subassemblies, which can suppress glitches that can causes errors in operation.Type: GrantFiled: November 9, 2020Date of Patent: December 13, 2022Assignee: Analog Devices, Inc.Inventor: John Kenney