Abstract: A matrix array display device has an array of pixels (10) on a substrate (50) which each have a display element (20), for example an electroluminescent display element, and associated control circuit including a storage capacitor (36) and a light sensing element (40) connected thereto for regulating charge stored on the capacitor and responsive, for example, to light emitted from the display element so as to regulate operation of the display element. The light sensing elements (40) comprise thin film semiconductor devices each having a strip of semiconductor material (52) with laterally-spaced, doped, contact regions (53, 54) and the associated storage capacitor (36) is formed by a conductive layer (58) extending substantially transversely of the strip over one contact region with intervening dielectric material.

Abstract: A display device has an array of pixels (10) comprising light emitting display elements (20), for example EL elements, carried on a substrate (50) and associated light sensing elements (40) responsive to light emitted by the display elements. The light sensing elements each comprise a gated photosensitive thin film device such as a TFT structure or a lateral gated pin device having a semiconductor layer (52) with contact regions (53, 54) laterally spaced on the substrate and separated by a gate controlled region (55). A part of the associated display element (20) extends over the gate controlled region with an electrode (70) of the display element serving as the gate of the photosensitive device thereby ensuring good optical coupling between the display element and the photosensitive device and enabling the gate to be appropriately biased. Such an arrangement enables, for example, the provision of electro-optic feedback control in the pixel in comparatively simple manner.

Abstract: A semiconductor memory device using silicon-rich amorphous silicon alloy material memory elements that are electrically programmable by means of current induced conductivity comprises a layer (10) of the alloy material on opposing sides of which sets of input and output contacts (16, 18) are provided, and discrete conductive elements (20) within the layer which serve as nodes and define programmable conductive paths between input and output contacts to create a three dimensional memory network. The conductive elements can be arranged at one or more levels within the thickness of the alloy layer and preferably are of defined shape forming a predetermined 2D array at each level.

Abstract: A thin film transistor (10) in an electronic device such as an active matrix display panel having an intrinsic amorphous silicon semiconductor layer (22) providing a channel region (23) between source and drain electrodes (14, 16) includes directly adjacent to the side of the semiconductor layer (22) remote from the gate electrode (25) at the channel region (23) a layer (20) of amorphous semiconductor material which has a high defect density and low conductivity that serves to provide recombination centres for photogenerated carriers. Leakage problems due to the photoconductive properties of the intrinsic semiconductor material are then reduced. Conveniently, an hydrogenated silicon rich amorphous silicon alloy (e.g. nitride etc) can be used for the recombination centre layer (20).

Abstract: In a flat panel display or other type of electron device, a thin-film electron emitter (51) and/or emitter array (50) is formed in a semiconductor film (10) of, for example, hydrogenated amorphous and/or microcrystalline Si, SiC.sub.x, SiN.sub.y, SiO.sub.x N.sub.y or the like. An injector electrode (14) forms a potential barrier (.phi..sub.B) with the semiconductor film (10) at a back major surface (12) of the film (10). A front electrode (15) serves for biasing an emission area (11a) of the front major surface (11) at a sufficiently positive potential (V.sub.15) with respect to the injector electrode (14) as to inject electrons (e) over the barrier (.phi..sub.B) in the operation of the emitter (51) while controlling the magnitude of an electron accumulation layer (Ne) in the semiconductor film (10) at the emission area (11a).

Abstract: A semiconductor memory device includes first and second conductive contact layers (12, 15) and an hydrogenated, silicon-rich, amorphous silicon alloy layer (14), particularly an amorphous silicon nitride or amorphous silicon carbide alloy, extending between the contact layers. A defect band is induced in the amorphous silicon layer which lowers the activation energy level for the transport of carriers through the structure by an amount that is selectable and determined by the defect band. The defect band is created by a programming process, for example, using current stressing or particle bombardment. A memory matrix array device is provided by forming a row and column array of such memory devices from common deposited layers on a common substrate with crossing sets of row and column conductors separated by a layer of the alloy material defining a memory device at each of their cross-over regions.

Abstract: An optical touch input device comprises an array of actively addressed sensing elements (18) for sensing a light input, e.g. from a light pen, each of which comprises a capacitor (25) which is charged periodically through operation of a switch device (24) and a discharge circuit, including a photosensitive device (28) and a further switch device (27) connected across the capacitor, which circuit in operation demonstrates an optical threshold characteristic whereby the capacitor (25) is discharged in response to the sensing elements being subjected to light which is at or above a predetermined intensity level so as to discriminate from ambient light. Elements written into are determined by detecting the charge stage of their capacitors. The sensing element array can be integrated with a matrix display device with the sensing elements (18) and display elements components (12) provided on a common support using thin film technology.

Abstract: A hot carrier transistor can be formed with semiconductor thin-film technology, for example hydrogenated amorphous silicon (a-Si:H) technology as used for large-area electronics devices. The emitter and collector regions (2 and 3) comprise hydrogenated amorphous semiconductor material (a-Si:H) adjoining an intermediate semiconductor-rich amorphous metal-semiconductor alloy layer (a-Si.sub.1-x M.sub.x :H) which provides the base region 1. The amorphous nature of the alloy layer (1) and its low percentage of metal M, e.g 5%, presents a range of quantum mechanical environments for the hot carriers (21) through the base region (1) with spatial variations of wavelength and effective mass (m*.sub.1, m*.sub.2). The current transport through this base region (1) will therefore be spatially self-selective in that the carriers (21) will tend to pass through those areas where there is a resonance between the wave function, the barrier heights (h1,h2) and the base width (x1,x2).

Abstract: A method of fabricating an active matrix display device having a matrix of display elements (12), particularly liquid crystal elements. An array of first electrodes (24) are connected to associated address conductors (20) through two-terminal non-linear devices (16), in which the first electrodes and address conductors are provided as separate planar arrays. Prefabricated, physically discrete non-linear devices (35), such as MIMs or punch through diodes, are arranged between the planar arrays electrically coupling respective first electrodes to associated address conductors. A set of display element second electrodes/address conductors (18) is provided as a further array spaced from the array of first electrodes with liquid crystal material (21, 61) disposed therebetween. The non-linear devices are distributed, possibly carried in a polymer film, in a quasi-random manner. Large area displays are possible without using extensive lithography.

Abstract: In an active matrix display device having an army of electro-optic, e.g. liquid crystal, display elements (12) which are each connected in series with a two-terminal non-linear device (15), such as a MIM type thin film diode, between associated row and column address conductors (16,17), and are driven by a circuit, (20,22) to produce a display effect by applying a selection signal to each row address conductor in turn and data signals to the column address conductors, a selection signal comprising a voltage pulse signal whose magnitude is increased gradually and in a controlled fashion to a maximum selection voltage amplitude is used so as to reduce the extent of ageing in the non-linear devices and differential ageing effects on display elements driven to different levels over a period of use by reducing peak currents flowing through the non-linear devices. The rising edge of the selection pulse signal is suitably shaped, for example by ramping or stepping, for this purpose.

Abstract: An active matrix liquid crystal display device in which an array of picture elements which include respective switching means, e.g. TFTs, are driven a row at a time by drive signals supplied via a set of row and a set of column address conductors. The device also includes an array of active addressed sensing elements each consisting of a photosensitive element, e.g. a thin film photoresistor or photodiode, a charge storage capacitor and a switching device, e.g. a TFT. The sensing element connected to respective row and column address conductors. The charge storage capacitors are periodically charged through operation of their associated switching devices by the drive signals and are selectively discharged via their associated photosensitive element when illuminated by, for example, a light pen.

Abstract: A first substrate (2) carries an electro-optic display (3) having a first array (4) of display elements (5) and conductors (12,13) for addressing individual display elements (5) to enable the display to display an image. A second substrate (6) carries a second array (7) of elements (8) addressable by conductors (9,10). Photosensitive elements (11) are associated with the conductors (9,10) for supplying, when illuminated, signals along the conductors (9,10) for accessing the elements (8) of the second array (7), the second substrate (6) being provided over the first substrate (2) so that the photosensitive elements (11) are associated with selected ones (5') of the display elements (5) for enabling the selected display elements (5a) to illuminate the photosensitive elements (11) allowing access of the elements (8) of the second array (7) to be controlled by the display (3) so that it is not necessary to provide separate drive circuitry for the second array.

Abstract: Body portions (36) of semiconductor crystalline silicon material of sufficient quality to form high-mobility TFTs (thin-film transistors) and other semiconductor devices of a driver circuit are formed by depositing on a substrate (14) a layer of insulating silicon-based non-stoichiometric compound material (32) and then converting this material (32) into the semiconductive crystalline material (36) by heating with an energy beam (40), for example from an excimer laser. The use of an energy beam (40) permits easy localization of the heating (and consequent conversion) both vertically and laterally. The deposition (e.g. by plasma-enhanced chemical vapour deposition) and the beam annealing can both be carried out without heating the substrate (14) to high temperatures, and so a glass or other low-cost substrate (14) can be used. An unconverted part (32a) underlying the crystalline silicon body portion (36) can form at least part of a gate insulator of the TFT.

Abstract: An opto-electronic memory system comprises a memory element (14) in which information is stored in an array of optically readable memory locations (17) and reading means comprising an electro-optic, e.g. liquid crystal, shutter arrangement (10) which is operable to scan the memory element with reading light and an array of linear light sensitive elements (18) disposed adjacent the output side of the shutter arrangement and extending in the scan direction, the light sensitive element array defining a reading surface remote from the shutter arrangement (10) on which the memory element (14) is disposed with the memory locations (17) in close proximity to the light sensitive elements (18) and being operable in a contact sensing mode to sense reading light reflected from the memory locations of the memory element according to the reflectance characteristics of the memory locations.

Abstract: The image sensor (1a) has a transparent substrate (2) supporting a two dimensional array (3) of photosensitive and switching elements (4) with switching signal conductors (5) and data signal conductors (6) connected to the photosensitive and switching elements (4) for enabling individual photosensitive elements to be accessed. The photosensitive and switching elements (4) and the conductors (5 and 6) are arranged such that at least half of the area of the image sensor is transparent during operation. Each photosensitive element is electrically coupled to a respective capacitor (7) for storing charge generated as a result of light being incident on the photosensitive element. The capacitors (7) are formed so as to be transparent and so as to occupy a significant part of the entire area of the array (3).

Abstract: An optical data processing device has successive light intensity modulating levels, each level including a matrix of cells (35), each cell having therein an element (31) of electrically controllable light transmissivity and a control device (32) which is responsive to signals supplied thereto to control the transmissivity of the element (31) in accordance with such signals. The matrix cells in at least one level also each include a light responsive element (34), such as a photodiode, for controlling the pattern of transmissivities at that level in accordance with the light received from the preceding level, thereby permitting optical as well as electrical modulation of the input image, formed at the first level. The final level (n) includes a display screen which, when an input light beam is incident on the first level, produces an output image corresponding to the input image as modified by the sequence of levels in accordance with the supplied data signals.

Abstract: An electro-optic memory system includes reading means comprising a planar array of parallel linear electro-optic, e.g. LC, light shutters (16) which are illuminated with parallel light (11) and a parallel, spaced, planar array of light sensing elements, (18) e.g. thin film photodiodes, extending at right angles to the light shutters with read-out regions (20) being defined at the intersections of the shutters and sensing elements. A memory element (14) comprising a two dimensional array of memory locations in which information is stored in the form of a light transmission characteristic is disposed between the shutter and sensing element arrays with the memory locations aligned with read-out regions. Rows of memory locations are optically read, one at a time, for example in sequence, by selective operation of the light shutters by a drive circuit (42) and electrical outputs (43,45) obtained from the sensing elements (18) according to the characteristics of the corresponding row of memory locations.

Abstract: A method of fabricating an array of MIM type devices together with associated address conductors and pad electrodes on a common support (11) suitable for use as a component in an active matrix display device, involves depositing a first, conductive, layer (30) and a second selectively etchable layer (31) in succession over the support, performing a photolithographic patterning process (35) to leave regions (32,33) of the layers determining eventual pad electrodes (25) and address conductors (28) with bridging portions (34), and thereafter performing further processing operations involving the deposition of further layers (36, 40, 41), including an insulating layer (40) and a further conductive layer (41), and the etching of particular layers, together with lift-off procedures, to define on the support an array of pad electrodes each connected to an address conductor through a MIM type device (10,45) at the region of the bridging portion.

Abstract: A transferred electron effect device has a semiconductor body with an active region (2) of n conductivity type formed of a semiconductor material having a relatively low mass, high mobility conduction band main minimum and at least one relatively high mass, low mobility conduction band satellite minimum, and an injection zone (3) adjoining the active region (2) for causing electrons to be emitted, under the influence of an applied electric field, from the injection zone (3) into the active region (2) with an energy comparable to that of the relatively high mass, low mobility, conduction band satellite minima of the active region.

Abstract: A MIM device is fabricated by depositing sequentially on a substrate (14) a first conductive layer (30), a thin layer of insulative material (32) of for example silicon oxynitride or silicon nitride. The first conductive layer is formed of anodisable material, e.g. tantalum, and following deposition of the insulative layer the structure is subjected to an anodisation process whereby anodic material (41,35), is grown at any pin holes (40) or weak regions in the insulative layer so as to repair such defects. A second conductive layer (34) is then formed. An array of MIM devices formed in this manner can be used in an active matrix addressed LCD panel.