Abstract: An array of MIM type devices carried on a support together with an array of electrodes and address conductors suitable for use in an active matrix display device is fabricated using only one mask by forming on the substrate (11) a multi-layer structure comprising a lower resistive layer (30), e.g. of a-Si, an insulating layer (31) e.g. of silicon nitride and an upper conductive layer (32) and performing a patterning process, involving an etching operation whereby regions of the structure are removed to leave portions, as determined by the mask, constituting the electrodes (25), the address conductors (28) and at least one bridging portion (34) between each electrode (25) and an associated conductor (28) and whereby a part of the conductive layer (32) at each bridging portion is removed so as to form a lateral MIM type device (!0) connecting each electrode to its address conductor.

Abstract: Large numbers of small sized, physically discrete, two-terminal non-linear devices, typically around 20 .mu.m across, are produced simultaneously, each exhibiting substantially identical physical and electrical properties by forming on the surface of a temporary support a multiple layer formation consisting of a series of thin film layers of selected materials and uniform thicknesses constituting a diode structure, for example a MIM type or p-n-p punch-through type structure; scribing the multiple layer formation in a regular pattern to define portions; and thereafter removing the support and separating the portions into physically discrete elements, each of which forms an individual non-linear device.

Abstract: In a picture display device with pixels (12) which are driven via active elements (15), non-uniformities in the electrical behaviour of the active elements are obviated by driving the device in a reset mode.

Abstract: A thin diode device comprises a diode structure (14), for example an amorphous silicon p-i-n structure, carried on a substrate (12), a pair of conductive layers (16,20) contacting the opposing sides of the structure, and passivating material surrounding the structure which comprises an insulating layer (22) adjacent the structure and a light-absorbing semi-insulating semiconductor layer (24), for example comprising amorphous silicon material, over the insulating layer to reduce photocurrent produced in the diode structure due to incident light. The diode devices are particularly suited for use in an active matrix addressed liquid crystal display device having an array of display elements (30), the devices serving as switches, for example in a diode ring configuration, connected in series between respective display element electrodes and associate address conductors (32).

Abstract: An active matrix liquid crystal display device includes on a first substrate (30) a row and column array of picture element electrodes (20), associated switching devices (11), e.g. a-Si or polysilicon TFTs, and sets of row and column address conductors (14,16) to which selection and data signals are applied respectively, the picture elements being driven a row at a time in sequence by scanning the row conductors with a selection signal. Each switching device (11) is provided with a metal light shield (45) extending over the active region of the device (11) which is connected (46) electrically to the row address conductor (14) adjacent the one to which the switching device is connected. Because the adjacent row conductor is at a reference potential for most of the time, parasitic capacitance effects due to the metal light shield are negligible.

Abstract: A liquid crystal display device of the active matrix kind having an array of picture elements (10) defined by opposing electrodes (34;45,14), carried on respective supporting plates (20,22) with switching elements (16), such as two terminal bidirectional diode structures, arranged serially between address lines (12) and one set of picture element, PE, electrodes on one plate, in which the one set of PE electrodes overlie the address lines with the switching elements disposed therebetween, thus allowing close packing of the elements. For transmissive mode operation the PE electrodes and address lines, and maybe the switching elements, are transparent. A high degree of fault tolerance is obtained by providing a plurality of switching elements for each picture element, and dividing each of the one set of PE electrodes into a plurality of sub-electrodes, each associated with a respective on or more switching elements. The switching elements may be capacitively coupled to the PE electrodes.

Abstract: A liquid crystal display device of the active matrix kind having an array of picture elements (10) defined by opposing electrodes (34;45,14), carried on respective supporting plates (20,22) with switching elements (16), such as two terminal bidirectional diode structures, arranged serially between address lines (12) and one set of picture element, PE, electrodes on one plate, in which the one set of PE electrodes overlie the address lines with the switching elements disposed therebetween, thus allowing close packing of the elements. For transmissive mode operation the PE electrodes and address lines, and maybe the switching elements, are transparent. A high degree of fault tolerance is obtained by providing a plurality of switching elements for each picture element, and dividing each of the one set of PE electrodes into a plurality of sub-electrodes, each associated with a respective one or more switching elements. The switching elements may be capacitively coupled to the PE electrodes.

Abstract: A matrix display system includes an active matrix display device (10), for example a liquid crystal device, having a column and row array of picture elements (12) defined by opposing electrodes (16,17) with associated switching elements (11), such as thin film transistors, which are selectively operable by switching signals supplied via row conductors (14) to apply data signals supplied via column conductors (15) to the picture elements. The picture elements (12) are arranged in groups of at least two with the picture elements of each group being addressed via one row conductor (14) and one column conductor (15) and their associated switching elements (11) being operable at respective different levels of the switching signal for selective control. In this way, the number of address conductors (14,15) required can be reduced, allowing for example higher picture element densities. The picture elements of each group may be from the same row or adjacent rows.

Abstract: Current flow through the base region of a hot charge-carrier transistor is by hot majority charge-carriers (i.e. hot electrons for a hot electron transistor) which are collected at a base-collector barrier. This barrier may be formed by a semiconductor region which is doped with an impurity of the opposite conductivity type (p type for a hot electron transistor) and which is sufficiently thin as to form a bulk unipolar diode with an adjacent part of the base region. In accordance with the invention, one or more layers of wider-bandgap semiconductor material (for example, gallium aluminum arsenide) are present within the collector region (for example, of gallium arsenide) to form one or possibly even a series of heterojunctions each providing an electric field which retards the hot charge-carriers in the collector region. The retarding field cools the hot charge-carriers after collection so reducing a tendency to create electron-hole pairs by ionization.

Abstract: In a semiconductor device (e.g. a fast switching Schottky diode) a metal-based layer forms separate areas of an active Schottky barrier between closely-spaced field-relief regions which provide the device with an improved voltage blocking characteristic. In order to restrict the flow of minority carriers into the adjacent body portion under forward bias, the dopant concentration of the field-relief regions at the surface where contacted by the metal-based layer is sufficiently low as to form a further Schottky barrier with the metal-based layer. This further barrier which is in series with the minority-carrier injecting p-n junctions of the field-relief regions is reverse-biased when the active barrier and p-n junction are forward biased so that the minority carrier injection is restricted by the leakage current across the further barrier.

Abstract: A hot-electron or hot-hole transistor includes a base region through which current flow is by hot majority charge carriers. The emitter-base barrier-forming means comprises a barrier region having a sufficiently large thickness and impurity concentration of the opposite conductivity type that the barrier region is at least over part of its thickness undepleted by the depletion layer or layers present at the emitter-base barrier at zero bias. The application of a bias voltage (V.sub.BE) between the base and emitter of the transistor is necessary to establish a supply of the hot majority carriers having energies above the base-collector barrier, and this improves the collection efficiency of the transistor. In one form the emitter-base barrier-forming means also comprises a Schottky contact. In another form the emitter comprises an ohmic contact. The supply of hot majority carriers may be established by avalanche or zener breakdown of the barrier region or by punch-through of the depletion layer(s).

Abstract: Current flow through the base region of a hot charge-carrier transistor is by hot majority charge-carriers (i.e. hot electrons for a hot electron transistor) which are injected into the base region at an emitter-base barrier region. This barrier region is doped with an impurity of the opposite conductivity type (p type for a hot electron transistor) and is sufficiently thin as to form a bulk unipolar diode with an adjacent part of the base region. In accordance with the invention, the emitter-base barrier region is of different bandgap semiconductor material (for example, gallium aluminum arsenide) compared with that (for example, gallium arsenide) of the base region so as to form a heterojunction. The barrier height of this barrier region is determined in part by the opposite-type doping and in part by the heterojunction and can be made large so as to increase the energy of the injected charge-carriers and hence the collector efficiency of the transistor.

Abstract: A semiconductor device, e.g. a lateral DMOS transistor or bipolar transistor, has a main current path (20) extending through a high resistivity body portion (1) of one conductivity type. A minority-carrier injector region (6) which may be of the opposite conductivity type is provided in the body portion (1) in the vicinity of the current path (20) and serves with an applied forward-bias to inject minority charge carriers (16) which are characteristic of the opposite conductivity type into the body portion (1) to modulate the conductivity of the current path (20). In accordance with the invention one or more further regions (8) of the opposite conductivity type are located in the part of the body portion (1) in the vicinity of the current path (20) and within a minority-carrier diffusion length of the injector region (6) and/or of each other.

Abstract: Current flow through the base region of a hot charge-carrier transistor is by hot majority charge-carriers of one conductivity type (i.e., hot electrons for a hot electron transistor) which are injected into the base region at an emitter-base carrier region. In accordance with the invention a low base resistance is achieved by forming the base region as alternate layers of semiconductor material (for example silicon) and metal-based material (for example epitaxial cobalt or nickel silicide) which has a higher conductivity than the semiconductor material. The base-collector barrier is adjoined by a semiconductor layer of the base region, and the (or each) metal-based layer in the vicinity of the emitter-base carrier and/or the base-collector barrier is sufficiently thin (for example about 1nm or less) to permit quantum mechanical tunnelling. This aids efficient transmission of the hot charge-carriers through the base region and over the base-collector barrier.

Abstract: A high-grain MESFET (i.e. a Schottky barrier FET) has a gate electrode present directly on a semiconductor body. A highly doped layer, which forms parts of the channel of the transistor, extends below the gate electrode between the source and drain regions respectively. A highly doped surface region of opposite conductivity type to the highly doped layer is present between the gate electrode and the highly doped layer. This surface region, which is so thin that it is fully depleted in the zero gate bias condition, raises the effective height of the Schottky barrier. The highly doped layer is so thin that it can support without breakdown an electric field greater than the critical field for avalanche breakdown of the semiconductor material for this layer. Thus, the doping concentration of the highly doped layer can be increased so that more charge can be depleted from it.

Abstract: Semiconductor devices including one or more gate-controlled unipolar hot-carrier transistors have a semiconductor barrier region located between laterally-separated first and second region portions of one conductivity type. The barrier region has a net doping concentration of the opposite conductivity type and is sufficiently thin such that the depletion layers formed at zero bias with both the first and second regions substantially merge together to deplete the barrier region of mobile charge carriers. Current flow between the first and second region is at least partially by thermionic emission of charge carriers of the one conductivity type across the barrier region at a major surface of the body. The transistor has a gate in the vicinity of the barrier region and capacitively coupled thereto (for example via a dielectric layer) so as to permit the thermionic emission current to be controlled by applying a voltage to the gate to adjust the effective barrier height of the barrier region.

Abstract: Separate areas of an active unipolar barrier, e.g. a Schottky barrier, of a semiconductor device are located between closely-spaced field-relief regions which provide the device with an improved voltage blocking characteristic. The flow of minority carriers into the adjacent body portion under forward bias is restricted by providing, at least at the areas of the field-relief regions, a layer of different material from that of the body portion and from that of the unipolar barrier-forming means. The layer of different material may form a high-impedance electrical connection with the field-relief regions, and/or it may form with the body portion a heterojunction such as, for example, a Schottky barrier of higher barrier height, a barrier between different band gap materials or a MIS structure, which heterojunction forms part of the field-relief regions.

Abstract: A semiconductor device, having an optically-sensitive barrier region which is substantially fully depleted at zero bias and in the absence of light, is switchable between a high voltage blocking state and a high current state by means of incident light. The barrier region contains a net impurity concentration of opposite conductivity type to that of first and second regions between which it is located and is divided laterally into plural areas located between deeper closely-spaced field-relief regions. In the absence of incident light and with reverse bias of the barrier region the device has a high voltage blocking characteristic due to depletion layers from neighboring field-relief regions merging together to reduce the electrostatic field below the barrier region.

Abstract: A unipolar hot-electron or hot-hole transistor has its base region and/or collection region electrically contacted and extended to the semiconductor body surface by a metal-silicide region which extends through a silicon surface region belonging to either the transistor emitter or the emitter-base barrier. The metal-silicide region forms an isolating Schottky barrier with an adjacent semiconductor portion. Preferably, the surface region is divided into separate first and second portions by the base-contacting metal-silicide region, with the emitter-base barrier and base-collector barrier terminating at one or more sides in this metal-silicide region. The isolating Schottky barriers are good quality unipolar diodes, thus avoiding minority charge carrier storage effects in these unipolar transistors, while the metal-silicide region can form good ohmic contacts to highly-conductive base and collector regions which typically comprise a high-doped semiconductor layer or a metal-silicide layer.

Abstract: An infrared radiation imaging device comprises a semiconductor body (1), for example of silicon, having a radiation-sensitive portion (2) in which charge-carriers (24) are generated on absorption of infrared radiation (4). The semiconductor body also includes a signal-processing portion in which the charge-carriers (24) are collected in a charge-transfer shift register, for example a surface-channel or buried-channel CCD. An electrical signal representative of the detected radiation is produced at an output (10) of the shift register. At least the radiation-sensitive portion (2) is depleted of free charge-carriers in the absence of the radiation (4). The semiconductor material of the signal-processing portion (3) has an energy band gap (E.sub.g) which is greater than the quantum energy of the detected infrared radiation (4). The radiation-sensitive portion (2) is of the same semiconductor material as the signal-processing portion (3) but comprises a plurality of alternating n-type and p-type layers.