Patents by Inventor John R. Dangler

John R. Dangler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190254177
    Abstract: A method and structure are provided for implementing stub-less printed circuit board (PCB) vias and custom interconnect through laser-excitation conductive track structures. Stub-less printed PCB vias are formed which terminate at desired signal layers by controlled laser excitation without stubs or the need to back-drill to remove such stubs.
    Type: Application
    Filed: April 24, 2019
    Publication date: August 15, 2019
    Inventors: Layne A. Berge, John R. Dangler, Matthew S. Doyle, Joseph Kuczynski, Thomas W. Liang, Manuel Orozco
  • Publication number: 20190254172
    Abstract: A circuit apparatus includes a first circuit feature upon a first insulator and a second circuit feature upon the first insulator. The first circuit feature includes a planarized surface and the second circuit feature includes an irregular surface. The first circuit feature and the second circuit feature may be formed from patterning a conductive sheet that is upon the first insulator. The conductive sheet includes an irregular surface and a planarized surface. Conductive sheet roughness is minimized in first regions thereof and is maintained in second regions thereof. Selectively planarizing portions of the conductive sheet allows for the utilization of lower cost rougher conductive sheets. The planarized surface allows for increased signal integrity and reduced insertion loss and the irregular surface allows for increased adhesion and enhancing reliability of the circuit apparatus.
    Type: Application
    Filed: April 29, 2019
    Publication date: August 15, 2019
    Inventors: Brian L. Carlson, John R. Dangler, Roger S. Krabbenhoft, Kevin A. Splittstoesser
  • Publication number: 20190220628
    Abstract: Tamper-respondent assemblies, electronic assembly packages, and methods of fabrication are provided which include multiple, discrete tamper-respondent sensors that overlap, at least in part, and facilitate defining a secure volume about one or more electronic components to be protected, such as an electronic assembly. The tamper-respondent sensors include a first tamper-respondent sensor and a second tamper-respondent sensor, which may be similarly constructed or differently constructed. In certain embodiments, the tamper-respondent sensors wrap, at least in part, over an electronic enclosure, and in other embodiments, the tamper-respondent sensors cover, at least in part, an inner surface of an electronic enclosure to facilitate defining a secure volume in association with a multilayer circuit board to which the electronic enclosure is mounted.
    Type: Application
    Filed: March 20, 2019
    Publication date: July 18, 2019
    Inventors: William L. BRODSKY, John R. DANGLER, Phillip Duane ISAACS, David C. LONG, Michael T. PEETS
  • Patent number: 10349532
    Abstract: A method and structure are provided for implementing stub-less printed circuit board (PCB) vias and custom interconnect through laser-excitation conductive track structures. Stub-less printed PCB vias are formed which terminate at desired signal layers by controlled laser excitation without stubs or the need to back-drill to remove such stubs.
    Type: Grant
    Filed: July 20, 2017
    Date of Patent: July 9, 2019
    Assignee: International Business Machines Corporation
    Inventors: Layne A. Berge, John R. Dangler, Matthew S. Doyle, Joseph Kuczynski, Thomas W. Liang, Manuel Orozco
  • Patent number: 10331915
    Abstract: Tamper-respondent assemblies, electronic assembly packages, and methods of fabrication are provided which include multiple, discrete tamper-respondent sensors that overlap, at least in part, and facilitate defining a secure volume about one or more electronic components to be protected, such as an electronic assembly. The tamper-respondent sensors include a first tamper-respondent sensor and a second tamper-respondent sensor, which may be similarly constructed or differently constructed. In certain embodiments, the tamper-respondent sensors wrap, at least in part, over an electronic enclosure, and in other embodiments, the tamper-respondent sensors cover, at least in part, an inner surface of an electronic enclosure to facilitate defining a secure volume in association with a multilayer circuit board to which the electronic enclosure is mounted.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: June 25, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: William L. Brodsky, John R. Dangler, Phillip Duane Isaacs, David C. Long, Michael T. Peets
  • Patent number: 10332243
    Abstract: A computing system for tampering detection for digital images is disclosed. The computing system uses a LTI filter to filter time series data representing images in one or both of two videos and/or a still image of a live photo captured by a camera. A causal relationship in time existed between the images in the two videos and the still image when they were captured by the camera. The computing system determines whether the filtered output data representing an image by using the LTI filter is causal. If the computing system determines that the filtered output data representing the image is non-causal, it asserts a signal indicating that the image has been modified after it was captured.
    Type: Grant
    Filed: December 12, 2016
    Date of Patent: June 25, 2019
    Assignee: International Business Machines Corporation
    Inventors: Layne A. Berge, John R. Dangler, Matthew S. Doyle, Thomas W. Liang, Manuel Orozco
  • Patent number: 10327329
    Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include an enclosure, an in-situ-formed tamper-detect sensor, and one or more flexible tamper-detect sensors. The enclosure encloses, at least in part, one or more electronic components to be protected, and the in-situ-formed tamper-detect sensor is formed in place over an inner surface of the enclosure. The flexible tamper-detect sensor(s) is disposed over the in-situ-formed tamper-detect sensor, such that the in-situ-formed tamper-detect sensor is between the inner surface of the enclosure and the flexible tamper-detect sensor(s). Together the in-situ-formed tamper-detect sensor and flexible tamper-detect sensor(s) facilitate defining, at least in part, a secure volume about the one or more electronic components.
    Type: Grant
    Filed: February 13, 2017
    Date of Patent: June 18, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: William L. Brodsky, James A. Busby, John R. Dangler, Silvio Dragone, Michael J. Fisher, David C. Long
  • Patent number: 10306753
    Abstract: Tamper-respondent assemblies and fabrication methods are provided which incorporate enclosure-to-circuit board protection. The tamper-respondent assemblies include a circuit board, and an enclosure mounted to the circuit board along an enclosure-to-board interface. The enclosure facilitates enclosing at least one electronic component coupled to the circuit board within a secure volume. A tamper-respondent electronic circuit structure facilitates defining the secure volume, and includes one or more tamper-detect circuits including at least one conductive trace disposed, at least in part, within the enclosure-to-board interface. The conductive trace(s) includes stress rise regions to facilitate tamper-detection at the enclosure-to-board interface. An adhesive is provided to secure the enclosure to the circuit board. The adhesive contacts, at least in part, the conductive trace(s) of the tamper-detect circuit(s) at the enclosure-to-board interface, including at the stress rise regions of the conductive trace(s).
    Type: Grant
    Filed: February 22, 2018
    Date of Patent: May 28, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kathleen Ann Fadden, James A. Busby, David C. Long, John R. Dangler, Alexandra Echegaray, Michael J. Fisher, William Santiago-Fernandez
  • Publication number: 20190157169
    Abstract: Embodiments of the invention include a dye and pry process for removing quad flat no-lead (QFN) packages and bottom termination components (BTC) from card assemblies. Aspects of the invention include immersing a semiconductor package assembly in a solution comprising dye and placing the immersed semiconductor package assembly under vacuum pressure. Vacuum conditions ensure that the dye solution is pulled into any cracks in the solder formed between the semiconductor package assembly and the QFN package or BTC. The package assembly is dried and a hole is drilled to expose a bottom surface of the QFN package or BTC. The QFN package or BTC is then removed by applying a force to the exposed bottom surface. The semiconductor package assembly can then be inspected for the dye to locate cracks.
    Type: Application
    Filed: January 23, 2019
    Publication date: May 23, 2019
    Inventors: Tim A. Bartsch, Jennifer Bennett, James D. Bielick, David J. Braun, John R. Dangler, Stephen M. Hugo, Theron L. Lewis, Timothy P. Younger
  • Patent number: 10271434
    Abstract: Methods of fabricating tamper-respondent assemblies provided which include a tamper-respondent electronic circuit structure. The tamper-respondent electronic circuit structure includes a tamper-respondent sensor. The tamper-respondent sensor includes, for instance, at least one flexible layer having opposite first and second sides, and circuit lines forming, at least in part, at least one tamper-detect network, such as one or more resistive networks. The circuit lines are disposed on at least one of the first side or the second side of the at least one flexible layer. At least one region of the tamper-respondent sensor is fabricated with increased susceptibility to damage from mechanical stress associated with a tamper event. The at least one region of increased susceptibility to damage facilitates detection of the tamper event by the tamper-respondent sensor.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: April 23, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: John R. Dangler, David C. Long, Michael T. Peets
  • Patent number: 10262907
    Abstract: Embodiments of the invention include a dye and pry process for removing quad flat no-lead (QFN) packages and bottom termination components (BTC) from card assemblies. Aspects of the invention include immersing a semiconductor package assembly in a solution comprising dye and placing the immersed semiconductor package assembly under vacuum pressure. Vacuum conditions ensure that the dye solution is pulled into any cracks in the solder formed between the semiconductor package assembly and the QFN package or BTC. The package assembly is dried and a hole is drilled to expose a bottom surface of the QFN package or BTC. The QFN package or BTC is then removed by applying a force to the exposed bottom surface. The semiconductor package assembly can then be inspected for the dye to locate cracks.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: April 16, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tim A. Bartsch, Jennifer Bennett, James D. Bielick, David J. Braun, John R. Dangler, Stephen M. Hugo, Theron L. Lewis, Timothy P. Younger
  • Patent number: 10257939
    Abstract: Methods of fabricating tamper-respondent electronic circuit structures and electronic assembly packages are provided which include, at least in part, a tamper-respondent sensor including one or more formed flexible layers of, for instance, a dielectric material, having opposite first and second sides, and circuit lines defining at least one resistive network. The circuit lines are disposed on at least one of the first side or the second side of the formed flexible layer(s). The formed flexible layer(s) with the circuit lines includes curvatures, and the circuit lines overlie, at least in part, the curvatures of the formed flexible layer(s). In certain embodiments, the formed flexible layer(s) may be one or more corrugated layers or one or more flattened, folded layers.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: April 9, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: John R. Dangler, Phillip Duane Isaacs, David C. Long
  • Publication number: 20190097302
    Abstract: A cryptographic printed circuit board (PCB) includes a patch antenna threat event detection layer and a resonant frequency monitoring component. The patch antenna threat event detection layer is embedded within a PCB layer stack of the cryptographic PCB and includes at least one antenna. The resonant frequency monitoring component is configured to monitor a resonant frequency associated with the at least one antenna and to trigger one or more tamper response operations responsive to detecting a resonant frequency shift.
    Type: Application
    Filed: September 22, 2017
    Publication date: March 28, 2019
    Inventors: LAYNE A. BERGE, JOHN R. DANGLER, MATTHEW S. DOYLE, THOMAS W. LIANG, MANUEL OROZCO
  • Patent number: 10230553
    Abstract: Embodiments of the present disclosure provide methods and apparatus for providing feed forward equalization to a communication line by providing a resistance and a capacitance to the communication line. The method includes determining the resistance based on a desired value of feed forward equalization to provide to a communication line, determining the capacitance based on the desired value of feed forward equalization to provide to the communication line, providing a layer of resistive material between a first conductor and a second conductor of the communication line, wherein a dimension of the layer of resistive material is determined based on the determined resistance and providing a layer of dielectric material between the first conductor and the second conductor, wherein a dimension of the layer of dielectric material is determined based on the determined capacitance.
    Type: Grant
    Filed: April 21, 2017
    Date of Patent: March 12, 2019
    Assignee: International Business Machines Corporation
    Inventors: Thomas W. Liang, Matthew S. Doyle, John R. Dangler, Manuel Orozco, Layne A. Berge
  • Publication number: 20190049750
    Abstract: An ophthalmic device is described that includes a frame and an optically active component comprising a bistable dielectric electroactive polymer. The bistable dielectric electroactive polymer changes shape when exposed to a sufficiently strong electric field and does not completely revert to its former shape when the electric field is deactivated. The refractive properties of the ophthalmic devices described herein are adjusted by exposing the devices to electric fields.
    Type: Application
    Filed: August 8, 2017
    Publication date: February 14, 2019
    Inventors: Layne A. BERGE, John R. DANGLER, Matthew S. DOYLE, Thomas W. LIANG, Manuel OROZCO
  • Publication number: 20190037687
    Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include at least one tamper-respondent sensor and a detector. The at least one tamper-respondent sensor includes conductive lines which form, at least in part, at least one tamper-detect network of the tamper-respondent sensor(s). In addition, the tamper-respondent sensor(s) includes at least one interconnect element associated with one or more conductive lines of the conductive lines forming, at least in part, the tamper-detect network(s). The interconnect element(s) includes at least one interconnect characteristic selected to facilitate obscuring a circuit lay of the at least one tamper-detect network. In operation, the detector monitors the tamper-detect network(s) of the tamper-respondent sensor(s) for a tamper event.
    Type: Application
    Filed: November 13, 2017
    Publication date: January 31, 2019
    Inventors: James A. BUSBY, John R. DANGLER, Michael J. FISHER, David C. LONG
  • Publication number: 20190037686
    Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include at least one tamper-respondent sensor and a detector. The at least one tamper-respondent sensor includes conductive lines which form, at least in part, at least one tamper-detect network of the tamper-respondent sensor(s). In addition, the tamper-respondent sensor(s) includes at least one interconnect element associated with one or more conductive lines of the conductive lines forming, at least in part, the tamper-detect network(s). The interconnect element(s) includes at least one interconnect characteristic selected to facilitate obscuring a circuit lay of the at least one tamper-detect network. In operation, the detector monitors the tamper-detect network(s) of the tamper-respondent sensor(s) for a tamper event.
    Type: Application
    Filed: July 25, 2017
    Publication date: January 31, 2019
    Inventors: James A. BUSBY, John R. DANGLER, Michael J. FISHER, David C. LONG
  • Publication number: 20190029123
    Abstract: A method and structure are provided for implementing stub-less printed circuit board (PCB) vias and custom interconnect through laser-excitation conductive track structures. Stub-less printed PCB vias are formed which terminate at desired signal layers by controlled laser excitation without stubs or the need to back-drill to remove such stubs.
    Type: Application
    Filed: July 20, 2017
    Publication date: January 24, 2019
    Inventors: Layne A. Berge, John R. Dangler, Matthew S. Doyle, Joseph Kuczynski, Thomas W. Liang, Manuel Orozco
  • Patent number: 10172239
    Abstract: Tamper-respondent electronic circuit structures, electronic assembly packages, and methods of fabrication are provided which include, at least in part, a tamper-respondent sensor. The tamper-respondent sensor includes one or more formed flexible layers of, for instance, a dielectric material, having opposite first and second sides, and circuit lines defining at least one resistive network. The circuit lines are disposed on at least one of the first side or the second side of the formed flexible layer(s). The formed flexible layer(s) with the circuit lines includes curvatures, and the circuit lines overlie, at least in part, the curvatures of the formed flexible layer(s). In certain embodiments, the formed flexible layer(s) may be one or more corrugated layers or one or more flattened, folded layers.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: January 1, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: John R. Dangler, Phillip Duane Isaacs, David C. Long
  • Patent number: 10150449
    Abstract: A method to reduce refreezing of meltable snow includes configuring a wiper arm to wipe the meltable snow from an ambient-facing surface of a window positioned on a vehicle. The method also includes configuring a sensor coupled to the wiper arm to gather and transmit a parameter on the vehicle and environment. The method also includes configuring a processor to receive the parameter, determine refreezability of the meltable snow based on the parameter, and define an action to be performed by the wiper arm.
    Type: Grant
    Filed: September 28, 2013
    Date of Patent: December 11, 2018
    Assignee: International Business Machines Corporation
    Inventors: John R. Dangler, Thomas D. Kidd