Abstract: The invention pertains to films comprising silicon, oxygen and carbon and the use of the films in integrated circuit technology, such as capacitor constructions, DRAM constructions, semiconductive material assemblies, etching processes, and methods for forming capacitors, DRAMs and semiconductive material assemblies.

Abstract: A method of metal doping a chalcogenide material includes forming a metal over a substrate. A chalcogenide material is formed on the metal. Irradiating is conducted through the chalcogenide material to the metal effective to break a chalcogenide bond of the chalcogenide material at an interface of the metal and chalcogenide material and diffuse at least some of the metal outwardly into the chalcogenide material. A method of metal doping a chalcogenide material includes surrounding exposed outer surfaces of a projecting metal mass with chalcogenide material. Irradiating is conducted through the chalcogenide material to the projecting metal mass effective to break a chalcogenide bond of the chalcogenide material at an interface of the projecting metal mass outer surfaces and diffuse at least some of the projecting metal mass outwardly into the chalcogenide material. In certain aspects, the above implementations are incorporated in methods of forming non-volatile resistance variable devices.

Abstract: An integrated circuit chip comprises a periphery portion and a memory portion. The memory portion includes a data storage layer and a logic layer formed underneath the data storage layer and is separated therefrom by an intermediate layer. A first conductive layer is formed within the intermediate layer to communicatively couple the periphery and memory portions of the integrated circuit chip, and a second conductive layer is formed within the intermediate layer to communicatively couple the periphery and memory portions of the integrated circuit chip. The first and second conductive layers provide addressing and data retrieval between the memory portion and the periphery portion.

Abstract: The invention relates to the fabrication of a resistance variable material cell or programmable metallization cell. The processes described herein can form a metal-rich metal chalcogenide, such as, for example, silver-rich silver selenide. Advantageously, the processes can form the metal-rich metal chalcogenide without the use of photodoping techniques and without direct deposition of the metal. For example, the process can remove selenium from silver selenide. One embodiment of the process implants oxygen to silver selenide to form selenium oxide. The selenium oxide is then removed by annealing, which results in silver-rich silver selenide. Advantageously, the processes can dope silver into a variety of materials, including non-transparent materials, with relatively high uniformity and with relatively precise control.

Abstract: A method of metal doping a chalcogenide material includes forming a metal over a substrate. A chalcogenide material is formed on the metal. Irradiating is conducted through the chalcogenide material to the metal effective to break a chalcogenide bond of the chalcogenide material at an interface of the metal and chalcogenide material and diffuse at least some of the metal outwardly into the chalcogenide material. A method of metal doping a chalcogenide material includes surrounding exposed outer surfaces of a projecting metal mass with chalcogenide material. Irradiating is conducted through the chalcogenide material to the projecting metal mass effective to break a chalcogenide bond of the chalcogenide material at an interface of the projecting metal mass outer surfaces and diffuse at least some of the projecting metal mass outwardly into the chalcogenide material. In certain aspects, the above implementations are incorporated in methods of forming non-volatile resistance variable devices.

Abstract: A method of depositing a silicon oxynitride spacer film on a gate stack in a semiconductor device involves contacting the gate stack with bistertiarybutylaminosilane (BTBAS), at least one nitrogen containing compound and oxygen (O2). The deposition is controlled to provide a wet etch rate for the deposited spacer film that is within the range of about 25 Angstroms per minute to less than or equal to about 1 Angstrom.

Abstract: The invention encompasses a method of forming a structure over a semiconductor substrate. A silicon dioxide containing layer is formed across at least some of the substrate. Nitrogen is formed within the silicon dioxide containing layer. Substantially all of the nitrogen within the silicon dioxide is at least 10 Å above the substrate. After the nitrogen is formed within the silicon dioxide layer, conductively doped silicon is formed on the silicon dioxide layer. The invention encompasses a method of forming a pair of transistors associated with a semiconductor substrate. First and second regions of the substrate are defined. A first oxide region is formed to cover the first region of the substrate, and to not cover the second region of the substrate. Nitrogen is formed within the first oxide region, and a first conductive layer is formed over the first oxide region. After the first conductive layer is formed, a second oxide region is formed over the second region of the substrate.

Abstract: A chalcogenide comprising material is formed to a first thickness over the first conductive electrode material. The chalcogenide material comprises AxBy. A metal comprising layer is formed to a second thickness over the chalcogenide material. The metal comprising layer defines some metal comprising layer transition thickness for the first thickness of the chalcogenide comprising material such that when said transition thickness is met or exceeded, said metal comprising layer when diffused within said chalcogenide comprising material transforms said chalcogenide comprising material from an amorphous state to a crystalline state. The second thickness being less than but not within 10% of said transition thickness. The metal is irradiated effective to break a chalcogenide bond of the chalcogenide material at an interface of the metal and chalcogenide material and diffuse at least some of the metal into the chalcogenide material.

Abstract: In one aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; and c) forming a photoresist over and against the barrier layer.

Abstract: In one aspect, the invention includes a method of forming a gated semiconductor assembly, comprising: a) forming a silicon nitride layer over and against a floating gate; and b) forming a control gate over the silicon nitride layer. In another aspect, the invention includes a method of forming a gated semiconductor assembly, comprising: a) forming a floating gate layer over a substrate; b) forming a silicon nitride layer over the floating gate layer, the silicon nitride layer comprising a first portion and a second portion elevationally displaced from the first portion, the first portion having a greater stoichiometric amount of silicon than the second portion; and c) forming a control gate over the silicon nitride layer.

Abstract: A method for reading and verifying the state of a memory cell during a write operation before writing allows a decision to be made whether to write to the cell or not based on the current state of the cell.

Abstract: The present invention provides an improved surface P-channel transistor and a method of making the same. A preferred embodiment of the method of the present invention includes providing a semiconductor substrate, forming a gate oxide layer over the semiconductor substrate, subjecting the gate oxide layer to a remote plasma nitrogen hardening treatment followed by an oxidative anneal, and forming a polysilicon layer over the resulting gate oxide layer. Significantly, the method of the present invention does not require nitrogen implantation through the polysilicon layer overlying the gate oxide and provides a surface P-channel transistor having a polysilicon electrode free of nitrogen and a hardened gate oxide layer characterized by a large concentration of nitrogen at the polysilicon electrode/gate oxide interface and a small concentration of nitrogen at the gate oxide/semiconductor substrate interface.

Abstract: The invention encompasses a method of forming silicon nitride on a silicon-oxide-comprising material. The silicon-oxide-comprising material is exposed to activated nitrogen species from a nitrogen-containing plasma to introduce nitrogen into an upper portion of the material. The nitrogen is thermally annealed within the material to bond at least some of the nitrogen to silicon proximate the nitrogen. After the annealing, silicon nitride is chemical vapor deposited on the nitrogen-containing upper portion of the material. The invention also encompasses a method of forming a transistor device. A silicon-oxide-comprising layer is formed over a substrate. The silicon-oxide-comprising layer is exposed to nitrogen from a nitrogen-containing plasma to introduce nitrogen into an upper portion of the layer. The nitrogen is thermally annealed within the layer to bond at least some of the nitrogen silicon proximate the nitrogen.

Abstract: A semiconductor processing method includes forming an antireflective coating comprising Ge and Se over a substrate to be patterned. Photoresist is formed over the antireflective coating. The photoresist is exposed to actinic radiation effective to pattern the photoresist. The antireflective coating reduces reflection of actinic radiation during the exposing than would otherwise occur under identical conditions in the absence of the antireflective coating. After the exposing, the substrate is patterned through openings in the photoresist and the antireflective coating using the photoresist and the antireflective coating as a mask. In one implementation, after patterning the substrate, the photoresist and the antireflective coating are chemically etched substantially completely from the substrate using a single etching chemistry.

Abstract: The invention encompasses a method of forming silicon nitride on a silicon-oxide-comprising material. The silicon-oxide-comprising material is exposed to activated nitrogen species from a nitrogen-containing plasma to introduce nitrogen into an upper portion of the material. The nitrogen is thermally annealed within the material to bond at least some of the nitrogen to silicon proximate the nitrogen. After the annealing, silicon nitride is chemical vapor deposited on the nitrogen-containing upper portion of the material. The invention also encompasses a method of forming a transistor device. A silicon-oxide-comprising layer is formed over a substrate. The silicon-oxide-comprising layer is exposed to nitrogen from a nitrogen-containing plasma to introduce nitrogen into an upper portion of the layer. The nitrogen is thermally annealed within the layer to bond at least some of the nitrogen silicon proximate the nitrogen.

Abstract: The invention includes a method of forming a DRAM cell. A first substrate is formed to include first DRAM sub-structures separated from one another by an insulative material. A second semiconductor substrate including a monocrystalline material is bonded to the first substrate. After the bonding, second DRAM sub-structures are formed in electrical connection with the first DRAM sub-structures. The invention also includes a semiconductor structure which includes a capacitor structure, and a first substrate defined to encompass the capacitor structure. The semiconductor structure further includes a monocrystalline silicon substrate bonded to the first substrate and over the capacitor structure. Additionally, the semiconductor structure comprises a transistor gate on the monocrystalline silicon substrate and operatively connected with the capacitor structure to define a DRAM cell.

Abstract: A method of metal doping a chalcogenide material includes forming a metal over a substrate. A chalcogenide material is formed on the metal. Irradiating is conducted through the chalcogenide material to the metal effective to break a chalcogenide bond of the chalcogenide material at an interface of the metal and chalcogenide material and diffuse at least some of the metal outwardly into the chalcogenide material. A method of metal doping a chalcogenide material includes surrounding exposed outer surfaces of a projecting metal mass with chalcogenide material. Irradiating is conducted through the chalcogenide material to the projecting metal mass effective to break a chalcogenide bond of the chalcogenide material at an interface of the projecting metal mass outer surfaces and diffuse at least some of the projecting metal mass outwardly into the chalcogenide material. In certain aspects, the above implementations are incorporated in methods of forming non-volatile resistance variable devices.

Abstract: The invention pertains to films comprising silicon, oxygen and carbon and the use of the films in integrated circuit technology, such as capacitor constructions, DRAM constructions, semiconductive material assemblies, etching processes, and methods for forming capacitors, DRAMs and semiconductive material assemblies.

Abstract: A method of metal doping a chalcogenide material includes forming a metal over a substrate. A chalcogenide material is formed on the metal. Irradiating is conducted through the chalcogenide material to the metal effective to break a chalcogenide bond of the chalcogenide material at an interface of the metal and chalcogenide material and diffuse at least some of the metal outwardly into the chalcogenide material. A method of metal doping a chalcogenide material includes surrounding exposed outer surfaces of a projecting metal mass with chalcogenide material. Irradiating is conducted projecting metal mass outer surfaces and diffuse at least some of the projecting metal mass outwardly into the chalcogenide material. In certain aspects, the above implementations are incorporated in methods of forming non-volatile resistance variable devices.

Abstract: The present invention provides an improved surface P-channel transistor and a method of making the same. A preferred embodiment of the method of the present invention includes providing a semiconductor substrate, forming a gate oxide layer over the semiconductor substrate, subjecting the gate oxide layer to a remote plasma nitrogen hardening treatment followed by an oxidative anneal, and forming a polysilicon layer over the resulting gate oxide layer. Significantly, the method of the present invention does not require nitrogen implantation through the polysilicon layer overlying the gate oxide and provides a surface P-channel transistor having a polysilicon electrode free of nitrogen and a hardened gate oxide layer characterized by a large concentration of nitrogen at the polysilicon electrode/gate oxide interface and a small concentration of nitrogen at the gate oxide/semiconductor substrate interface.