Abstract: A support structure for use in fan-out wafer level packaging is provided that includes, a silicon handler wafer having a first surface and a second surface opposite the first surface, a release layer is located above the first surface of the silicon handler wafer, and a layer selected from the group consisting of an adhesive layer and a redistribution layer is located on a surface of the release layer. After building-up a fan-out wafer level package on the support structure, infrared radiation is employed to remove (via laser ablation) the release layer, and thus remove the silicon handler wafer from the fan-out wafer level package.

Abstract: Small size chip handling and electronic component integration are accomplished using handle fixturing to transfer die or other electronic components from a full area array to a targeted array. Area array dicing of a thinned device wafer on a handle wafer/panel may be followed by selective or non-selective de-bonding of targeted die or electronic components from the handle wafer and optional attachment to a carrier such as a transfer head or tape. Alignment fiducials may facilitate precision alignment of the transfer head or tape to the device wafer and subsequently to the targeted array. Alternatively, the dies or other electronic elements are transferred selectively from either a carrier or the device wafer to the targeted array.

Abstract: Small size chip handling and electronic component integration are accomplished using handle fixturing to transfer die or other electronic components from a full area array to a targeted array. Area array dicing of a thinned device wafer on a handle wafer/panel may be followed by selective or non-selective de-bonding of targeted die or electronic components from the handle wafer and optional attachment to a carrier such as a transfer head or tape. Alignment fiducials may facilitate precision alignment of the transfer head or tape to the device wafer and subsequently to the targeted array. Alternatively, the dies or other electronic elements are transferred selectively from either a carrier or the device wafer to the targeted array.

Abstract: A multi-layer wafer and method of manufacturing such wafer are provided. The method includes applying at least one stress compensating polymer layer to at least one of two heterogeneous wafers and low temperature bonding the two heterogeneous wafers to bond the stress compensating polymer layer to the other of the two heterogeneous wafers to form a multi-layer wafer pair. The multi-layer wafer comprises two heterogeneous wafers, at least one of the heterogeneous wafers having a stress compensating polymer layer. The two heterogeneous wafers are low temperature bonded together to bond the stress compensating polymer layer to the other of the two heterogeneous wafers.

Abstract: An apparatus includes one or more memories storing computer readable code and processor(s). The processor(s), in response to loading and executing the computer readable code, cause the apparatus to perform operations including receiving electrocardiogram data from an electrocardiogram sensor. The electrocardiogram data includes data from an electrocardiogram from a person. The operations also include receiving pulse wave data from one or more pulse wave pressure sensors. The pulse wave data includes data from one or more pulse waves from the person. The operations further include determining blood pressure using the electrocardiogram data or the pulse wave data from the chest and the pulse wave data from the wrist or finger, and outputting an indication of the blood pressure. Another apparatus uses pulse wave data from two pulse wave sensors (e.g., pulse wave pressure sensor(s) and/or PPG sensor(s)) and blood pressure determinations are made using these pulse wave data.

Abstract: A method of forming an electrical device is provided that includes forming microprocessor devices on a microprocessor die; forming memory devices on an memory device die; forming component devices on a component die; and forming a plurality of packing devices on a packaging die. Transferring a plurality of each of said microprocessor devices, memory devices, component devices and packaging components to a supporting substrate, wherein the packaging components electrically interconnect the memory devices, component devices and microprocessor devices in individualized groups. Sectioning the supporting substrate to provide said individualized groups of memory devices, component devices and microprocessor devices that are interconnected by a packaging component.

Abstract: Small size chip handling and electronic component integration are accomplished using handle fixturing to transfer die or other electronic components from a full area array to a targeted array. Area array dicing of a thinned device wafer on a handle wafer/panel may be followed by selective or non-selective de-bonding of targeted die or electronic components from the handle wafer and optional attachment to a carrier such as a transfer head or tape. Alignment fiducials may facilitate precision alignment of the transfer head or tape to the device wafer and subsequently to the targeted array. Alternatively, the dies or other electronic elements are transferred selectively from either a carrier or the device wafer to the targeted array.

Abstract: A semiconductor structure includes a thin-film device layer, an optoelectronic device disposed in the thin-film device layer, and a surrogate substrate permanently attached to the thin film device layer. The optoelectronic device is excitable by light at an application wavelength. The surrogate substrate is optically transparent and has a thermal conductivity of at least 300 W/m-K. The surrogate substrate has a volume of substrate removed therefrom to form a via. Light passes through the via and at least some of the surrogate substrate prior to reaching the optoelectronic device.

Abstract: An electro-optical module assembly is provided that includes a flexible substrate having a first surface and a second surface opposite the first surface, wherein the flexible substrate contains an opening located therein that extends from the first surface to the second surface. An optical component is located on the second surface of the flexible substrate and is positioned to have a surface exposed by the opening. At least one electronic component is located on a first portion of the first surface of the flexible substrate, and at least one micro-energy source is located on a second portion of the first surface of the flexible substrate.

Abstract: A method includes forming one or more vias in a substrate, forming a first photoresist layer on a top surface of the substrate and a second photoresist layer on a bottom surface of the substrate, patterning the first photoresist layer and the second photoresist layer to remove at least a first portion of the first photoresist layer and at least a second portion of the second photoresist layer, filling the one or more vias, the first portion and the second portion with solder material using injection molded soldering, and removing remaining portions of the first photoresist layer and the second photoresist layer.

Abstract: A bonded structure contains a substrate containing at least one feature, the substrate having a top surface; a first release layer overlying the top surface of the substrate, the first release layer being absorptive of light having a first wavelength for being decomposed by the light; an adhesive layer overlying the first release layer, and a second release layer overlying the adhesive layer. The second release layer is absorptive of light having a second wavelength for being decomposed by the light having the second wavelength. The bonded structure further contains a handle substrate that overlies the second release layer, where the handle substrate is substantially transparent to the light having the first wavelength and the second wavelength. Also disclosed is a debonding method to process the bonded structure to remove and reclaim the adhesive layer for re-use. In another embodiment a multi-step method optically cuts and debonds a bonded structure.

Abstract: A method of forming an electrical device is provided that includes forming microprocessor devices on a microprocessor die; forming memory devices on an memory device die; forming component devices on a component die; and forming a plurality of packing devices on a packaging die. Transferring a plurality of each of said microprocessor devices, memory devices, component devices and packaging components to a supporting substrate, wherein the packaging components electrically interconnect the memory devices, component devices and microprocessor devices in individualized groups. Sectioning the supporting substrate to provide said individualized groups of memory devices, component devices and microprocessor devices that are interconnected by a packaging component.

Abstract: Examples of techniques for an integrated wafer-level processing system are disclosed. In one example implementation according to aspects of the present disclosure, an integrated wafer-level processing system includes a memory wafer and a processing element connected to the memory wafer via a data connection.

Abstract: A device wafer is bonded to a handle by a low temperature adhesive bond material that includes a suspended polymer with glass transition temperature greater than room temperature and a diluent polymer that is curable to provide a thermoset polymer upon exposure to ultraviolet radiation, x-ray radiation and/or thermal treatments at low temperature. The suspended polymer and the diluent polymer are mixed to a consistency such that before curing of the diluent polymer the low temperature adhesive bond material exhibits adhesion strength less than 10 Newtons per square centimeter (N/cm2), and after curing of the diluent polymer the low temperature adhesive bond material exhibits adhesion strength not less than about 40 N/cm2.

Abstract: According to an embodiment of the present invention, a structure for a strain gauge device is provided. The structure comprises a layer of strain gauge material and one or more contact pads positioned directly on the layer of strain gauge material. The structure further comprises a multiplexer, measuring device, amplifier, analog to digital converter, microcontroller, and wireless adapter. According to the structure, the multiplexer selects a given contact pad pair of the one or more contact pad pairs, the measuring device measures signal generated by the layer of strain gauge material between the given contact pad pair, the amplifier amplifies the measured signal, the analog to digital converter converts the amplified analog signal to a digital signal, the microcontroller processes the digital signal, and the wireless adapter transmits the processed digital signal. In addition, the structure may further comprise a battery to provide energy to the structure.

Abstract: Various embodiments process semiconductor devices. In one embodiment, a release layer is applied to a handler. The at least one singulated semiconductor device is bonded to the handler. The at least one singulated semiconductor device is packaged while it is bonded to the handler. The release layer is ablated by irradiating the release layer through the handler with a laser. The at least one singulated semiconductor device is removed from the transparent handler after the release layer has been ablated.

Abstract: A digital biomedical device includes a substrate forming a reservoir, a membrane comprising a first layer and a second layer having a strain therebetween, the membrane sealing the reservoir, and a controller configured to activate the membrane and release at least a portion of the strain causing the membrane curl and open the reservoir.

Abstract: Examples of techniques for an integrated wafer-level processing system are disclosed. In one example implementation according to aspects of the present disclosure, an integrated wafer-level processing system includes a memory wafer and a processing element connected to the memory wafer via a data connection.

Abstract: Structures and methods are provided for temporarily bonding handler wafers to device wafers using bonding structures that include one or more releasable layers which are laser-ablatable using mid-wavelength infrared radiation.

Abstract: Lenses and methods for adjusting the focus of a lens include dividing multiple light sensors in a lens into four quadrants. A position of the lens relative to occlusion along a top and bottom edge of the lens is determined based on numbers of bits in respective bit sequences from light sensors in respective regions of the lens. An optimal focal length for the lens is determined based on the position of the lens. The focal length of the lens is adjusted to match the optimal focal length.