Abstract: A semiconductor device having a planar III-N semiconductor layer includes a substrate including a wafer and a buffer layer of a buffer material different from a material of the wafer, the buffer layer having a growth surface, an array of nanostructures epitaxially grown from the growth surface, a continuous planar layer formed by coalescence of upper parts of the nanostructures at an elevated temperature T, where the number of lattice cells spanning a center distance between adjacent nanostructures are different at the growth surface and at the coalesced planar layer, and a growth layer epitaxially grown on the planar layer.

Abstract: A gas phase nanowire growth apparatus including a reaction chamber, a first input and a second input. The first input is located concentrically within the second input and the first and second input are configured such that a second fluid delivered from the second input provides a sheath between a first fluid delivered from the first input and a wall of the reaction chamber.

Abstract: A semiconductor device including a nanostructure, including a planar layer of a III-nitride semiconductor crystal, which layer includes an array of epitaxially grown nanowire structures, and semiconductor material which is redistributed from said nanowire structures in a reformation step after epitaxial growth, arranged to fill out a spacing between the nanowire structures, where the array of nanowire structures and the semiconductor material form a coherent layer.

Abstract: The device according to the invention comprises a nanostructured LED with a first group of nanowires protruding from a first area of a substrate and a contacting means in a second area of the substrate. Each nanowire of the first group of nanowires comprises a p-i-n-junction and a top portion of each nanowire or at least one selection of nanowires is covered with a light-reflecting contact layer. The contacting means of the second area is in electrical contact with the bottom of the nanowires, the light-reflecting contact layer being in electrical contact with the contacting means of the second area via the p-i-n-junction. Thus when a voltage is applied between the contacting means of the second area and the light-reflecting contact layer, light is generated within the nanowire. On top of the light-reflecting contact layer, a first group of contact pads for flip-chip bonding can be provided, distributed and separated to equalize the voltage across the layer to reduce the average serial resistance.

Abstract: A semiconductor device having a planar III-N semiconductor layer includes a substrate including a wafer and a buffer layer of a buffer material different from a material of the wafer, the buffer layer having a growth surface, an array of nanostructures epitaxially grown from the growth surface, a continuous planar layer formed by coalescence of upper parts of the nanostructures at an elevated temperature T, where the number of lattice cells spanning a center distance between adjacent nanostructures are different at the growth surface and at the coalesced planar layer, and a growth layer epitaxially grown on the planar layer.

Abstract: A nanowire molecular sensor, and a molecular detection system, comprising a nanowire waveguide (30), a nanowire sidewall (51) functionalized in order to attach a molecule (54), and light emissive point sources (52), wherein the amount of light emitted at an end (53) of the waveguide is dependent of the amount of specific molecules attached to the sidewall of the nanowire. A method employing said sensor may be used for single cell detection and analysis.

Abstract: A method for fabrication of an InGaN semiconductor template, comprising growing an InGaN pyramid having inclined facets on a semiconductor substrate; processing the pyramid by removing semiconductor material to form a truncated pyramid having a first upper surface; growing InGaN, over the first upper surface, to form an InGaN template layer having a c-plane crystal facet forming a top surface. The InGaN semiconductor template is suitable for further fabrication of semiconductor devices, such as microLEDs configured to emit red, green or blue light.

Abstract: A semiconductor device having a planar III-N semiconductor layer, comprising a substrate comprising a wafer (101) and a buffer layer (102), of a buffer material different from a material of the wafer, the buffer layer having a growth surface (1021); an array of nano structures (1010) epitaxially grown from the growth surface; a continuous planar layer (1020) formed by coalescence of upper parts of the nano structures at an elevated temperature T, wherein the number of lattice cells spanning a center distance between adjacent nano structures are different at the growth surface and at the coalesced planar layer; a growth layer (1030), epitaxially grown on the planar layer (1020).

Abstract: A nanowire molecular sensor, and a molecular detection system, comprising a nanowire waveguide (30), a nanowire sidewall (51) functionalized in order to attach a molecule (54), and light emissive point sources (52), wherein the amount of light emitted at an end (53) of the waveguide is dependent of the amount of specific molecules attached to the sidewall of the nanowire. A method employing said sensor may be used for single cell detection and analysis.

Abstract: A method of making a semiconductor device, comprising: forming a plurality of semiconductor seeds of a first III-nitride material through a mask provided over a substrate; growing a second III-nitride semiconductor material; planarizing the grown second semiconductor material to form a plurality of discrete base elements having a substantially planar upper surface. Preferably the step of planarizing involves performing atomic distribution of III type atoms of the grown second semiconductor material under heating to form the planar upper surface, and without supply of III type atoms is carried out during the step of planarization.

Abstract: A semiconductor device including a nanostructure, including a planar layer of a III-nitride semiconductor crystal, which layer includes an array of epitaxially grown nanowire structures, and semiconductor material which is redistributed from said nanowire structures in a reformation step after epitaxial growth, arranged to fill out a spacing between the nanowire structures, where the array of nanowire structures and the semiconductor material form a coherent layer.

Abstract: A method of making a semiconductor device, comprising: forming a plurality of semiconductor seeds of a first Ill-nitride material through a mask provided over a substrate; growing a second Ill-nitride semiconductor material on the seeds; planarizing the grown second semiconductor material to form a cohesive structure from the plurality of discrete base elements, said cohesive structure having a substantially planar upper surface.

Abstract: A method of making a semiconductor device, comprising: forming a plurality of semiconductor seeds of a first III-nitride material through a mask provided over a substrate; growing a second III-nitride semiconductor material; planarizing the grown second semiconductor material to form a plurality of discrete base elements having a substantially planar upper surface. Preferably the step of planarizing involves performing atomic distribution of III type atoms of the grown second semiconductor material under heating to form the planar upper surface, and without supply of III type atoms is carried out during the step of planarization.

Abstract: A gas phase nanowire growth apparatus including a reaction chamber, a first input and a second input. The first input is located concentrically within the second input and the first and second input are configured such that a second fluid delivered from the second input provides a sheath between a first fluid delivered from the first input and a wall of the reaction chamber.

Abstract: A semiconductor device including a nanostructure, comprising a planar layer (1020) of a Ill-nitride semiconductor crystal, which layer includes an array of epitaxially grown nanowire structures (1010), and semiconductor material (1016) which is redistributed from said nanowire structures in a reformation step after epitaxial growth, arranged to fill out a spacing between the nanowire structures, wherein the array of nanowire structures and the semiconductor material form a coherent layer.

Abstract: A gas phase nanowire growth apparatus including a reaction chamber, a first input and a second input. The first input is located concentrically within the second input and the first and second input are configured such that a second fluid delivered from the second input provides a sheath between a first fluid delivered from the first input and a wall of the reaction chamber.

Abstract: A semiconductor device having a planar III-N semiconductor layer, comprising a substrate comprising a wafer (101) and a buffer layer (102), of a buffer material different from a material of the wafer, the buffer layer having a growth surface (1021); an array of nano structures (1010) epitaxially grown from the growth surface; a continuous planar layer (1020) formed by coalescence of upper parts of the nano structures at an elevated temperature T, wherein the number of lattice cells spanning a center distance between adjacent nano structures are different at the growth surface and at the coalesced planar layer; a growth layer (1030), epitaxially grown on the planar layer (1020).

Abstract: A semiconductor device including a nanostructure, comprising a planar layer (1020) of a Ill-nitride semiconductor crystal, which layer includes an array of epitaxially grown nanowire structures (1010), and semiconductor material (1016) which is redistributed from said nanowire structures in a reformation step after epitaxial growth, arranged to fill out a spacing between the nanowire structures, wherein the array of nanowire structures and the semiconductor material form a coherent layer.

Abstract: A gas phase nanowire growth apparatus including a reaction chamber, a first input and a second input.

Abstract: The device according to the invention comprises a nanostructured LED with a first group of nanowires protruding from a first area of a substrate and a contacting means in a second area of the substrate. Each nanowire of the first group of nanowires comprises a p-i-n-junction and a top portion of each nanowire or at least one selection of nanowires is covered with a light-reflecting contact layer. The contacting means of the second area is in electrical contact with the bottom of the nanowires, the light-reflecting contact layer being in electrical contact with the contacting means of the second area via the p-i-n-junction. Thus when a voltage is applied between the contacting means of the second area and the light-reflecting contact layer, light is generated within the nanowire. On top of the light-reflecting contact layer, a first group of contact pads for flip-chip bonding can be provided, distributed and separated to equalize the voltage across the layer to reduce the average serial resistance.