Patents by Inventor Jonas Ohlsson

Jonas Ohlsson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9653286
    Abstract: GaN based nanowires are used to grow high quality, discreet base elements with c-plane top surface for fabrication of various semiconductor devices, such as diodes and transistors for power electronics.
    Type: Grant
    Filed: February 12, 2013
    Date of Patent: May 16, 2017
    Assignee: HEXAGEM AB
    Inventors: Jonas Ohlsson, Mikael Bjork
  • Patent number: 9610456
    Abstract: A device including at least one photovoltaic cell and at least one nanowire configured to electrically stimulate a biological material in response to radiation.
    Type: Grant
    Filed: November 29, 2012
    Date of Patent: April 4, 2017
    Assignee: NEURONANO AB
    Inventors: Heiner Linke, Christelle Prinz, Gaelle Piret, Jonas Ohlsson, Maria Thereza Perez
  • Patent number: 9595649
    Abstract: The device according to the invention comprises a nanostructured LED with a first group of nanowires protruding from a first area of a substrate and a contacting means in a second area of the substrate. Each nanowire of the first group of nanowires comprises a p-i-n-junction and a top portion of each nanowire or at least one selection of nanowires is covered with a light reflecting contact layer. The contacting means of the second area is in electrical contact with the bottom of the nanowires, the light-reflecting contact layer being in electrical contact with the contacting means of the second area via the p-i-n-junction. Thus when a voltage is applied between the contacting means of the second area and the light-reflecting contact layer, light is generated within the nanowire. On top of the light-reflecting contact layer, a first group of contact pads for flip-chip bonding can be provided, distributed and separated to equalize the voltage across the layer to reduce the average serial resistance.
    Type: Grant
    Filed: January 30, 2014
    Date of Patent: March 14, 2017
    Assignee: GLO AB
    Inventors: Steven Konsek, Jonas Ohlsson, Yourii Martynov, Peter Jesper Hanberg
  • Patent number: 9574286
    Abstract: A gas phase nanowire growth apparatus including a reaction chamber (200), a first input and a second input (202 B, 202 A). The first input is located concentrically within the second input and the first and second input are configured such that a second fluid delivered from the second input provides a sheath between a first fluid delivered from the first input and a wall of the reaction chamber. An aerosol of catalyst particles may be used to grow the nanowires.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: February 21, 2017
    Assignee: SOL VOLTAICS AB
    Inventors: Greg Alcott, Martin Magnusson, Olivier Postel, Knut Deppert, Lars Samuelson, Jonas Ohlsson
  • Publication number: 20160336411
    Abstract: A semiconductor nanowire device includes at least one semiconductor nanowire having a bottom surface and a top surface, an insulating material which surrounds the semiconductor nanowire, and an electrode ohmically contacting the top surface of the semiconductor nanowire. A contact of the electrode to the semiconductor material of the semiconductor nanowire is dominated by the contact to the top surface of the semiconductor nanowire.
    Type: Application
    Filed: July 28, 2016
    Publication date: November 17, 2016
    Inventors: Ingvar Åberg, Martin Magnusson, Damir Asoli, Lars Ivar Samuelson, Jonas Ohlsson
  • Publication number: 20160268374
    Abstract: The present invention provides a method for aligning nanowires which can be used to fabricate devices comprising nanowires that has well-defined and controlled orientation independently on what substrate they are arranged on. The method comprises the steps of providing nanowires and applying an electrical field over the population of nanowires, whereby an electrical dipole moment of the nanowires makes them align along the electrical field. Preferably the nanowires are dispersed in a fluid during the steps of providing and aligning. When aligned, the nanowires can be fixated, preferably be deposition on a substrate. The 10 electrical field can be utilised in the deposition. Pn-junctions or any net charge introduced in the nanowires may assist in the aligning and deposition process. The method is suitable for continuous processing, e.g. in a roll-to-roll process, on practically any substrate materials and not limited to substrates suitable for particle assisted growth.
    Type: Application
    Filed: March 11, 2016
    Publication date: September 15, 2016
    Inventors: Lars SAMUELSON, Knut DEPPERT, Jonas OHLSSON, Martin MAGNUSSON
  • Patent number: 9419086
    Abstract: A semiconductor nanowire device includes at least one semiconductor nanowire having a bottom surface and a top surface, an insulating material which surrounds the semiconductor nanowire, and an electrode ohmically contacting the top surface of the semiconductor nanowire. A contact of the electrode to the semiconductor material of the semiconductor nanowire is dominated by the contact to the top surface of the semiconductor nanowire.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: August 16, 2016
    Assignee: SOL VOLTAICS AB
    Inventors: Ingvar Åberg, Martin Magnusson, Damir Asoli, Lars Ivar Samuelson, Jonas Ohlsson
  • Publication number: 20160155870
    Abstract: A solar cell structure (1) and a method of its fabrication, the structure comprising an array of elongated nanowires (2) made in a semiconductor material having a direct band gap. Each nanowire (2) has at least a first (3) and a second (4) sections. Said structure comprises a first electrode layer (7) realizing ohmic contact to at least one portion of each first section (3), a second, optically transparent electrode layer (8) realizing contact to at least one portion of each second section. Each nanowire (2) comprises a minority carrier barrier element (6) for minimizing recombination of minority carriers at the contact to the second electrode layer (8).
    Type: Application
    Filed: June 5, 2014
    Publication date: June 2, 2016
    Inventors: Ingvar ÅBERG, Jonas OHLSSON, Damir ASOLI, Nicklas ANTTU
  • Patent number: 9318655
    Abstract: The present invention relates to light emitting diodes comprising at least one nanowire. The LED according to the invention is an upstanding nanostructure with the nanowire protruding from a substrate. A bulb with a larger diameter than the nanowire is arranged in connection to the nanowire and at an elevated position with regards to the substrate. A pn-junction is formed by the combination of the bulb and the nanowire resulting in an active region to produce light.
    Type: Grant
    Filed: July 2, 2012
    Date of Patent: April 19, 2016
    Assignee: QUNANO AB
    Inventors: Bo Pedersen, Lars Samuelson, Jonas Ohlsson, Patrik Svensson
  • Patent number: 9305766
    Abstract: The present invention provides a method for aligning nanowires which can be used to fabricate devices comprising nanowires that has well-defined and controlled orientation independently on what substrate they are arranged on. The method comprises the steps of providing nanowires (1) and applying an electrical field (E) over the population of nanowires (1), whereby an electrical dipole moment of the nanowires makes them align along the electrical field (E). Preferably the nanowires are dispersed in a fluid during the steps of providing and aligning. When aligned, the nanowires can be fixated, preferably be deposition on a substrate (2). The electrical field can be utilized in the deposition. Pn-junctions or any net charge introduced in the nanowires (1) may assist in the aligning and deposition process. The method is suitable for continuous processing, e.g. in a roll-to-roll process, on practically any substrate materials and not limited to substrates suitable for particle assisted growth.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: April 5, 2016
    Assignee: QUNANO AB
    Inventors: Lars Samuelson, Knut Deppert, Jonas Ohlsson, Martin Magnusson
  • Patent number: 9287443
    Abstract: A nanostructured device according to the invention comprises a first group of nanowires protruding from a substrate where each nanowire of the first group of nanowires comprises at least one pn- or p-i-n-junction. A first contact, at least partially encloses and is electrically connected to a first side of the pn- or p-i-n-junction of each nanowire in the first group of nanowires. A second contacting means comprises a second group of nanowires that protrudes from the substrate, and is arranged to provide an electrical connection to a second side of the pn- or p-i-n-junction.
    Type: Grant
    Filed: February 6, 2014
    Date of Patent: March 15, 2016
    Assignee: GLO AB
    Inventors: Steven Louis Konsek, Yourii Martynov, Jonas Ohlsson, Peter Jesper Hanberg
  • Publication number: 20150333225
    Abstract: The present invention relates to nanostructured light emitting diodes, LEDs. The nanostructure LED device according to the invention comprises an array of a plurality of individual nanostructured LEDs. Each of the nanostructured LEDs has an active region wherein light is produced. The nanostructured device further comprise a plurality of reflectors, each associated to one individual nanostructured LED (or a group of nanostructured LEDs. The individual reflectors has a concave surface facing the active region of the respective individual nanostructured LED or active regions of group of nanostructured LEDs.
    Type: Application
    Filed: March 20, 2015
    Publication date: November 19, 2015
    Inventors: Lars Ivar Samuelson, Bo Pedersen, Bjorn Jonas Ohlsson, Yourii Martynov, Steven L. Konsek, Peter Jasper Hanberg
  • Publication number: 20150221814
    Abstract: A device includes a support including at least a first area and a second area, and a plurality of first light emitting devices located over the first area of the support, each first light emitting device containing a first growth template including a first nanostructure, and each first light emitting device has a first peak emission wavelength. The device also includes a plurality of second light emitting devices located over the second area of the support, each second light emitting device containing a second growth template including a second nanostructure, and each second light emitting device has a second peak emission wavelength different from the first peak emission wavelength. Each first growth template differs from each second growth template.
    Type: Application
    Filed: April 16, 2015
    Publication date: August 6, 2015
    Inventors: Jonas Ohlsson, Carl Patrik Theodor Svensson
  • Publication number: 20150221817
    Abstract: The present invention relates to the growing of nitride semiconductors, applicable for a multitude of semiconductor devices such as diodes, LEDs and transistors. According to the method of the invention nitride semiconductor nanowires are grown utilizing a CVD based selective area growth technique. A nitrogen source and a metal-organic source are present during the nanowire growth step and at least the nitrogen source flow rate is continuous during the nanowire growth step. The V/III-ratio utilized in the inventive method is significantly lower than the V/III-ratios commonly associated with the growth of nitride based semiconductor.
    Type: Application
    Filed: April 14, 2015
    Publication date: August 6, 2015
    Inventors: Werner Seifert, Damir Asoli, Zhaoxia Bi, Jonas Ohlsson, Lars Ivar Samuelson
  • Patent number: 9096429
    Abstract: The present invention relates to semiconductor devices comprising semiconductor nanoelements. In particular the invention relates to devices having a volume element having a larger diameter than the nanoelement arranged in epitaxial connection to the nanoelement. The volume element is being doped in order to provide a high charge carrier injection into the nanoelement and a low access resistance in an electrical connection. The nanoelement may be upstanding from a semiconductor substrate. A concentric layer of low resistivity material forms on the volume element forms a contact.
    Type: Grant
    Filed: July 3, 2014
    Date of Patent: August 4, 2015
    Assignee: QUNANO AB
    Inventors: Lars Ivar Samuelson, Patrik Svensson, Jonas Ohlsson, Truls Lowgren
  • Patent number: 9087896
    Abstract: The present invention relates to providing layers of different thickness on vertical and horizontal surfaces (15, 20) of a vertical semiconductor device (1). In particular the invention relates to gate electrodes and the formation of precision layers (28) in semiconductor structures comprising a substrate (10) and an elongated structure (5) essentially standing up from the substrate. According to the method of the invention the vertical geometry of the device (1) is utilized in combination with either anisotropic deposition or anisotropic removal of deposited material to form vertical or horizontal layers of very high precision.
    Type: Grant
    Filed: October 8, 2013
    Date of Patent: July 21, 2015
    Assignee: QUNANO AB
    Inventors: Jonas Ohlsson, Lars Samuelson, Erik Lind, Lars-Erik Wernersson, Truls Lowgren
  • Publication number: 20150200262
    Abstract: A semiconductor nanowire device includes at least one semiconductor nanowire having a bottom surface and a top surface, an insulating material which surrounds the semiconductor nanowire, and an electrode ohmically contacting the top surface of the semiconductor nanowire. A contact of the electrode to the semiconductor material of the semiconductor nanowire is dominated by the contact to the top surface of the semiconductor nanowire.
    Type: Application
    Filed: March 27, 2015
    Publication date: July 16, 2015
    Inventors: Ingvar Åberg, Martin Magnusson, Damir Asoli, Lars Ivar Samuelson, Jonas Ohlsson
  • Publication number: 20150171076
    Abstract: A radial nanowire Esaki diode device includes a semiconductor core of a first conductivity type and a semiconductor shell of a second conductivity type different from the first conductivity type. The device may be a TFET or a solar cell.
    Type: Application
    Filed: July 5, 2013
    Publication date: June 18, 2015
    Inventors: Lars-Erik Wernersson, Erik Lind, Jonas Ohlsson, Lars Samuelson, Mikeal Bjork, Claes Thelander, Anil Dey
  • Patent number: 9054233
    Abstract: A device includes a support including at least a first area and a second area, and a plurality of first light emitting devices located over the first area of the support, each first light emitting device containing a first growth template including a first nanostructure, and each first light emitting device has a first peak emission wavelength. The device also includes a plurality of second light emitting devices located over the second area of the support, each second light emitting device containing a second growth template including a second nanostructure, and each second light emitting device has a second peak emission wavelength different from the first peak emission wavelength. Each first growth template differs from each second growth template.
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: June 9, 2015
    Assignee: GLO AB
    Inventors: Jonas Ohlsson, Carl Patrik Theodor Svensson
  • Publication number: 20150155167
    Abstract: The invention regards a method of manufacturing a structure adapted to be transferred to a non-crystalline layer. The method comprises the steps of providing a substrate having a crystal orientation, providing a plurality of elongate nanostructures (nanowires) on said substrate, said nanostructures extending from the substrate such that the angle defined by the axis of elongation of each nanostructure and the surface normal of the substrate is smaller than 55 degrees, depositing at least one layer of material such that at least the exposed regions of the substrate are covered by said material, removing the substrate such that the deposited layer becomes lowermost layer and exposing at least the extremity of the respective nanostructure of the plurality of nanostructures. Invention also regards a structure manufactured using said method.
    Type: Application
    Filed: June 5, 2013
    Publication date: June 4, 2015
    Inventors: Jonas Ohlsson, Lars Samuelson, Jonas Tegenfeldt, Ingvar Aberg, Damir Asoli