Patents by Inventor Jonathan Park

Jonathan Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200331095
    Abstract: A method for dithering can include receiving, at a computer numerically controlled machine comprising a laser, a motion plan corresponding to a first image. The output of the laser can be dithered, in accordance with the motion plan, to effect a change in a material within an interior space of the computer numerically controlled machine. The change can substantially reproduce at least a portion of the first image on the material. The dithering can include providing laser energy to the material at a native resolution based at least on a spot size of the laser. The spot size can be determined based at least on one or more parameters of the computer numerically controlled machine and/or one or more properties of the material. The laser energy can be delivered at locations separated by a distance no less than the spot size.
    Type: Application
    Filed: July 2, 2020
    Publication date: October 22, 2020
    Inventors: Daniel Shapiro, Mark Gosselin, Anthony Wright, Rachael Ludwick, Jonathan Park
  • Patent number: 10737355
    Abstract: A method for dithering can include receiving, at a computer numerically controlled machine comprising a laser, a motion plan corresponding to a first image. The output of the laser can be dithered, in accordance with the motion plan, to effect a change in a material within an interior space of the computer numerically controlled machine. The change can substantially reproduce at least a portion of the first image on the material. The dithering can include providing laser energy to the material at a native resolution based at least on a spot size of the laser. The spot size can be determined based at least on one or more parameters of the computer numerically controlled machine and/or one or more properties of the material. The laser energy can be delivered at locations separated by a distance no less than the spot size.
    Type: Grant
    Filed: November 27, 2017
    Date of Patent: August 11, 2020
    Assignee: Glowforge Inc.
    Inventors: Daniel Shapiro, Mark Gosselin, Anthony Wright, Rachael Ludwick, Jonathan Park
  • Patent number: 10513901
    Abstract: A packoff device is disclosed for sealing an annulus within a wellbore, and for bypassing the sealed annulus. The packoff device may include a mandrel having a bore formed axially therethrough and first and second ports extending radially from the bore. A sealing element that extends radially-outwardly from the mandrel may be positioned axially between the first and second ports, and may create a seal within an annulus between the mandrel and a casing, to isolate a portion of the annulus above the sealing element from a portion below the sealing element. A sleeve within the bore may, with the mandrel, form a channel providing fluid communication between the first and second ports. The sleeve may be movable between open and closed states. The first and second ports may be unobstructed by the sleeve in the open state, one or more may be obstructed in the closed state.
    Type: Grant
    Filed: October 7, 2016
    Date of Patent: December 24, 2019
    Assignee: SMITH INTERNATIONAL, INC.
    Inventors: Timothy M. O'Rourke, Jonathan Park
  • Publication number: 20180300175
    Abstract: A base cell of a gate array architecture includes an increased number of transistors that can be interconnected or not interconnected so as to realize similar advantages as a having a library of transistors of different sizes. In one embodiment, each column a base cell contains two PMOS transistors and two NMOS transistors connected so as to share a single polysilicon (“poly”) gate electrode. Such an arrangement of the transistors in metal only programmable base cell architecture provides three different P and N transistor widths per poly gate and may provide nine different combinations transistor widths for P and N for design. The number of gate electrodes is minimized and their arrangement simplified such that the size of the base cell may be same size compared to traditional gate array base cell with four transistors. Moreover, only a single type of base cell need be provided, simplifying layout and design.
    Type: Application
    Filed: November 14, 2014
    Publication date: October 18, 2018
    Inventors: Jonathan Park, Yin Hoa Liew, Wei Zhi Kang, Yan Khai Lee, Wan Tat, Toong Erh Ooi, Soo Chuan Tan
  • Publication number: 20170298704
    Abstract: A packoff device is disclosed for sealing an annulus within a wellbore, and for bypassing the sealed annulus. The packoff device may include a mandrel having a bore formed axially therethrough and first and second ports extending radially from the bore. A sealing element that extends radially-outwardly from the mandrel may be positioned axially between the first and second ports, and may create a seal within an annulus between the mandrel and a casing, to isolate a portion of the annulus above the sealing element from a portion below the sealing element. A sleeve within the bore may, with the mandrel, form a channel providing fluid communication between the first and second ports. The sleeve may be movable between open and closed states. The first and second ports may be unobstructed by the sleeve in the open state, one or more may be obstructed in the closed state.
    Type: Application
    Filed: October 7, 2016
    Publication date: October 19, 2017
    Inventors: Timothy M. O'Rourke, Jonathan Park
  • Publication number: 20170022773
    Abstract: A packoff device is disclosed for sealing an annulus within a wellbore, and for bypassing the sealed annulus. The packoff device may include a mandrel having a bore formed axially therethrough and first and second ports extending radially from the bore. A sealing element that extends radially-outwardly from the mandrel may be positioned axially between the first and second ports, and may create a seal within an annulus between the mandrel and a casing, to isolate a portion of the annulus above the sealing element from a portion below the sealing element. A sleeve within the bore may, with the mandrel, form a channel providing fluid communication between the first and second ports. The sleeve may be movable between open and closed states. The first and second ports may be unobstructed by the sleeve in the open state, one or more may be obstructed in the closed state.
    Type: Application
    Filed: October 7, 2016
    Publication date: January 26, 2017
    Inventors: Timothy M. O'Rourke, Jonathan Park
  • Patent number: 9464496
    Abstract: A packoff device is disclosed for sealing an annulus within a wellbore, and for bypassing the sealed annulus. The packoff device may include a mandrel having a bore formed axially therethrough and first and second ports extending radially from the bore. A sealing element that extends radially-outwardly from the mandrel may be positioned axially between the first and second ports, and may create a seal within an annulus between the mandrel and a casing, to isolate a portion of the annulus above the sealing element from a portion below the sealing element. A sleeve within the bore may, with the mandrel, form a channel providing fluid communication between the first and second ports. The sleeve may be movable between open and closed states. The first and second ports may be unobstructed by the sleeve in the open state, one or more may be obstructed in the closed state.
    Type: Grant
    Filed: March 3, 2014
    Date of Patent: October 11, 2016
    Assignee: Smith International, Inc.
    Inventors: Timothy M. O'Rourke, Jonathan Park
  • Patent number: 9382565
    Abstract: The present invention relates generally to methods for generating single stranded nucleic acid molecules following enhanced solid phase polynucleotide amplification. The present invention employs an amplification reaction using primers with differential priming properties at particular annealing conditions or an immobilized primer nested between two aqueous phase primers. Thus, by primer design, solid support primer participation is enhanced relative to aqueous phase primers. The subject invention further provides methods for labeling solid matrices with single and double stranded nucleic acid molecules. Kits for generating single stranded nucleic acid molecules and for conducting amplification reactions also form part of the present invention. The present invention further provides amplification systems for the generation of single stranded nucleic acid molecules optionally labelled with a reporter molecule and their use inter alia as labels, primers and probes.
    Type: Grant
    Filed: February 1, 2008
    Date of Patent: July 5, 2016
    Assignee: GENERA BIOSYSTEMS LIMITED
    Inventors: Daniel Jonathan Park, Karl Frederick Poetter, Zaheer Khan
  • Publication number: 20140251616
    Abstract: A packoff device is disclosed for sealing an annulus within a wellbore, and for bypassing the sealed annulus. The packoff device may include a mandrel having a bore formed axially therethrough and first and second ports extending radially from the bore. A sealing element that extends radially-outwardly from the mandrel may be positioned axially between the first and second ports, and may create a seal within an annulus between the mandrel and a casing, to isolate a portion of the annulus above the sealing element from a portion below the sealing element. A sleeve within the bore may, with the mandrel, form a channel providing fluid communication between the first and second ports. The sleeve may be movable between open and closed states. The first and second ports may be unobstructed by the sleeve in the open state, one or more may be obstructed in the closed state.
    Type: Application
    Filed: March 3, 2014
    Publication date: September 11, 2014
    Applicant: SMITH INTERNATIONAL, INC.
    Inventors: Timothy M. O'Rourke, Jonathan Park
  • Patent number: 8339844
    Abstract: A semiconductor device may be created using multiple metal layers and a layer including programmable vias that may be used to form various patterns of interconnections among segments of metal layers. The programmable vias may be formed of materials whose resistance is changeable between a high-resistance state and a low-resistance state.
    Type: Grant
    Filed: March 12, 2008
    Date of Patent: December 25, 2012
    Assignee: eASIC Corporation
    Inventors: Herman Schmit, Ronnie Vasishta, Adam Levinthal, Jonathan Park
  • Publication number: 20110277606
    Abstract: A thin plate cutting die has on a front surface a closed cutting edge confining an enclosed area and in a back surface a recess. An air-passage through hole is situated within the enclosed area is opening into the recess, and a positioning indication is established for establishing a correct position of the thin plate cutting die. A cylinder for magnetically holding the thin plate cutting die has at least one longitudinal channel extending longitudinally and internally in the cylinder for transferring air, at least one outlet channel extending from the longitudinal channel and opening into a thin plate die receiving surface, and a positioning indication for establishing a correct position of a thin plate cutting die on the receiving surface.
    Type: Application
    Filed: November 12, 2009
    Publication date: November 17, 2011
    Applicant: GERHARDT LTD
    Inventor: Jonathan Park
  • Patent number: 8001509
    Abstract: A user logic design for a mask-programmable logic device (“MPLD”) may be designed on a comparable or compatible user-programmable logic device (“UPLD”) and migrated to the MPLD, or may be designed directly on an MPLD. If the design is designed on a UPLD, the constraints of the target MPLD—i.e., differences between the devices—are taken into account so that the migration will be successful. If the design is designed directly on an MPLD, constraints of a comparable compatible UPLD are taken into account if the user indicates that the design will be migrated to the UPLD for testing. This means that when a logic design is intended to be migrated back-and-forth between a UPLD and an MPLD, only the intersection of features can be used. To facilitate migration, fixed mappings between pairs of devices may be created.
    Type: Grant
    Filed: September 19, 2007
    Date of Patent: August 16, 2011
    Assignee: Altera Corporation
    Inventors: Steven Perry, Gregor Nixon, Larry Kong, Alasdair Scott, Andrew Hall, Lingli Wang, Chris Dettmar, Jonathan Park, Richard Price
  • Publication number: 20100209971
    Abstract: The present invention relates generally to methods for generating single stranded nucleic acid molecules following enhanced solid phase polynucleotide amplification. The present invention employs an amplification reaction using primers with differential priming properties at particular annealing conditions or an immobilized primer nested between two aqueous phase primers. Thus, by primer design, solid support primer participation is enhanced relative to aqueous phase primers. The subject invention further provides methods for labeling solid matrices with single and double stranded nucleic acid molecules. Kits for generating single stranded nucleic acid molecules and for conducting amplification reactions also form part of the present invention. The present invention further provides amplification systems for the generation of single stranded nucleic acid molecules optionally labelled with a reporter molecule and their use inter alia as labels, primers and probes.
    Type: Application
    Filed: February 1, 2008
    Publication date: August 19, 2010
    Applicant: GENERA BIOSYSTEMS LIMITED
    Inventors: Daniel Jonathan Park, Kaarl Frederick Poetter, Zaheer Khan
  • Patent number: 7759971
    Abstract: A configurable logic array may include a multiplicity of logic components, which may contain customizable look-up tables, and layers of fixed metal segments all of which may be customizable using a single custom via layer. The integrated circuit containing the configurable logic array may also include a multiplicity of customizable register files, customizable RAM blocks; a ROM block with customizable contents; or test logic with customizable test options and configurations to separately test logic and the PLLs.
    Type: Grant
    Filed: June 21, 2007
    Date of Patent: July 20, 2010
    Assignee: eASIC Corporation
    Inventors: Shu Ern Perng Mark, Yit Ping Kok, Soon Chieh Lim, Jonathan Park, Herman Schmit
  • Patent number: 7689960
    Abstract: A method for verifying library components and designs on a via customizable ASIC, which may include the process of adding capacitors to model possible via sites of a model of an un-customized portion of or a whole ASIC, and replacing the capacitors with resistors to model where custom vias have been placed on the ASIC to implement a desired component or design. Views of this model may then be generated to verify the functionality of the component or design, and component models for timing, function and via customization may then be generated for the component library.
    Type: Grant
    Filed: January 25, 2006
    Date of Patent: March 30, 2010
    Assignee: eASIC Corporation
    Inventors: Jonathan Park, Yit Ping Kok, Soon Chieh Lim, Yin Hao Liew, Wai Leng Chek
  • Patent number: 7537644
    Abstract: A method is provided for degassing a liquid. One step of the method includes providing a rotating packed bed (RPB) reactor. The RPB reactor includes a rotatable permeable element disposed within a chamber defining an interior region, at least one liquid inlet for infusing the liquid into the interior region, at least one gas outlet for removing a gas from the interior region, and at least one liquid outlet for removing a liquid from the interior region. The rotatable permeable element within the RPB reactor is caused to spin at a tangential velocity, and the liquid is then infused into the at least one liquid inlet at an inlet flow rate. Next, a vacuum is applied to the interior region of the RPB reactor via the at least one gas outlet to generate a liquid substantially free of the gas.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: May 26, 2009
    Assignee: GasTran Systems
    Inventors: Jonathan Park, Nelson Gardner
  • Publication number: 20090109765
    Abstract: A configurable logic array may include a multiplicity of logic components, which may contain customizable look-up tables, and layers of fixed metal segments all of which may be customizable using a single custom via layer. The integrated circuit containing the configurable logic array may also include a multiplicity of customizable register files, customizable RAM blocks; a ROM block with customizable contents; or test logic With customizable test options and configurations to separately test logic and the PLLs.
    Type: Application
    Filed: June 21, 2007
    Publication date: April 30, 2009
    Applicant: eASIC Corporation
    Inventors: Shu Ern Perng Mark, Yit Ping Kok, Soon Chieh Lim, Jonathan Park, Herman Schmit
  • Publication number: 20080224260
    Abstract: A semiconductor device may be created using multiple metal layers and a layer including programmable vias that may be used to form various patterns of interconnections among segments of metal layers. The programmable vias may be formed of materials whose resistance is changeable between a high-resistance state and a low-resistance state.
    Type: Application
    Filed: March 12, 2008
    Publication date: September 18, 2008
    Applicant: EASIC CORPORATION
    Inventors: Herman Schmit, Ronnie Vasishta, Adam Levinthal, Jonathan Park
  • Publication number: 20080005716
    Abstract: A user logic design for a mask-programmable logic device (“MPLD”) may be designed on a comparable or compatible user-programmable logic device (“UPLD”) and migrated to the MPLD, or may be designed directly on an MPLD. If the design is designed on a UPLD, the constraints of the target MPLD—i.e., differences between the devices—are taken into account so that the migration will be successful. If the design is designed directly on an MPLD, constraints of a comparable compatible UPLD are taken into account if the user indicates that the design will be migrated to the UPLD for testing. This means that when a logic design is intended to be migrated back-and-forth between a UPLD and an MPLD, only the intersection of features can be used. To facilitate migration, fixed mappings between pairs of devices may be created.
    Type: Application
    Filed: September 19, 2007
    Publication date: January 3, 2008
    Applicant: ALTERA CORPORATION
    Inventors: Steven Perry, Gregor Nixon, Larry Kong, Alasdair Scott, Andrew Hall, Lingli Wang, Chris Dettmar, Jonathan Park, Richard Price
  • Publication number: 20070295662
    Abstract: A method is provided for degassing a liquid. One step of the method includes providing a rotating packed bed (RPB) reactor. The RPB reactor includes a rotatable permeable element disposed within a chamber defining an interior region, at least one liquid inlet for infusing the liquid into the interior region, at least one gas outlet for removing a gas from the interior region, and at least one liquid outlet for removing a liquid from the interior region. The rotatable permeable element within the RPB reactor is caused to spin at a tangential velocity, and the liquid is then infused into the at least one liquid inlet at an inlet flow rate. Next, a vacuum is applied to the interior region of the RPB reactor via the at least one gas outlet to generate a liquid substantially free of the gas.
    Type: Application
    Filed: June 29, 2007
    Publication date: December 27, 2007
    Inventors: Jonathan Park, Nelson Gardner