Abstract: A light emitting display device including: a first pixel including a first lower storage electrode, a first gate electrode of a first driving transistor, and a first upper storage electrode; and a second pixel provided near the first pixel, and including a second lower storage electrode, a second gate electrode of a second driving transistor, and a second upper storage electrode. In a plan view, the first gate electrode and the second gate electrode have first sides facing each other, the first side of the first gate electrode is positioned inside a border of the first lower storage electrode or the first upper storage electrode in a plan view, and the first side of the second gate electrode is positioned inside a border of the second lower storage electrode or the second upper storage electrode in a plan view.

Abstract: Provided are a scan driver and a display device including the same. The scan driver includes a first power line configured to supply a first voltage signal, a second power line configured to supply a second voltage signal having a lower voltage level than the first voltage signal, a pull-up transistor configured to output a corresponding clock signal, among multiple clock signals, as a scan signal in response to a logic state of a first node, a pull-down transistor configured to output the second voltage signal from the second power line as the scan signal in response to a logic state of a second node, and a first light-blocking film overlapping the pull-up transistor or the pull-down transistor, and configured to receive the second voltage signal from the second power line and the first voltage signal from the first power line.

Abstract: A touch sensor includes a substrate, and an electrode formed from a conductive stack structure including a first conductive oxide layer, a copper-containing metal layer and a second conductive oxide layer sequentially stacked from the substrate. The first conductive oxide layer and the second conductive oxide layer each include a copper-metal oxide. Chemical and mechanical stability of an electrode may be improved by the first and second conductive oxide layers.

Abstract: A scan driver including a plurality of scan stages. A first scan stage among the plurality of scan stages includes first-to-sixth transistors and a first capacitor. The first transistor is connected to a first Q node, a first scan clock line, and a first scan line. A second transistor is connected to a first scan carry line and the first Q node. A third transistor is connected to a first sensing carry line and a second sensing carry line. A fourth transistor is connected to a first control line and the third transistor. A fifth transistor is connected to the fourth transistor, a second control line, and a first node. A first capacitor is connected to the fifth transistor. A sixth transistor is connected to a third control line, the first node, and the first Q node.

Abstract: A film touch sensor in which a conductive pattern layer and a separation layer are sequentially disposed, and a base film is disposed on at least one surface of the conductive pattern layer and the separation layer, includes a capping layer which is disposed between the separation layer and the conductive pattern layer and includes SiOxNy (0?x?4, y=4?x), thereby it is possible to improve visibility of an image and reduce a resistance of the conductive pattern layer, and a method for fabricating the same.

Abstract: A scan driver for a display device includes a plurality of scan stage groups, each of the scan stage groups including a first scan stage and a second scan stage.

Abstract: Provided are a scan driver and a display device including the same. The scan driver includes a first power line configured to supply a first voltage signal, a second power line configured to supply a second voltage signal having a lower voltage level than the first voltage signal, a pull-up transistor configured to output a corresponding clock signal, among multiple clock signals, as a scan signal in response to a logic state of a first node, a pull-down transistor configured to output the second voltage signal from the second power line as the scan signal in response to a logic state of a second node, and a first light-blocking film overlapping the pull-up transistor or the pull-down transistor, and configured to receive the second voltage signal from the second power line and the first voltage signal from the first power line.

Abstract: A scan driver includes scan stages, an n-th scan stage of the scan stages includes a first driving circuit, a second driving circuit, and an output circuit. The first driving circuit controls a voltage of a first driving node, based on an input signal and a voltage of a second driving node. The second driving circuit controls the voltage of the second driving node, based on a second clock signal and a first voltage. The output circuit outputs a first clock signal as a scan signal and a carry signal, and outputs a second voltage as the scan signal and the carry signal. The first driving circuit includes a first transistor including a gate electrode electrically connected to the second driving node, one electrode electrically connected to an input line that provides the input signal, and another electrode electrically connected to the first driving node.

Abstract: A scan driver including a plurality of scan stages. A first scan stage among the plurality of scan stages includes first-to-sixth transistors and a first capacitor. The first transistor is connected to a first Q node, a first scan clock line, and a first scan line. A second transistor is connected to a first scan carry line and the first Q node. A third transistor is connected to a first sensing carry line and a second sensing carry line. A fourth transistor is connected to a first control line and the third transistor. A fifth transistor is connected to the fourth transistor, a second control line, and a first node. A first capacitor is connected to the fifth transistor. A sixth transistor is connected to a third control line, the first node, and the first Q node.

Abstract: A scan driver includes scan stages, an n-th scan stage of the scan stages includes a first driving circuit, a second driving circuit, and an output circuit. The first driving circuit controls a voltage of a first driving node, based on an input signal and a voltage of a second driving node. The second driving circuit controls the voltage of the second driving node, based on a second clock signal and a first voltage. The output circuit outputs a first clock signal as a scan signal and a carry signal, and outputs a second voltage as the scan signal and the carry signal. The first driving circuit includes a first transistor including a gate electrode electrically connected to the second driving node, one electrode electrically connected to an input line that provides the input signal, and another electrode electrically connected to the first driving node.

Abstract: A scan driver including stages that are connected to scan lines respectively and supply scan signals to the scan lines in response to voltages of 11th and 12th nodes, and a selective drive circuit that is connected to i (i is a natural number of 2 or greater) stages and includes a first node and a second node. Each of the stages includes a first connection transistor that is connected between the first node and the 11th node and a second connection transistor that is connected between the second node and the 12th node. The first connection transistor and the second connection transistor are turned on by a second control signal to electrically connect the first node to the 11th node and the second node to the 12th node, respectively.

Abstract: The disclosure relates to a stage and a scan driver including the stage. The stage is connected to each of scan lines and supplies a scan signal and a sensing signal to the scan lines. The stage includes an input unit configured to control voltages of a first node and a second node based on a first control signal and a previous stage carry signal, and an output buffer including an eleventh node and a twelfth node electrically connected to the first node and the second node, respectively, in response to a second control signal, and configured to output a carry signal and the scan signal in response to a scan clock signal according to voltages of the eleventh node and the twelfth node and to output the sensing signal in response to a sensing clock signal.

Abstract: Disclosed is a method of manufacturing a stainless steel with excellent contact resistance for a polymer fuel cell separator. The method of manufacturing a stainless steel with excellent contact resistance for a polymer fuel cell separator according to an embodiment of the present disclosure includes: electrolyzing to remove a first passivation film formed on a cold-rolled thin sheet of a stainless steel comprising, in percent (%) by weight of the entire composition, C: greater than 0 to 0.1%, N: greater than 0 to 0.02%, Si: greater than 0 to 0.25%, Mn: greater than 0 to 0.2%, P: greater than 0 to 0.04%, S: greater than 0 to 0.02%, Cr: 22 to 34%, Ti: greater than 0 to 0.5%, Nb: greater than 0 to 0.5%, the remainder of iron (Fe) and other inevitable impurities; and immersing in a mixed acid solution of nitric acid and hydrofluoric acid to form a second passivation film on the stainless cold-rolled thin sheet.

Abstract: A pixel includes an organic light-emitting diode (OLED), a storage capacitor, and first to fourth transistors. The first transistor includes a gate electrode (GE), a first electrode (FE), and a second electrode (SE), and is configured to control, in response to a voltage of a first node (FN) coupled to the GE, current supplied from a first power source (PS) coupled to the FE to a second PS via the OLED. The storage capacitor is coupled between the FN and the first PS. The second transistor is coupled between a data line and the first transistor. The third transistor includes a FE coupled to the FN and a SE coupled to the SE of the first transistor. The fourth transistor includes a FE coupled to the FN and a SE coupled to the SE of the first transistor, and is configured to transmit an initialization voltage to the FN.

Abstract: A display device includes: a first pixel including a first light emitting diode (LED) and a first capacitor including a first electrode connected to a first power source voltage providing a driving voltage to an anode of the first light emitting diode (LED) or to an initialization voltage, and a second electrode connected to the anode of the first light emitting diode (LED); and a second pixel including a second light emitting diode (LED) and a second capacitor including a first electrode connected to the first power source voltage providing the driving voltage to an anode of the second light emitting diode (LED) or to an initialization voltage, and a second electrode connected to the anode of the second light emitting diode (LED), wherein capacitance of the second capacitor is less than capacitance of the first capacitor.

Abstract: A pixel includes an organic light-emitting diode (OLED), a storage capacitor, and first to fourth transistors. The first transistor includes a gate electrode (GE), a first electrode (FE), and a second electrode (SE), and is configured to control, in response to a voltage of a first node (FN) coupled to the GE, current supplied from a first power source (PS) coupled to the FE to a second PS via the OLED. The storage capacitor is coupled between the FN and the first PS. The second transistor is coupled between a data line and the first transistor. The third transistor includes a FE coupled to the FN and a SE coupled to the SE of the first transistor. The fourth transistor includes a FE coupled to the FN and a SE coupled to the SE of the first transistor, and is configured to transmit an initialization voltage to the FN.

Abstract: Stainless steel with improved hydrophilicity and contact resistance for a Polymer Electrolyte Membrane Fuel Cell (PEMFC) separator, and a method of manufacturing the stainless steel Stainless steel are disclosed. Stainless steel for a Polymer Electrolyte Membrane Fuel Cell (PEMFC) separator according to an embodiment of the present disclosure may include: by weight percent, 0 to 0.02% of C (excluding 0), 0 to 0.02% of N (excluding 0), 0 to 0.25% of Si (excluding 0), 0 to 0.2% of Mn (excluding 0), 0 to 0.04% of P (excluding 0), 0 to 0.02% of S (excluding 0), 20 to 34% of Cr, 0 to 0.6% of V (excluding 0), 0 to 0.5% of Ti (excluding 0), 0 to 0.5% of Nb (excluding 0), and the remainder comprising iron (Fe) and other unavoidable impurities, wherein a plurality of patterns may be formed on a surface of the stainless steel in a direction that is inclined with respect to a rolling direction, and the plurality of patterns are arranged repeatedly in the rolling direction.

Abstract: A scan driver including a plurality of scan stages. A first scan stage among the plurality of scan stages includes first-to-sixth transistors and a first capacitor. The first transistor is connected to a first Q node, a first scan clock line, and a first scan line. A second transistor is connected to a first scan carry line and the first Q node. A third transistor is connected to a first sensing carry line and a second sensing carry line. A fourth transistor is connected to a first control line and the third transistor. A fifth transistor is connected to the fourth transistor, a second control line, and a first node. A first capacitor is connected to the fifth transistor. A sixth transistor is connected to a third control line, the first node, and the first Q node.

Abstract: A scan driver includes scan stages, an n-th scan stage of the scan stages includes a first driving circuit, a second driving circuit, and an output circuit. The first driving circuit controls a voltage of a first driving node, based on an input signal and a voltage of a second driving node. The second driving circuit controls the voltage of the second driving node, based on a second clock signal and a first voltage. The output circuit outputs a first clock signal as a scan signal and a carry signal, and outputs a second voltage as the scan signal and the carry signal. The first driving circuit includes a first transistor including a gate electrode electrically connected to the second driving node, one electrode electrically connected to an input line that provides the input signal, and another electrode electrically connected to the first driving node.

Abstract: A display device includes: a first pixel including a first light emitting diode (LED) and a first capacitor including a first electrode connected to a first power source voltage providing a driving voltage to an anode of the first light emitting diode (LED) or to an initialization voltage, and a second electrode connected to the anode of the first light emitting diode (LED); and a second pixel including a second light emitting diode (LED) and a second capacitor including a first electrode connected to the first power source voltage providing the driving voltage to an anode of the second light emitting diode (LED) or to an initialization voltage, and a second electrode connected to the anode of the second light emitting diode (LED), wherein capacitance of the second capacitor is less than capacitance of the first capacitor.