Abstract: A negative voltage generator includes a variable-capacitance negative voltage generating unit, a switching unit and a positive voltage applying unit. The negative voltage generating unit includes a plurality of coupling capacitors for varying the capacitance in which the negative voltage is charged. The negative voltage generating unit selects at least one coupling capacitor of the plurality of coupling capacitors according to the number of rows (size) of a memory bank to which data is written, and charges the at least one selected coupling capacitor to a negative voltage. The switching unit selects one bitline of a bitline pair having complementary first and second bitlines in response to the data, and connects the at least one selected coupling capacitor to the selected bitline. The positive voltage applying unit applies a positive (high) voltage to an other bitline of the bitline pair.

Abstract: A method for driving a three dimensional (3D) display and a 3D display apparatus using the same are provided. The 3D display apparatus includes a storage unit which stores a received image; and a controller which compares a previous frame of the received image with a current frame of the received image, and determines whether or not to input an image of the current frame to a liquid crystal panel based on whether the previous frame is identical to the current frame. Therefore, a method for driving a 3D display which does not cause characteristics of a liquid crystal to be deteriorated and a 3D display apparatus using the same are provided.

Abstract: The memory device includes a memory cell array, an access control circuit configured to access the memory cell array, a control signal generation circuit configured to generate a control signal for controlling an operation of the access control circuit, and a variable delay circuit configured to generate a delay signal by variably delaying a clock signal according to an external signal. The control signal generation circuit adjusts an activation timing of the control signal in response to the delay signal.

Abstract: An image display method includes alternately receiving left and right images of a 3D image; and turning on a backlight such that the backlight is on only in periods when the left images are displayed or only in periods when the right images are displayed. A method of controlling shutter glasses separately for left and right images of a three-dimensional (3D) image includes alternately receiving the left and right images of the 3D image; and opening two shutters of the shutter glasses only in periods when the left images are received or only in periods when the right images are received.

Abstract: A test operation method of a memory device includes a reference current generator generating a reference current and providing a reference voltage generated based on the reference current to one of input terminals of a sense amplifier; providing a read voltage generated based on a read current of a memory cell to another one of the input terminals of the sense amplifier; and the sense amplifier comparing the reference voltage with the read voltage.

Abstract: Semiconductor memory devices are provided. Each of the semiconductor memory devices may include first and second memory cells. The first memory cell may be connected to a bit line and a complementary bit line. Moreover, each of the semiconductor memory devices may include a discharge circuit connected to the first memory cell via the bit line and the complementary bit line. The discharge circuit may be configured to discharge the first memory cell during a read or write operation of the second memory cell.

Abstract: A fin Field Effect Transistor (finFET) can include a source region and a drain region of the finFET. A gate of the finFET can cross over a fin of the finFET between the source and drain regions. First and second silicide layers can be on the source and drain regions respectively. The first and second silicide layers can include respective first and second surfaces that face the gate crossing over the fin, where the first and second surfaces are different sizes.

Abstract: A semiconductor integrated circuit designing method capable of minimizing a parasitic capacitance generated by an overhead in conductive lines, especially a gate line, a semiconductor integrated circuit according to the designing method, and a fabricating method thereof are provided. A method of designing a semiconductor integrated circuit having a FinFET architecture, includes: performing a pre-simulation of the semiconductor integrated circuit to be designed; designing a layout of components of the semiconductor integrated circuit based on a result of the pre-simulation, the components comprising first and second device areas and a first conductive line extending across the first and second device areas; modifying a first cutting area, that is arranged between the first and second device areas and electrically cuts the first conductive line, according to at least one design rule to minimize an overhead of the first conductive line created by the first cutting area.

Abstract: A display apparatus is disclosed. The display apparatus includes a panel unit which comprises a plurality of sub pixels having different colors; a backlight unit which provides backlight to the panel unit using a white light source and a blue light source; an image processing unit which converts image data into first color frame data and second color frame data; a panel driving unit which turns on a first color sub pixel according to the first color frame data, and which turns on a second color sub pixel according to the second color frame data; a backlight driving unit for driving the backlight unit; and a control unit which controls the backlight driving unit to consecutively turn on the white light source and the blue light source according to operations of the panel driving unit. Accordingly, brightness may be enhanced.

Abstract: The memory device includes a memory cell array, an access control circuit configured to access the memory cell array, a control signal generation circuit configured to generate a control signal for controlling an operation of the access control circuit, and a variable delay circuit configured to generate a delay signal by variably delaying a clock signal according to an external signal. The control signal generation circuit adjusts an activation timing of the control signal in response to the delay signal.

Abstract: Provided is a backlight unit for a liquid crystal display device. The backlight unit includes: a chassis; a printed circuit board connected to a side of the chassis, the printed circuit board including a plurality of light emitting diodes, and a pair of conductive pads through which power is supplied to the light emitting diodes, wherein the pair of conductive pads are disposed on an end of the printed circuit board; and a power socket into which the pair of the conductive pads are inserted.

Abstract: An image signal processing device, a display apparatus, and a display method are provided. The image signal processing device includes: a light source driver which turns on a plurality of light sources providing different colors, in a given order; a sub-frame calculator which divides a frame of an input image signal into a plurality of sub-frames; a display processor which sequentially outputs the plurality of sub-frames on a display panel; and a sync signal processor which outputs a sync signal to the backlight driver to turn on the plurality of light sources in each of the plurality of sub-frames, in the given order.

Abstract: A negative voltage generator includes a variable-capacitance negative voltage generating unit, a switching unit and a positive voltage applying unit. The negative voltage generating unit includes a plurality of coupling capacitors for varying the capacitance in which the negative voltage is charged. The negative voltage generating unit selects at least one coupling capacitor of the plurality of coupling capacitors according to the number of rows (size) of a memory bank to which data is written, and charges the at least one selected coupling capacitor to a negative voltage. The switching unit selects one bitline of a bitline pair having complementary first and second bitlines in response to the data, and connects the at least one selected coupling capacitor to the selected bitline. The positive voltage applying unit applies a positive (high) voltage to an other bitline of the bitline pair.

Abstract: A test operation method of a memory device is provided. The test operation method includes a reference current generator generating a reference current and providing a reference voltage generated based on the reference current to one of input terminals of a sense amplifier; providing a read voltage generated based on a read current of a memory cell to another one of the input terminals of the sense amplifier; and the sense amplifier comparing the reference voltage with the read voltage.

Abstract: A three-dimensional (3D) display panel, a 3D display apparatus using the same, and a driving method thereof are provided. The 3D display apparatus includes: an image display panel which displays an image; a phase shift panel which alternately shifts a polarization direction of light outputted from the image display panel; a backlight unit which provides a backlight; and a control unit which turns off the backlight unit during a crosstalk period where the phase shift panel performs the shift operation and to turn on the backlight unit for a stabilization period after the crosstalk period.

Abstract: A stereoscopic display apparatus is provided. The display apparatus includes a display panel for scanning an image alternately at a first frame frequency and a second frame frequency, different from the first frame frequency, an image signal input unit for inputting an image signal to the display panel, a backlight unit for emitting light to the display panel, and a shutter controller for selectively controlling an opening and closing of a left eye shutter and a right eye shutter of shutter glasses.

Abstract: A stereoscopic display apparatus includes a display panel which scans an image at a frame frequency that is an odd-numbered multiple of a field frequency, an image signal input unit which inputs an image signal to the display panel, a backlight unit which emits light to the display panel, and a shutter controller which controls an opening and a closing of a left eye shutter and a right eye shutter of shutter glasses.

Abstract: A static memory device includes a bit cell connected to an internal voltage line, and a power supply control circuit connected between the internal voltage line and a power supply voltage, wherein the power supply control circuit is configured to supply the power supply voltage level to the internal voltage line, and the power supply control circuit is configured to perform a write assist function that includes floating the internal voltage line during a write operation on the bit cell, the internal voltage line being floated in response to a signal of a mode control signal group.

Abstract: A method and apparatus for controlling a backlight unit of a three-dimensional (3D) display apparatus receiving a 3D video sequence is provided. The method includes determining the image brightness level of the 3D video sequence displayed on a liquid crystal display (LCD) unit, for each of a plurality of partial regions of the LCD unit to which a plurality of sub-blocks of the backlight unit emit light; determining turn-on times of the plurality of sub-blocks of the backlight unit, based on the image brightness of each of the partial regions of the LCD unit; and determining turn-on periods of the plurality of sub-blocks of the backlight unit by synchronizing with a switching period between a set including a left visual point frame and a right visual point frame of the 3D video sequence.

Abstract: An image display method includes alternately receiving left and right images of a 3D image; and turning on a backlight such that the backlight is on only in periods when the left images are displayed or only in periods when the right images are displayed. A method of controlling shutter glasses separately for left and right images of a three-dimensional (3D) image includes alternately receiving the left and right images of the 3D image; and opening two shutters of the shutter glasses only in periods when the left images are received or only in periods when the right images are received.