Patents by Inventor Jong In Ryu

Jong In Ryu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10163746
    Abstract: A semiconductor package and manufacturing method thereof includes a chip member installed on an upper surface, a lower surface, or both of a substrate. The semiconductor package and manufacturing method thereof also include a mold part stacked embedding the chip member, a connection member disposed at a center portion of the mold part, and a solder part formed on a portion of the connection member.
    Type: Grant
    Filed: January 21, 2016
    Date of Patent: December 25, 2018
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jong In Ryu, Ki Joo Sim, Do Jae Yoo, Ki Ju Lee, Jin Su Kim
  • Patent number: 10109595
    Abstract: A double-sided package module includes a substrate, a first sealing member, a second sealing member, and an extension portion. The substrate includes electronic components positioned on a first surface and a second surface of the substrate. The first sealing member and the second sealing member are positioned on the first surface and the second surface, respectively. The extension portion protrudes from a lateral surface of the substrate into a space between the first sealing member and the second sealing member.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: October 23, 2018
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Do Jae Yoo, Hee Jung Jung, Jong In Ryu, Ki Joo Sim
  • Publication number: 20180196794
    Abstract: The present disclosure includes a memory in which a content providing program is stored, and a processor that executes the program stored in the memory. Herein, upon execution of the program, the processor extracts a subject and a verb property including multiple verbs corresponding to the subject from a target content, infers a verb-form subject of the target content on the basis of the subject and the verb property, and extracts one or more contents matched with the target content from among multiple candidate contents on the basis of the verb-form subject of the target content. Further, the multiple verbs corresponding to the subject are extracted from an associative verb group.
    Type: Application
    Filed: January 9, 2018
    Publication date: July 12, 2018
    Inventors: Sang Keun Lee, Woo Jong Ryu
  • Patent number: 9997504
    Abstract: In one general aspect, an electronic device module includes a first board, a first device mounted on a first surface of the first board, a second board disposed below the first board, and a plurality of second devices disposed between the first board and the second board, wherein a surface of each second device the plurality of second devices is bonded to a second surface of the first board and another surface of each of the second devices is bonded to the second board.
    Type: Grant
    Filed: March 21, 2016
    Date of Patent: June 12, 2018
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jae Hyun Lim, Jong In Ryu, Sung Ho Kim, Jin Su Kim
  • Patent number: 9868274
    Abstract: An electronic device and method of fabricating an exterior member thereof are provided. The electronic device includes a basic member disposed on an outside of the electronic device and having an outer surface that is at least partially curved, and a glass film at least partially laminated to the outer surface of the basic member.
    Type: Grant
    Filed: September 10, 2015
    Date of Patent: January 16, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myung-Gon Kim, Jong-In Ryu, Min-Su Chang
  • Publication number: 20170301632
    Abstract: The method of manufacturing a package comprising: preparing a strip substrate having a plurality of separate package regions which are partitioned by a dicing region and via pads which are connected to one ends of plated tails which are divided to be disconnected in the dicing region; mounting at least one electronic component on at least one surface of each package region of the substrate; forming a connection pattern having conductivity in disconnected portions of the plated tails to form electrical connections therebetween; forming a molded part on the surface of the substrate to enclose the electronic component; forming at least one via penetrating through the molded part by applying current through the plated tails; and dicing the substrate in the dicing region to divide the substrate into separate packages, each having the connection pattern exposed to the exterior of the substrate.
    Type: Application
    Filed: June 29, 2017
    Publication date: October 19, 2017
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Do Jae YOO, Kyu Hwan OH, Jong In RYU, Jae Hyun LIM
  • Patent number: 9748179
    Abstract: The package includes: a substrate having at least one circuit layer; at least one electronic component mounted on at least one surface of the substrate; a molded part formed on the surface of the substrate to enclose the electronic component; at least one via formed in the molded part to be electrically connected to the circuit layer of the substrate; and a pattern connected to one end of a plated tail connected to the circuit layer connected to the via and exposed to the exterior of the substrate.
    Type: Grant
    Filed: July 28, 2015
    Date of Patent: August 29, 2017
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Do Jae Yoo, Kyu Hwan Oh, Jong In Ryu, Jae Hyun Lim
  • Publication number: 20170221835
    Abstract: A double-sided package module includes a substrate, a first sealing member, a second sealing member, and an extension portion. The substrate includes electronic components positioned on a first surface and a second surface of the substrate. The first sealing member and the second sealing member are positioned on the first surface and the second surface, respectively. The extension portion protrudes from a lateral surface of the substrate into a space between the first sealing member and the second sealing member.
    Type: Application
    Filed: September 16, 2016
    Publication date: August 3, 2017
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Do Jae YOO, Hee Jung JUNG, Jong In RYU, Ki Joo SIM
  • Patent number: 9585260
    Abstract: There are provided an electronic component module capable of increasing a degree of integration by mounting electronic components on both surfaces of a substrate, and a manufacturing method thereof. The electronic component module according to an exemplary embodiment of the present disclosure includes: a substrate; a plurality of electronic components mounted on both surfaces of the substrate; connection conductors each having one end bonded to one surface of the substrate using an conductive adhesive; and a molded portion having the connection conductor embedded therein and formed on one surface of the substrate, wherein the connection conductor may have at least one blocking member preventing a spread of the conductive adhesive.
    Type: Grant
    Filed: April 23, 2014
    Date of Patent: February 28, 2017
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jae Hyun Lim, Jong In Ryu, Sun Ho Kim, Eun Jung Jo, Kyu Hwan Oh, Do Jae Yoo
  • Publication number: 20170018540
    Abstract: In one general aspect, an electronic device module includes a first board, a first device mounted on a first surface of the first board, a second board disposed below the first board, and a plurality of second devices disposed between the first board and the second board, wherein a surface of each second device the plurality of second devices is bonded to a second surface of the first board and another surface of each of the second devices is bonded to the second board.
    Type: Application
    Filed: March 21, 2016
    Publication date: January 19, 2017
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jae Hyun LIM, Jong In RYU, Sung Ho KIM, Jin Su KIM
  • Publication number: 20160315027
    Abstract: A semiconductor package and manufacturing method thereof includes a chip member installed on an upper surface, a lower surface, or both of a substrate. The semiconductor package and manufacturing method thereof also include a mold part stacked embedding the chip member, a connection member disposed at a center portion of the mold part, and a solder part formed on a portion of the connection member.
    Type: Application
    Filed: January 21, 2016
    Publication date: October 27, 2016
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jong In RYU, Ki Joo SIM, Do Jae YOO, Ki Ju LEE, Jin Su KIM
  • Publication number: 20160255735
    Abstract: An electronic device on which an exterior surface mounting member is mounted is provided. The electronic device includes an external housing including a first plate and a second plate that is directed opposite to the first plate, and at least one electronic component that is included within the external housing. The first plate may include a transparent plate including a first surface that forms an outer surface of the first plate and a second surface that is directed opposite to the first surface, and a structure that is interposed between the transparent plate and the second plate, and includes a third surface that faces the first plate and a fourth surface that is formed opposite to the third surface, the structure containing a transparent or translucent material.
    Type: Application
    Filed: February 16, 2016
    Publication date: September 1, 2016
    Inventors: Soon-Ho HAN, Jong-In RYU, Byoung-Uk YOON
  • Publication number: 20160181242
    Abstract: The present invention relates to a passive device and manufacturing method thereof. A capacitor according to the present invention includes: a capacitor thin film pattern formed on the upper surface of a substrate; a plurality of trenches formed by etching the substrate formed with the capacitor thin film pattern which defines the unit area of the capacitor; an insulation layer, which fills the trench, formed with capacitor interconnection holes for exposing the metal layers formed in the substrate and constituting the capacitor; and a plurality of capacitor electrode interconnection wires formed by filling the capacitor interconnection holes with a conductive material, wherein the lower surface of the substrate is being polished in a way that the insulation layer formed in the trenches is exposed.
    Type: Application
    Filed: December 7, 2015
    Publication date: June 23, 2016
    Applicant: Korea Electronics Technology Institute
    Inventors: Jong Min YOOK, Jun Chul KIM, Dong Su KIM, Se Hoon PARK, Jong In RYU, Jong Chul PARK
  • Publication number: 20160113135
    Abstract: An electronic device and method of fabricating an exterior member thereof are provided. The electronic device includes a basic member disposed on an outside of the electronic device and having an outer surface that is at least partially curved, and a glass film at least partially laminated to the outer surface of the basic member.
    Type: Application
    Filed: September 10, 2015
    Publication date: April 21, 2016
    Inventors: Myung-Gon KIM, Jong-In RYU, Min-Su CHANG
  • Publication number: 20160035678
    Abstract: The semiconductor package includes: a substrate having at least one circuit layer; at least one electronic component mounted on at least one surface of the substrate; a molded part formed on the surface of the substrate to enclose the electronic component; at least one via formed in the molded part to be electrically connected to the circuit layer of the substrate; and a semiconductive pattern connected to one end of a plated tail connected to the circuit layer connected to the via and exposed to the exterior of the substrate.
    Type: Application
    Filed: July 28, 2015
    Publication date: February 4, 2016
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Do Jae YOO, Kyu Hwan OH, Jong In RYU, Jae Hyun LIM
  • Publication number: 20160021737
    Abstract: An electronic device module includes a board including one or more external connection electrodes and plating lines extending from the external connection electrodes by a predetermined distance; one or more electronic devices mounted on the board; a molded part sealing the electronic devices; and a plurality of connective conductors extending from the external connection electrodes and penetrating through the molded part to be disposed within the molded part.
    Type: Application
    Filed: May 28, 2015
    Publication date: January 21, 2016
    Inventors: Kyu Hwan OH, Do Jae YOO, Jong In RYU, Jae Hyun LIM
  • Publication number: 20160007463
    Abstract: An electronic device module includes: a board including at least one mounting electrode and at least one external connection electrode and having a protective insulation layer which is provided on an outer surface thereof; at least one electronic device mounted on the mounting electrodes; a molded part sealing the electronic device; and at least one connective conductor of which one end is bonded to the external connection electrode of the board and which penetrates through the molded part to be disposed in the molded part, wherein the protective insulation layer is disposed to be spaced apart from the connective conductor.
    Type: Application
    Filed: June 5, 2015
    Publication date: January 7, 2016
    Inventors: Do Jae YOO, Jae Hyun LIM, Jong In RYU, Kyu Hwan OH, Ki Ju LEE
  • Patent number: 9196506
    Abstract: A method for manufacturing an interposer includes forming a via hole in an insulation plate including a resin or a ceramic; simultaneously forming resists for a first upper redistribution layer on the top surface of the insulation plate, and a resistor for a lower redistribution layer on the bottom surface of the insulation plate; plating copper to fill the via hole and simultaneously forming the first upper redistribution layer and the lower redistribution layer along a designed circuit pattern; and forming a first upper protection layer and a lower protection layer to expose a portion of the first upper redistribution layer and a portion of the lower redistribution layer.
    Type: Grant
    Filed: October 1, 2012
    Date of Patent: November 24, 2015
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Hyung Jin Jeon, Jong In Ryu, Seung Wan Shin, Seon Hee Moon, Young Do Kweon, Seung Wook Park
  • Publication number: 20150289392
    Abstract: An electronic device module includes a board including external connecting electrodes and mounting electrodes; an electronic device mounted on the mounting electrodes; a molded portion sealing the electronic device; connection conductors having an end bonded to the external connecting electrodes and penetrating through the molded portion; and external terminals bonded to another end of the connection conductors.
    Type: Application
    Filed: April 1, 2015
    Publication date: October 8, 2015
    Inventors: Do Jae YOO, Jae Hyun LIM, Kyu Hwan OH, Jong In RYU
  • Publication number: 20150228625
    Abstract: There are provided a semiconductor package and a method of manufacturing the same. According to an exemplary embodiment of the present disclosure, a semiconductor package includes: a semiconductor device formed in a multilayer; a plurality of wires electrically connected to both sides of a plurality of semiconductor devices; a first mold via electrically connected to the plurality of wires which are formed at one side of the plurality of semiconductor devices; a second mold via electrically connected to the plurality of wires which are formed at the other side of the plurality of semiconductor device; and a first molding part enclosing the plurality of semiconductor device and formed to expose upper surface parts of the first mold via and the second mold via.
    Type: Application
    Filed: January 27, 2015
    Publication date: August 13, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jae Hyun Lim, Do Jae Yoo, Eun Jung Jo, Kyu Hwan Oh, Jong In Ryu