Patents by Inventor Jong Oh Kwon

Jong Oh Kwon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7663083
    Abstract: An image sensor module capable of facilitating an electrical and mechanical connection of an electric component and a fabrication thereof are disclosed.
    Type: Grant
    Filed: August 5, 2008
    Date of Patent: February 16, 2010
    Assignees: Samsung Electronics Co., Ltd., Samsung Electro-Mechanics Co., Ltd
    Inventors: Jong-oh Kwon, Yoon-chul Son, Kyu-dong Jung, Woon-bae Kim
  • Patent number: 7619837
    Abstract: A varifocal optical device is provided. The varifocal optical device includes an optical lens, an actuator unit connected with the optical lens and having two areas that are bending-deformed in opposite directions to each other when a voltage is applied thereto, and a supporting unit to support the actuator unit, so that a focus of the optical lens is varied by the bending deformation when the voltage is applied to the actuator unit. Thereby, a driving displacement of the varifocal optical lens can be maximized.
    Type: Grant
    Filed: February 25, 2008
    Date of Patent: November 17, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung-tae Choi, Tae-sang Park, Jeong-yub Lee, Jong-oh Kwon, Che-heung Kim, Seung-wan Lee, Woon-bae Kim
  • Publication number: 20090166511
    Abstract: An image sensor module capable of facilitating an electrical and mechanical connection of an electric component and a fabrication thereof are disclosed.
    Type: Application
    Filed: August 5, 2008
    Publication date: July 2, 2009
    Applicants: Samsung Electronics Co., Ltd., Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jong-oh KWON, Yoon-chul Son, Kyu-dong Jung, Woon-bae Kim
  • Publication number: 20090142050
    Abstract: A micro shutter with an iris function includes a base plate with a transparent portion formed in a circular shape corresponding to an image sensor which allows light to pass through; a plurality of rollup blades which block the light, arranged in a regular polygon at a circumference of the transparent portion on the base plate to cover the transparent portion, and each of the plurality of rollup blades to have a fixing portion fixed to the base plate and a moving portion rolled up toward the fixing portion; and a controller electrically connected with the base plate and the plurality of rollup blades which controls unrolling degrees of the plurality of rollup blades.
    Type: Application
    Filed: June 6, 2008
    Publication date: June 4, 2009
    Applicants: Samsung Electronics Co., Ltd., Samsung Electro-Mechanics Co., Ltd.
    Inventors: Che-heung KIM, Woon-bae Kim, Jong-oh Kwon, Kyu-dong Jung
  • Publication number: 20090097140
    Abstract: A varifocal optical device is provided. The varifocal optical device includes an optical lens, an actuator unit connected with the optical lens and having two areas that are bending-deformed in opposite directions to each other when a voltage is applied thereto, and a supporting unit to support the actuator unit, so that a focus of the optical lens is varied by the bending deformation when the voltage is applied to the actuator unit. Thereby, a driving displacement of the varifocal optical lens can be maximized.
    Type: Application
    Filed: February 25, 2008
    Publication date: April 16, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung-tae Choi, Tae-sang Park, Jeong-yub Lee, Jong-oh Kwon, Che-heung Kim, Seung-wan Lee, Woon-bae Kim
  • Patent number: 7510968
    Abstract: A cap for a semiconductor device package, including a body formed at a predetermined thickness with a cavity. The cap further includes a first seed layer formed on an inner circumference of a first via hole formed at a predetermined depth from the cavity formation surface of the body, a second seed layer formed on an inner circumference of a second via hole formed at a predetermined depth from the opposite surface to the cavity formation surface of the body, and plating materials filled in the first via hole and the second via hole.
    Type: Grant
    Filed: April 28, 2006
    Date of Patent: March 31, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Moon-chul Lee, Jong-oh Kwon, Kae-dong Back, Qian Wang, Jun-sik Hwang, Kyu-dong Jung
  • Publication number: 20080292814
    Abstract: An image forming element, a fabricating method of the image forming element, and an image forming apparatus having the image forming element is provided. The image forming element includes a drum body, a driving circuit mounted within the drum body, a support plate which penetrates through the drum body longitudinally along the drum body, the support plate being coupled to the driving circuit, an insulating layer formed on at least one portion of an outer circumference of the drum body, a conductive polymer layer formed on the insulating layer, the conductive polymer layer including one or more conductive areas and one or more insulating areas, which are aligned in an alternating pattern, and a protective layer formed on the conductive polymer layer, wherein the conductive areas on the conductive polymer layer are electrically connected to the driving circuit.
    Type: Application
    Filed: January 16, 2008
    Publication date: November 27, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Woon-bae KIM, Jong-oh Kwon, Seung-tae Choi, Chang-youl Moon, Soon-cheol Kwon, Ki-hwan Kwon
  • Patent number: 7456709
    Abstract: A bulk acoustic resonance and a method for fabricating the bulk acoustic resonator, the bulk acoustic resonator including: a substrate including an upper surface defining a predetermined area including a cavity; a resonance part positioned above the cavity and including a surface comprising a dimple; and an anchor part connecting the resonance part to the substrate. The resonance part includes: a lower electrode including a lower surface including a predetermined dimpled area and an upper surface opposite to the predetermined dimpled area; a piezoelectric layer stacked on the upper surface of the lower electrode; and an upper electrode stacked on the piezoelectric layer. Because direction of the vibration of the resonator is adjustable by adjusting position, area, and the number of the dimples, process freedom can be improved.
    Type: Grant
    Filed: April 5, 2006
    Date of Patent: November 25, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyu-dong Jung, Jong-oh Kwon, Woon-bae Kim, In-sang Song
  • Publication number: 20080284277
    Abstract: An electroactive polymer actuator and a method for manufacturing the electroactive polymer actuator are provided. The electroactive polymer actuator includes an actuator unit which is a laminate of a plurality of deformation layers; and a support layer which supports the actuator unit so that the actuator unit provides displacement corresponding to a voltage if the voltage is applied to the actuator unit. Therefore, it is possible to provide an electroactive polymer actuator suitable for a compact mobile device with a low driving voltage.
    Type: Application
    Filed: October 30, 2007
    Publication date: November 20, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jong-oh KWON, Seung-tae CHOI, Seung-wan LEE, Woon-bae KIM, Min-seog CHOI
  • Patent number: 7449366
    Abstract: A wafer level packaging cap for covering a device wafer with a device thereon and a fabrication method thereof are provided. The method includes operations of forming a plurality of connection grooves on a wafer, forming a seed layer on the connection grooves, forming connection parts by filling the connection grooves with a metal material, forming cap pads on a top surface of the wafer to be electrically connected to the connection parts, bonding a supporting film with the top surface of the wafer on which the cap pads are formed, forming a cavity on a bottom surface of the wafer to expose the connection parts through the cavity, and forming metal lines on the bottom surface of the wafer to be electrically connected to the connection parts.
    Type: Grant
    Filed: March 2, 2006
    Date of Patent: November 11, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Moon-chul Lee, Jong-oh Kwon, Woon-bae Kim, Ji-hyuk Lim, Suk-jin Ham, Jun-sik Hwang, Chang-youl Moon
  • Publication number: 20080213966
    Abstract: An inductor embedded in a substrate, including a substrate, a coil electrode formed by filling a metal in a spiral hole formed on the substrate, an insulation layer formed on the substrate, and an external connection pad formed on the insulation layer to be connected to the coil electrode. The inductor-embedded substrate can be used as a cap for a micro device package by forming a cavity on its bottom surface.
    Type: Application
    Filed: February 8, 2008
    Publication date: September 4, 2008
    Inventors: Moon-chul LEE, Jong-oh Kwon, Woon-bae Kim, Jea-shik Shin, Jun-sik Hwang, Eun-sung Lee
  • Patent number: 7417525
    Abstract: An inductor is provided which includes a plurality of via holes vertically passing through a substrate, the substrate having insulating properties, vertical conductive portions filling the via holes, and horizontal conductive portions connecting each individual vertical conductive portions at the top and the bottom of the substrate to form a single coil structure with the vertical conductive portions.
    Type: Grant
    Filed: May 3, 2006
    Date of Patent: August 26, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Moon Chul Lee, Jong Oh Kwon, Woon Bae Kim, Jun Sik Hwang, Chang youl Moon, In Sang Song
  • Patent number: 7408434
    Abstract: An inductor embedded in a substrate, including a substrate, a coil electrode formed by filling a metal in a spiral hole formed on the substrate, an insulation layer formed on the substrate, and an external connection pad formed on the insulation layer to be connected to the coil electrode. The inductor-embedded substrate can be used as a cap for a micro device package by forming a cavity on its bottom surface.
    Type: Grant
    Filed: April 10, 2006
    Date of Patent: August 5, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Moon-chul Lee, Jong-oh Kwon, Woon-bae Kim, Jea-shik Shin, Jun-sik Hwang, Eun-sung Lee
  • Patent number: 7374972
    Abstract: A micro package, a multi-stack micro package, and a manufacture method therefor are provided. A micro package according to the present invention includes a device substrate for mounting a devices, being a circuit module; a protection cap for protecting the device; bonding substances which, formed by patterning on predetermined areas on the device substrate, bond the device substrate and the protection cap; layers formed on a portion of the device substrate and a portion of the protection cap and exterior sides of the bonding substances; vias which are formed by etching away another portion of the protection cap, and electrically connected to an upper surface of the device substrate through the bonding substances; under barrier metals (UBMs) formed on the vias; and solder bumpers, being connection terminals for an external signal, formed on the UBMs.
    Type: Grant
    Filed: July 24, 2007
    Date of Patent: May 20, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-oh Kwon, Woon-bae Kim, In-sang Song, Ji-hyuk Lim, Suk-jin Ham, Byung-gil Jeong
  • Publication number: 20070264757
    Abstract: A micro package, a multi-stack micro package, and a manufacture method therefor are provided. A micro package according to the present invention includes a device substrate for mounting a devices, being a circuit module; a protection cap for protecting the device; bonding substances which, formed by patterning on predetermined areas on the device substrate, bond the device substrate and the protection cap; layers formed on a portion of the device substrate and a portion of the protection cap and exterior sides of the bonding substances; vias which are formed by etching away another portion of the protection cap, and electrically connected to an upper surface of the device substrate through the bonding substances; under barrier metals (UBMs) formed on the vias; and solder bumpers, being connection terminals for an external signal, formed on the UBMs.
    Type: Application
    Filed: July 24, 2007
    Publication date: November 15, 2007
    Inventors: Jong-oh KWON, Woon-Bae Kim, In-sang Song, Ji-hyuk Lim, Suk-jin Ham, Byung-gil Jeong
  • Patent number: 7285865
    Abstract: A micro package, a multi-stack micro package, and a manufacture method therefor are provided. A micro package according to the present invention includes a device substrate for mounting a devices, being a circuit module; a protection cap for protecting the device; bonding substances which, formed by patterning on predetermined areas on the device substrate, bond the device substrate and the protection cap; layers formed on a portion of the device substrate and a portion of the protection cap and exterior sides of the bonding substances; vias which are formed by etching away another portion of the protection cap, and electrically connected to an upper surface of the device substrate through the bonding substances; under barrier metals (UBMs) formed on the vias; and solder bumpers, being connection terminals for an external signal, formed on the UBMs.
    Type: Grant
    Filed: April 4, 2006
    Date of Patent: October 23, 2007
    Assignee: Samsung Electronic Co., Ltd.
    Inventors: Jong-oh Kwon, Woon-bae Kim, In-sang Song, Ji-hyuk Lim, Suk-jin Ham, Byung-gil Jeong
  • Patent number: 7282388
    Abstract: In a method for manufacturing an FBAR device, the device includes a substrate having a certain size, at least one device functional portion performing a resonance function by responding to electrical signals applied from the outside, the device functional portion being formed along a center portion of the substrate while defining a certain air gap therein, plural external electrodes formed on an upper surface of the substrate substantially coming into contact with both opposite edges of the upper surface, the external electrodes being electrically connected to the device functional portion, and a cap bonded onto the substrate so as to function as a cover for covering a remaining portion of the substrate except for the plural external electrodes.
    Type: Grant
    Filed: January 13, 2004
    Date of Patent: October 16, 2007
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Jong Oh Kwon
  • Patent number: 7241966
    Abstract: The present invention relates to a WLP fabrication method capable of welding a lid wafer with a device wafer by using laser illumination. The WLP fabrication method can rapidly weld bonding metal strips of device and lid wafers with each other in order to couple the lid wafer with the device wafer while sealing an internal cavity from the outside without giving any thermal effect to a drive unit in the device wafer.
    Type: Grant
    Filed: November 4, 2004
    Date of Patent: July 10, 2007
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Kook Hyun Sunwoo, Jong Oh Kwon, Joo Ho Lee
  • Publication number: 20070096227
    Abstract: A wafer level package for a surface acoustic wave device and a fabrication method thereof include a SAW device formed with a SAW element on an upper surface of a device wafer; a cap wafer joined on an upper part of the SAW element; a cavity part housing the SAW element between the cap wafer and the SAW device; a cap pad formed on an upper surface of the cap wafer; and a metal line formed to penetrate through the cap wafer to electrically connect the cap pad and the SAW element, the device wafer and the cap wafer being made of the same materials.
    Type: Application
    Filed: May 2, 2006
    Publication date: May 3, 2007
    Inventors: Ji-hyuk Lim, Jun-sik Hwang, Woon-bae Kim, Suk-jin Ham, Jong-oh Kwon, Moon-chul Lee, Chang-youl Moon
  • Publication number: 20070085195
    Abstract: A wafer level packaging cap for covering a device wafer with a device thereon and a fabrication method thereof are provided. The method includes operations of forming a plurality of connection grooves on a wafer, forming a seed layer on the connection grooves, forming connection parts by filling the connection grooves with a metal material, forming cap pads on a top surface of the wafer to be electrically connected to the connection parts, bonding a supporting film with the top surface of the wafer on which the cap pads are formed, forming a cavity on a bottom surface of the wafer to expose the connection parts through the cavity, and forming metal lines on the bottom surface of the wafer to be electrically connected to the connection parts.
    Type: Application
    Filed: March 2, 2006
    Publication date: April 19, 2007
    Inventors: Moon-chul Lee, Jong-oh Kwon, Woon-bae Kim, Ji-hyuk Lim, Suk-jin Ham, Jun-sik Hwang, Chang-youl Moon