Patents by Inventor Jong Oh Kwon

Jong Oh Kwon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070012655
    Abstract: A micro package, a multi-stack micro package, and a manufacture method therefor are provided. A micro package according to the present invention includes a device substrate for mounting a devices, being a circuit module; a protection cap for protecting the device; bonding substances which, formed by patterning on predetermined areas on the device substrate, bond the device substrate and the protection cap; layers formed on a portion of the device substrate and a portion of the protection cap and exterior sides of the bonding substances; vias which are formed by etching away another portion of the protection cap, and electrically connected to an upper surface of the device substrate through the bonding substances; under barrier metals (UBMs) formed on the vias; and solder bumpers, being connection terminals for an external signal, formed on the UBMs.
    Type: Application
    Filed: April 4, 2006
    Publication date: January 18, 2007
    Inventors: Jong-oh Kwon, Woon-bae Kim, In-sang Song, Ji-hyuk Lim, Suk-jin Ham, Byung-gil Jeong
  • Publication number: 20070008050
    Abstract: A bulk acoustic resonance and a method for fabricating the bulk acoustic resonator, the bulk acoustic resonator including: a substrate including an upper surface defining a predetermined area including a cavity; a resonance part positioned above the cavity and including a surface comprising a dimple; and an anchor part connecting the resonance part to the substrate. The resonance part includes: a lower electrode including a lower surface including a predetermined dimpled area and an upper surface opposite to the predetermined dimpled area; a piezoelectric layer stacked on the upper surface of the lower electrode; and an upper electrode stacked on the piezoelectric layer. Because direction of the vibration of the resonator is adjustable by adjusting position, area, and the number of the dimples, process freedom can be improved.
    Type: Application
    Filed: April 5, 2006
    Publication date: January 11, 2007
    Inventors: Kyu-dong Jung, Jong-oh Kwon, Woon-bae Kim, In-sang Song
  • Publication number: 20060290457
    Abstract: An inductor embedded in a substrate, including a substrate, a coil electrode formed by filling a metal in a spiral hole formed on the substrate, an insulation layer formed on the substrate, and an external connection pad formed on the insulation layer to be connected to the coil electrode. The inductor-embedded substrate can be used as a cap for a micro device package by forming a cavity on its bottom surface.
    Type: Application
    Filed: April 10, 2006
    Publication date: December 28, 2006
    Inventors: Moon-chul Lee, Jong-oh Kwon, Woon-bae Kim, Jea-shik Shin, Jun-sik Hwang, Eun-sung Lee
  • Publication number: 20060286798
    Abstract: A cap for a semiconductor device package, including a body formed at a predetermined thickness with a cavity. The cap further includes a first seed layer formed on an inner circumference of a first via hole formed at a predetermined depth from the cavity formation surface of the body, a second seed layer formed on an inner circumference of a second via hole formed at a predetermined depth from the opposite surface to the cavity formation surface of the body, and plating materials filled in the first via hole and the second via hole.
    Type: Application
    Filed: April 28, 2006
    Publication date: December 21, 2006
    Inventors: Moon-chul Lee, Jong-oh Kwon, Kae-dong Back, Qian Wang, Jun-sik Hwang, Kyu-dong Jung
  • Patent number: 6965281
    Abstract: Disclosed herein is a film bulk acoustic resonator (FBAR), an FBAR based duplexer device, and a manufacturing method thereof, which a plurality of sacrificial layer units are formed on a substrate wafer so as to be spaced apart from one another at regular distances, and device functional portions are formed on the sacrificial layer units, respectively. The device functional portions have a piezoelectric layer unit and a plurality of electrodes. Then, side wall and roof of protective formed by the use of dry film. After hardening the dry film, the wafer is cut into a plurality of the wafer sections so as to contain the device functional portions, respectively.
    Type: Grant
    Filed: January 14, 2004
    Date of Patent: November 15, 2005
    Assignee: Samsung Electro-Mechanics Co., ltd.
    Inventors: Kook Hyun Sunwoo, Jong Oh Kwon
  • Patent number: 6946320
    Abstract: Disclosed herein is an FBAR based duplexer device and a manufacturing method thereof, which can achieve miniaturization, and reduction of a manufacturing cost and enhancement of a yield due to a simplified process. According to the present invention, first, a plurality of FBAR chips are prepared. Each of the FBAR chips includes a substrate, air gaps and piezoelectric layer unit; which are successively arranged, a plurality of electrode pads electrically connected to the piezoelectric layer unit, and bump balls formed on the electrode pads in a one to one ratio. Then, a duplexer substrate having a duplexing circuit is prepared, and a plurality of the FBAR chips come into contact with the duplexer substrate. In this state, they are reversed so that the substrates of the FBAR chips face upward, and the bump balls are bonded to the duplexer substrate.
    Type: Grant
    Filed: January 12, 2004
    Date of Patent: September 20, 2005
    Assignee: Samsung-Electro Mechanics Co., Ltd.
    Inventors: Kook Hyun Sunwoo, Jong Oh Kwon
  • Publication number: 20050070045
    Abstract: Disclosed herein is an FBAR based duplexer device and a manufacturing method thereof, which can achieve miniaturization, and reduction of a manufacturing cost and enhancement of a yield due to a simplified process. According to the present invention, first, a plurality of FBAR chips are prepared. Each of the FBAR chips comprises a substrate, air gaps and piezoelectric layer unit, which are successively arranged, a plurality of electrode pads electrically connected to the piezoelectric layer unit, and bump balls formed on the electrode pads in a one to one ratio. Then, a duplexer substrate having a duplexing circuit is prepared, and a plurality of the FBAR chips come into contact with the duplexer substrate. In this state, they are reversed so that the substrates of the FBAR chips face upward, and the bump balls are bonded to the duplexer substrate.
    Type: Application
    Filed: January 12, 2004
    Publication date: March 31, 2005
    Inventors: Kook Hyun Sunwoo, Jong Oh Kwon