Patents by Inventor Jong Wang

Jong Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10912760
    Abstract: The present invention relates to a method for inhibiting a cancer metastasis in a subject in need thereof, comprising administering to said subject a cancer metastasis-inhibiting effective amount of: Camphorataimide B; or a composition comprising Camphorataimide B and a pharmaceutically acceptable adjuvant, vehicle, or carrier.
    Type: Grant
    Filed: August 9, 2019
    Date of Patent: February 9, 2021
    Assignee: Chung Shan Medical University
    Inventors: Chau-Jong Wang, Chia-Hung Hung
  • Publication number: 20210020670
    Abstract: A BSI image sensor includes a substrate including a front side and a back side opposite to the front side, a plurality of pixel sensors, an isolation grid disposed in the substrate and separating the plurality of pixel sensors from each other, a reflective grid disposed over the isolation grid on the back side of the substrate, an a low-n grid disposed over the back side of the substrate and overlapping the reflective grid from a top view. A width of the low-n grid is greater than a width of the reflective grid.
    Type: Application
    Filed: September 30, 2020
    Publication date: January 21, 2021
    Inventors: KENG-YU CHOU, WEI-CHIEH CHIANG, CHEN-JONG WANG, CHIEN-HSIEN TSENG, KAZUAKI HASHIMOTO
  • Publication number: 20210005649
    Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.
    Type: Application
    Filed: September 16, 2020
    Publication date: January 7, 2021
    Inventors: Seiji Takahashi, Chen-Jong Wang, Dun-Nian Yaung, Feng-Chi Hung, Feng-Jia Shiu, Jen-Cheng Liu, Jhy-Jyi Sze, Chun-Wei Chang, Wei-Cheng Hsu, Wei Chuang Wu, Yimin Huang
  • Patent number: 10847606
    Abstract: A system-on-chip (SOC) device comprises a first capacitor in a first region, a second capacitor in a second region, and may further comprise a third capacitor in a third region, and any additional number of capacitors in additional regions. The capacitors may be of different shapes and sizes. A region may comprise more than one capacitor. Each capacitor in a region has a top electrode, a bottom electrode, and a capacitor insulator. The top electrodes of all the capacitors are formed in a common process, while the bottom electrodes of all the capacitors are formed in a common process. The capacitor insulator may have different number of sub-layers, formed with different materials or different thickness. The capacitors may be formed in an inter-layer dielectric layer or in an inter-metal dielectric layer. The regions may be a mixed signal region, an analog region, a radio frequency region, a dynamic random access memory region, and so forth.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: November 24, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuo-Chi Tu, Wen-Chuan Chiang, Chen-Jong Wang
  • Patent number: 10797096
    Abstract: A BSI image sensor includes a substrate including a front side and a back side opposite to the front side, a plurality of pixel sensors arranged in an array, an isolation grid disposed in the substrate and separating the plurality of pixel sensors from each other, a reflective grid disposed over the isolation grid on the back side of the substrate, an a low-n grid disposed over the back side of the substrate and overlapping the reflective grid from a top view. A depth of the reflective grid is less than a depth of the isolation grid. A width of the low-n grid is greater than a width of the reflective grid.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: October 6, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Keng-Yu Chou, Wei-Chieh Chiang, Chen-Jong Wang, Chien-Hsien Tseng, Kazuaki Hashimoto
  • Patent number: 10797091
    Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: October 6, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Seiji Takahashi, Chen-Jong Wang, Dun-Nian Yaung, Feng-Chi Hung, Feng-Jia Shiu, Jen-Cheng Liu, Jhy-Jyi Sze, Chun-Wei Chang, Wei-Cheng Hsu, Wei Chuang Wu, Yimin Huang
  • Publication number: 20200303431
    Abstract: An image sensor is disclosed. The image sensor includes an epitaxial layer, a plurality of plug structures and an interconnect structure. Wherein the plurality of plug structures are formed in the epitaxial layer, and each plug structure has doped sidewalls, the epitaxial layer and the doped sidewalk form a plurality of photodiodes, the plurality of plug structures are used to separate adjacent photodiodes, and the epitaxial layer and the doped sidewalls are coupled to the interconnect structure via the plug structures. An associated method of fabricating the image sensor is also disclosed. The method includes: providing a substrate having a first-type doped epitaxial substrate layer on a second-type doped epitaxial substrate layer; forming a plurality of isolation trenches in the first-type doped epitaxial substrate layer; forming a second-type doped region along sidewalk and bottoms of the plurality of isolation trenches; and filling the plurality of isolation trenches by depositing metal.
    Type: Application
    Filed: June 8, 2020
    Publication date: September 24, 2020
    Inventors: ALEXANDER KALNITSKY, JHY-JYI SZE, DUN-NIAN YAUNG, CHEN-JONG WANG, YIMIN HUANG, YUICHIRO YAMASHITA
  • Patent number: 10692914
    Abstract: An image sensor is disclosed. The image sensor includes an epitaxial layer, a plurality of plug structures and an interconnect structure. Wherein the plurality of plug structures are formed in the epitaxial layer, and each plug structure has doped sidewalls, the epitaxial layer and the doped sidewalls form a plurality of photodiodes, the plurality of plug structures are used to separate adjacent photodiodes, and the epitaxial layer and the doped sidewalls are coupled to the interconnect structure via the plug structures. An associated method of fabricating the image sensor is also disclosed. The method includes: providing a substrate having a first-type doped epitaxial substrate layer on a second-type doped epitaxial substrate layer; forming a plurality of isolation trenches in the first-type doped epitaxial substrate layer; forming a second-type doped region along sidewalls and bottoms of the plurality of isolation trenches; and filling the plurality of isolation trenches by depositing metal.
    Type: Grant
    Filed: January 7, 2019
    Date of Patent: June 23, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Alexander Kalnitsky, Jhy-Jyi Sze, Dun-Nian Yaung, Chen-Jong Wang, Yimin Huang, Yuichiro Yamashita
  • Publication number: 20200135844
    Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a dielectric structure disposed over a substrate. A plurality of conductive interconnect layers are disposed within the dielectric structure. The plurality of conductive interconnect layers include alternating layers of interconnect wires and interconnect vias. A metal-insulating-metal (MIM) capacitor is arranged within the dielectric structure. The MIM capacitor has a lower conductive electrode separated from an upper conductive electrode by a capacitor dielectric structure. The MIM capacitor vertically extends past two or more of the plurality of conductive interconnect layers.
    Type: Application
    Filed: March 27, 2019
    Publication date: April 30, 2020
    Inventors: Seiji Takahashi, Chen-Jong Wang, Dun-Nian Yaung, Jung-I Lin, Jhy-Jyi Sze, Alexander Kalnitsky, Yimin Huang, King Liao, Shen-Hui Hong
  • Publication number: 20200111822
    Abstract: A BSI image sensor includes a substrate including a front side and a back side opposite to the front side, a plurality of pixel sensors arranged in an array, an isolation grid disposed in the substrate and separating the plurality of pixel sensors from each other, a reflective grid disposed over the isolation grid on the back side of the substrate, an a low-n grid disposed over the back side of the substrate and overlapping the reflective grid from a top view. A depth of the reflective grid is less than a depth of the isolation grid. A width of the low-n grid is greater than a width of the reflective grid.
    Type: Application
    Filed: December 6, 2019
    Publication date: April 9, 2020
    Inventors: Keng-Yu Chou, Wei-Chieh Chiang, Chen-Jong Wang, Chien-Hsien Tseng, Kazuaki Hashimoto
  • Publication number: 20200075600
    Abstract: A semiconductor arrangement includes an active region including a semiconductor device. The semiconductor arrangement includes a capacitor. The capacitor includes a first electrode over at least one dielectric layer over the active region. The first electrode surrounds an open space within the capacitor. The first electrode has a non-linear first electrode sidewall.
    Type: Application
    Filed: November 8, 2019
    Publication date: March 5, 2020
    Inventors: Chern-Yow HSU, Chen-Jong WANG, Chia-Shiung TSAI, Ming Chyi LIU, Shih-Chang LIU, Xiaomeng CHEN
  • Patent number: 10510788
    Abstract: A BSI image sensor includes a substrate including a front side and a back side opposite to the front side, a plurality of pixel sensors arranged in an array, an isolation grid disposed in the substrate and separating the plurality of pixel sensors from each other, and a reflective grid disposed over the isolation grid on the back side of the substrate. A depth of the reflective grid is less than a depth of the isolation grid.
    Type: Grant
    Filed: March 22, 2018
    Date of Patent: December 17, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Keng-Yu Chou, Wei-Chieh Chiang, Chen-Jong Wang, Chien-Hsien Tseng, Kazuaki Hashimoto
  • Patent number: 10504904
    Abstract: A semiconductor arrangement includes an active region including a semiconductor device. The semiconductor arrangement includes a capacitor. The capacitor includes a first electrode over at least one dielectric layer over the active region. The first electrode surrounds an open space within the capacitor. The first electrode has a non-linear first electrode sidewall.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: December 10, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Chern-Yow Hsu, Chen-Jong Wang, Chia-Shiung Tsai, Ming Chyi Liu, Shih-Chang Liu, Xiaomeng Chen
  • Publication number: 20190371838
    Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.
    Type: Application
    Filed: August 27, 2018
    Publication date: December 5, 2019
    Inventors: Seiji Takahashi, Chen-Jong Wang, Dun-Nian Yaung, Feng-Chi Hung, Feng-Jia Shiu, Jen-Cheng Liu, Jhy-Jyi Sze, Chun-Wei Chang, Wei-Cheng Hsu, Wei Chuang Wu, Yimin Huang
  • Publication number: 20190252389
    Abstract: A semiconductor arrangement includes an active region including a semiconductor device. The semiconductor arrangement includes a capacitor having a first electrode layer, a second electrode layer, and an insulating layer between the first electrode layer and the second electrode layer. At least three dielectric layers are between a bottom surface of the capacitor and the active region.
    Type: Application
    Filed: April 22, 2019
    Publication date: August 15, 2019
    Inventors: Chern-Yow HSU, Chen-Jong WANG, Chia-Shiung TSAI, Shih-Chang LIU, Xiaomeng CHEN
  • Patent number: 10332636
    Abstract: A corneal young's modulus algorithm and system using the same is provided, comprising a tonometer and a computation unit. The computation unit comprises an algorithm for calculating young's modulus. The algorithm comprises: (S1) read at least one parameter measured by a tonometer; (S2) apply the at least one parameter and an initial value of Young's modulus to a first equation to obtain an inner deformation amount and an outer deformation amount; (S3) apply the inner deformation amount and the outer deformation amount to a second equation to obtain a calculated deformation amount; (S4) determine if an error value between the calculated deformation amount and the actual deformation amount is minimal; and (S5) obtain Young's modulus.
    Type: Grant
    Filed: February 17, 2016
    Date of Patent: June 25, 2019
    Assignee: NATIONAL TAIWAN UNIVERSITY
    Inventors: Jia-Yush Yen, I-Jong Wang, Po-Jen Shih, Chun-Ju Huang, Tzu-Han Huang
  • Publication number: 20190139999
    Abstract: An image sensor is disclosed. The image sensor includes an epitaxial layer, a plurality of plug structures and an interconnect structure. Wherein the plurality of plug structures are formed in the epitaxial layer, and each plug structure has doped sidewalls, the epitaxial layer and the doped sidewalls form a plurality of photodiodes, the plurality of plug structures are used to separate adjacent photodiodes, and the epitaxial layer and the doped sidewalls are coupled to the interconnect structure via the plug structures. An associated method of fabricating the image sensor is also disclosed. The method includes: providing a substrate having a first-type doped epitaxial substrate layer on a second-type doped epitaxial substrate layer; forming a plurality of isolation trenches in the first-type doped epitaxial substrate layer; forming a second-type doped region along sidewalls and bottoms of the plurality of isolation trenches; and filling the plurality of isolation trenches by depositing metal.
    Type: Application
    Filed: January 7, 2019
    Publication date: May 9, 2019
    Inventors: ALEXANDER KALNITSKY, JHY-JYI SZE, DUN-NIAN YAUNG, CHEN-JONG WANG, YIMIN HUANG, YUICHIRO YAMASHITA
  • Publication number: 20190131327
    Abstract: A BSI image sensor includes a substrate including a front side and a back side opposite to the front side, a plurality of pixel sensors arranged in an array, an isolation grid disposed in the substrate and separating the plurality of pixel sensors from each other, and a reflective grid disposed over the isolation grid on the back side of the substrate. A depth of the reflective grid is less than a depth of the isolation grid.
    Type: Application
    Filed: March 22, 2018
    Publication date: May 2, 2019
    Inventors: KENG-YU CHOU, WEI-CHIEH CHIANG, CHEN-JONG WANG, CHIEN-HSIEN TSENG, KAZUAKI HASHIMOTO
  • Patent number: 10269807
    Abstract: A semiconductor arrangement includes an active region including a semiconductor device. The semiconductor arrangement includes a capacitor having a first electrode layer, a second electrode layer, and an insulating layer between the first electrode layer and the second electrode layer. At least three dielectric layers are between a bottom surface of the capacitor and the active region.
    Type: Grant
    Filed: December 4, 2017
    Date of Patent: April 23, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chern-Yow Hsu, Chen-Jong Wang, Chia-Shiung Tsai, Shih-Chang Liu, Xiaomeng Chen
  • Patent number: 10269858
    Abstract: Among other things, one or more image sensors and techniques for forming image sensors are provided. An image sensor comprises a photodiode array configured to detect light. The image sensor comprises an oxide grid comprising a first oxide grid portion and a second oxide grid portion. A metal grid is formed between the first oxide grid portion and the second oxide grid portion. The oxide grid and the metal grid define a filler grid. The filler grid comprises a filler grid portion, such as a color filter, that allows light to propagate through the filler grid portion to an underlying photodiode. The oxide grid and the metal grid confine or channel the light within the filler grid portion. The oxide grid and the metal grid are formed such that the filler grid provides a relatively shorter propagation path for the light, which improves light detection performance of the image sensor.
    Type: Grant
    Filed: March 8, 2018
    Date of Patent: April 23, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Shyh-Fann Ting, Ching-Chun Wang, Chen-Jong Wang, Jhy-Jyi Sze, Chun-Ming Su, Wei Chuang Wu, Yu-Jen Wang