Abstract: A color filter array and micro-lens structure for imaging system and method of forming the color filter array and micro-lens structure. A micro-lens material is used to fill the space between the color filters to re-direct incident radiation, and form a micro-lens structure above a top surface of the color filters.

Abstract: Embedded memories. The devices include a substrate, a first dielectric layer, a second dielectric layer, a third dielectric layer, and a plurality of capacitors. The substrate comprises transistors. The first dielectric layer, embedding first and second conductive plugs electrically connecting the transistors therein, overlies the substrate. The second dielectric layer, comprising a plurality of capacitor openings exposing the first conductive plugs, overlies the first dielectric layer. The capacitors comprise a plurality of bottom plates, respectively disposed in the capacitor openings, electrically connecting the first conductive plugs, a plurality of capacitor dielectric layers respectively overlying the bottom plates, and a top plate, comprising a top plate opening, overlying the capacitor dielectric layers. The top plate opening exposes the second dielectric layer, and the top plate is shared by the capacitors.

Abstract: Embodiments of MIM capacitors may be embedded into a thick IMD layer with enough thickness (e.g., 10 K?˜30 K?) to get high capacitance, which may be on top of a thinner IMD layer. MIM capacitors may be formed among three adjacent metal layers which have two thick IMD layers separating the three adjacent metal layers. Materials such as TaN or TiN are used as bottom/top electrodes & Cu barrier. The metal layer above the thick IMD layer may act as the top electrode connection. The metal layer under the thick IMD layer may act as the bottom electrode connection. The capacitor may be of different shapes such as cylindrical shape, or a concave shape. Many kinds of materials (Si3N4, ZrO2, HfO2, BST . . . etc.) can be used as the dielectric material. The MIM capacitors are formed by one or two extra masks while forming other non-capacitor logic of the circuit.

Abstract: Embodiments of MIM capacitors may be embedded into a thick IMD layer with enough thickness (e.g., 10 K?˜30 K?) to get high capacitance, which may be on top of a thinner IMD layer. MIM capacitors may be formed among three adjacent metal layers which have two thick IMD layers separating the three adjacent metal layers. Materials such as TaN or TiN are used as bottom/top electrodes & Cu barrier. The metal layer above the thick IMD layer may act as the top electrode connection. The metal layer under the thick IMD layer may act as the bottom electrode connection. The capacitor may be of different shapes such as cylindrical shape, or a concave shape. Many kinds of materials (Si3N4, ZrO2, HfO2, BST . . . etc.) can be used as the dielectric material. The MIM capacitors are formed by one or two extra masks while forming other non-capacitor logic of the circuit.

Abstract: A method for measuring corneal elastic constant and viscosity constant comprises steps of: ejecting compressed air toward a cornea of a live eye ball and measuring air pressure thereof; emitting infrared rays during an air ejecting period, for measuring corneal deformation caused by the compressed air applied to the cornea; and calculating an elastic constant and a viscosity constant of the cornea based on Kelvin-Voigt model by utilizing the corneal deformation measured via the infrared rays and the measured air pressure during the air ejecting period. One advantage of the present invention is to aid preliminary detection in eye diseases.

Abstract: A package component includes a surface dielectric layer including a planar top surface, a metal pad in the surface dielectric layer and including a second planar top surface level with the planar top surface, and an air trench on a side of the metal pad. The sidewall of the metal pad is exposed to the air trench.

Abstract: Decoupling metal-insulator-metal (MIM) capacitor designs for interposers and methods of manufacture thereof are disclosed. In one embodiment, a method of forming a decoupling capacitor includes providing a packaging device, and forming a decoupling MIM capacitor in at least two metallization layers of the packaging device.

Abstract: Decoupling metal-insulator-metal (MIM) capacitor designs for interposers and methods of manufacture thereof are disclosed. In one embodiment, a method of forming a decoupling capacitor includes providing a packaging device, and forming a decoupling MIM capacitor in at least two metallization layers of the packaging device.

Abstract: Embodiments of MIM capacitors may be embedded into a thick IMD layer with enough thickness (e.g., 10 K?˜30 K?) to get high capacitance, which may be on top of a thinner IMD layer. MIM capacitors may be formed among three adjacent metal layers which have two thick IMD layers separating the three adjacent metal layers. Materials such as TaN or TiN are used as bottom/top electrodes & Cu barrier. The metal layer above the thick IMD layer may act as the top electrode connection. The metal layer under the thick IMD layer may act as the bottom electrode connection. The capacitor may be of different shapes such as cylindrical shape, or a concave shape. Many kinds of materials (Si3N4, ZrO2, HfO2, BST . . . etc.) can be used as the dielectric material. The MIM capacitors are formed by one or two extra masks while forming other non-capacitor logic of the circuit.

Abstract: Embodiments of MIM capacitors may be embedded into a thick IMD layer with enough thickness (e.g., 10 K?˜30 K?) to get high capacitance, which may be on top of a thinner IMD layer. MIM capacitors may be formed among three adjacent metal layers which have two thick IMD layers separating the three adjacent metal layers. Materials such as TaN or TiN are used as bottom/top electrodes & Cu barrier. The metal layer above the thick IMD layer may act as the top electrode connection. The metal layer under the thick IMD layer may act as the bottom electrode connection. The capacitor may be of different shapes such as cylindrical shape, or a concave shape. Many kinds of materials (Si3N4, ZrO2, HfO2, BST . . . etc.) can be used as the dielectric material. The MIM capacitors are formed by one or two extra masks while forming other non-capacitor logic of the circuit.

Abstract: A system and a method for monitoring change of intraocular pressure and a contact lens for sensing change of intraocular pressure are provided. The contact lens includes a first material layer and a first pattern. The center of the first material layer has an optical region, and the optical region corresponds to a cornea region of an eyeball. The first pattern is formed on the optical region. Furthermore, the contact lens may further include a second material layer and a second pattern. The second material layer is located on the first material layer. The second pattern is formed on the second material layer and overlaps with the first pattern to form a moire pattern.

Abstract: Decoupling metal-insulator-metal (MIM) capacitor designs for interposers and methods of manufacture thereof are disclosed. In one embodiment, a method of forming a decoupling capacitor includes providing a packaging device, and forming a decoupling MIM capacitor in at least two metallization layers of the packaging device.

Abstract: Embodiments of MIM capacitors may be embedded into a thick IMD layer with enough thickness (e.g., 10 K?˜30 K?) to get high capacitance, which may be on top of a thinner IMD layer. MIM capacitors may be formed among three adjacent metal layers which have two thick IMD layers separating the three adjacent metal layers. Materials such as TaN or TiN are used as bottom/top electrodes & Cu barrier. The metal layer above the thick IMD layer may act as the top electrode connection. The metal layer under the thick IMD layer may act as the bottom electrode connection. The capacitor may be of different shapes such as cylindrical shape, or a concave shape. Many kinds of materials (Si3N4, ZrO2, HfO2, BST . . . etc) can be used as the dielectric material. The MIM capacitors are formed by one or two extra masks while forming other non-capacitor logic of the circuit.

Abstract: The embodiments of diffusion barrier layer described above provide mechanisms for forming a copper diffusion barrier layer to prevent device degradation for hybrid bonding of wafers. The diffusion barrier layer(s) encircles the copper-containing conductive pads used for hybrid bonding. The diffusion barrier layer can be on one of the two bonding wafers or on both bonding wafers.

Abstract: A system-on-chip (SOC) device comprises a first capacitor in a first region, a second capacitor in a second region, and may further comprise a third capacitor in a third region, and any additional number of capacitors in additional regions. The capacitors may be of different shapes and sizes. A region may comprise more than one capacitor. Each capacitor in a region has a top electrode, a bottom electrode, and a capacitor insulator. The top electrodes of all the capacitors are formed in a common process, while the bottom electrodes of all the capacitors are formed in a common process. The capacitor insulator may have different number of sub-layers, formed with different materials or different thickness. The capacitors may be formed in an inter-layer dielectric layer or in an inter-metal dielectric layer. The regions may be a mixed signal region, an analog region, a radio frequency region, a dynamic random access memory region, and so forth.

Abstract: The disclosure relates to a platform of using zebrafish in screening candidates for treating and/or preventing myopia and keratoconus disease. The disclosure is mainly based on that Lumican, one of several SLRPs, plays an important role in the regulation of fibrillogenesis or the genes affecting the size of eyeballs in zebrafish, in addition to playing an important role in clinical myopia. Therefore, the disclosure uses the established zebrafish model to further identify the drugs affecting the expression of lumican and collagen fibrillogenesis, and/or the regulation of eyeball size. These drugs are potential candidates for treating myopia and/or keratoconus disease.

Abstract: Semiconductor devices with orientation-free decoupling capacitors and methods of manufacture thereof are disclosed. In one embodiment, a semiconductor device includes at least one integrated circuit and at least one decoupling capacitor. The at least one decoupling capacitor is oriented in a different direction than the at least one integrated circuit is oriented.

Abstract: Methods and apparatus are disclosed for manufacturing metal-insulator-metal (MIM) capacitors. The MIM capacitors may comprise an electrode, which may be a top or bottom electrode, which has a bottle neck. The MIM capacitors may comprise an electrode, which may be a top or bottom electrode, in contact with a sidewall of a via. The sidewall contact or the bottle neck of the electrode may burn out to form a high impedance path when the leakage current exceeds a specification, while the sidewall contact or the bottle neck of the electrode has no impact for normal MIM operations. The MIM capacitors may be used as decoupling capacitors.

Abstract: Organic-adhesive tapes are often used to secure and protect the bumps during wafer processing after bump formation. While residual organic-adhesive tape may remain on the wafer after tape de-lamination, applying a bump template layer on the bumps before laminating the tape allows any residue to be removed afterwards and results in a residue-free wafer.

Abstract: A system-on-chip device comprises a first capacitor in a first region, a second capacitor in a second region, and may further comprise a third capacitor in a third region, and any additional number of capacitors in additional regions. The capacitors may be of different shapes and sizes. A region may comprise more than one capacitor. Each capacitor in a region has a top electrode, a bottom electrode, and a capacitor insulator. The top electrodes of all the capacitors are formed in a common process, while the bottom electrodes of all the capacitors are formed in a common process. The capacitor insulator may have different number of sub-layers, formed with different materials or thickness. The capacitors may be formed in an inter-layer dielectric layer or in an inter-metal dielectric layer. The regions may be a mixed signal region, an analog region, and so forth.