Abstract: A method of forming a polycrystalline silicon layer and an atomic layer deposition apparatus used for the same. The method includes forming an amorphous silicon layer on a substrate, exposing the substrate having the amorphous silicon layer to a hydrophilic or hydrophobic gas atmosphere, placing a mask having at least one open and at least one closed portion over the amorphous silicon layer, irradiating UV light toward the amorphous silicon layer and the mask using a UV lamp, depositing a crystallization-inducing metal on the amorphous silicon layer, and annealing the substrate to crystallize the amorphous silicon layer into a polycrystalline silicon layer. This method and apparatus provide for controlling the seed position and grain size in the formation of a polycrystalline silicon layer.

Abstract: A sputtering apparatus includes a process chamber having first and second regions, a metal target inside the process chamber, a target transfer unit inside the process chamber, the target transfer unit being configured to move the metal target between the first and second regions, a substrate holder in the second region of the process chamber, and a magnetic assembly in the first region of the process chamber, the magnetic assembly being interposed between the target transfer unit and a wall of the process chamber.

Abstract: An atomic layer deposition apparatus includes a chamber, a vacuum pump to control a pressure in the chamber, a gas supply unit to supply a reaction gas into the chamber, a substrate holder disposed between the vacuum pump and the gas supply unit and having a heater, a mask assembly disposed between the substrate holder and the gas supply unit and having a cooling path to move coolant, and a coolant source to supply the coolant into the cooling path. The mask assembly is positioned a first distance from a substrate, and coolant is supplied into the cooling path of the mask assembly. The substrate is heated using the heater of the substrate holder, a pressure of the chamber is controlled using the vacuum pump, and reaction gasses are sequentially supplied through the gas supply unit.

Abstract: Methods of forming conductive pattern structures form an insulating interlayer on a substrate that is partially etched to form a first trench extending to both end portions of a cell block. The insulating interlayer is also partially etched to form a second trench adjacent to the first trench, and a third trench extending to the both end portions of the cell block. The second trench has a disconnected shape at a middle portion of the cell block. A seed copper layer is formed on the insulating interlayer. Inner portions of the first, second and third trenches are electroplated with a copper layer. The copper layer is polished to expose the insulating interlayer to form first and second conductive patterns in the first and second trenches, respectively, and a first dummy conductive pattern in the third trench. Related conductive pattern structures are also described.

Abstract: A method and apparatus for fabricating a vertical deposition mask capable of welding a mask sheet and a mask frame for preventing a large area mask from drooping due to the weight of the mask. The apparatus includes a tensioning device for tensioning a mask sheet and a welder for attaching a mask frame to a circumference of the mask sheet. The tensioning device includes clamps for supporting the mask sheet and tensioners coupled to the clamps for applying tensile force to the clamps and to evenly fix in place the mask sheet by the clamps.

Abstract: A semiconductor device includes a metal pattern filling a trench formed through at least a portion of an insulating interlayer on a substrate and including copper, and a wetting improvement layer pattern in the metal pattern including at least one of tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, cobalt and manganese.

Abstract: A thin film transistor includes a substrate, a buffer layer on the substrate, a semiconductor layer including source/drain regions and a channel region on the buffer layer, a gate insulating layer corresponding to the channel region, a gate electrode corresponding to the channel region, and source/drain electrodes electrically connected to the semiconductor layer. A polysilicon layer of the channel region may include only a low angle grain boundary, and a high angle grain boundary may be disposed in a region of the semiconductor layer that is apart from the channel region.

Abstract: An apparatus for thermally processing a plurality of substrates including a process chamber into which a boat having a plurality of substrates stacked thereon is loaded, and a heater chamber separate from the process chamber and having a plurality of heaters to apply heat to the process chamber. Here, the heaters are installed to correspond to all sides of the plurality of substrates. Therefore, it is possible to minimize a temperature distribution in the process chamber and uniformly supply heat to the entire region of the plurality of substrates.

Abstract: An organic layer deposition apparatus, and a method of manufacturing an organic light-emitting display device using the organic layer deposition apparatus. The organic layer deposition apparatus includes: an electrostatic chuck that fixedly supports a substrate that is a deposition target; a deposition unit including a chamber maintained at a vacuum and an organic layer deposition assembly for depositing an organic layer on the substrate fixedly supported by the electrostatic chuck; and a first conveyer unit for moving the electrostatic chuck fixedly supporting the substrate into the deposition unit, wherein the first conveyer unit passes through inside the chamber, and the first conveyer unit includes a guide unit having a receiving member for supporting the electrostatic chuck to be movable in a direction.

Abstract: According to example embodiments, a method of forming micropatterns includes forming dummy patterns having first widths on a dummy region of a substrate, and forming cell patterns having second widths on an active line region of the substrate. The active line region may be adjacent to the dummy region and the second widths may be less than the first widths. The method may further include forming damascene metallization by forming a seed layer on the active line region and the dummy region, forming a conductive material layer on a whole surface of the substrate, and planarizing the conductive material layer to form metal lines.

Abstract: Provided are a source gas supply unit capable of supplying a constant amount of source gas to a deposition chamber to deposit a uniform layer, and a deposition apparatus and method using the same. The source gas supply unit includes a canister in which a source is stored, a heater heating the canister, a source gas supply pipe provided on one side of the canister, a measuring unit installed on the source gas supply pipe and measuring an amount of source gas passing through the source gas supply pipe, and a temperature controller connected to the heater and the measuring unit. The temperature controller controls the heater based on the amount of the source gas measured by the measuring unit.

Abstract: An apparatus for reading identification information of a biosensor is provided, including a biosensor sensing unit detecting the biosensor, a light-emitting unit emitting light on an identification information recording unit when the biosensor sensing unit detects the biosensor, the identification information recording unit having the identification information of the biosensor recorded thereon, a light-receiving unit that receives the light emitted from the light-emitting unit, and reflected or refracted by or passing through the identification information recording section, and an identification information reading unit analyzing the light received by the light-receiving unit and reading the identification information of the biosensor.

Abstract: Methods of forming conductive pattern structures form an insulating interlayer on a substrate that is partially etched to form a first trench extending to both end portions of a cell block. The insulating interlayer is also partially etched to form a second trench adjacent to the first trench, and a third trench extending to the both end portions of the cell block. The second trench has a disconnected shape at a middle portion of the cell block. A seed copper layer is formed on the insulating interlayer. Inner portions of the first, second and third trenches are electroplated with a copper layer. The copper layer is polished to expose the insulating interlayer to form first and second conductive patterns in the first and second trenches, respectively, and a first dummy conductive pattern in the third trench. Related conductive pattern structures are also described.

Abstract: A structure and formation method for electrically connecting aluminum and copper interconnections stabilize a semiconductor metallization process using an inner shape electrically connecting the aluminum and copper interconnections. To this end, a copper interconnection is disposed on a semiconductor substrate. An interconnection induction layer and an interconnection insertion layer are sequentially formed on the copper interconnection to have a contact hole exposing the copper interconnection. An upper diameter of the contact hole may be formed to be larger than a lower diameter thereof. A barrier layer and an aluminum interconnection are filled in the contact hole. The aluminum interconnection is formed not to directly contact the copper interconnection through the contact hole.

Abstract: Methods of forming a metal interconnection structure are provided. The methods include forming an insulating layer on a semiconductor substrate including a first metal interconnection. The insulating layer is patterned to form an opening that exposes the first metal interconnection. A first diffusion barrier layer is formed on the exposed first metal interconnection. After forming the first diffusion barrier layer, a second diffusion barrier layer is formed on the first diffusion barrier layer in the opening, the second diffusion barrier layer contacting a sidewall of the opening. A second metal interconnection is formed on the second diffusion barrier layer.

Abstract: A substrate processing apparatus that simultaneously forms thin films on a plurality of substrates and performs heat treatment includes: a plurality of substrate holders, each including a substrate support that supports a substrate and a first gas pipe having one or a plurality of injection holes; a boat where the plurality of substrate holders are stacked and including a second gas pipe connected with the first gas pipe of each of the substrate holders; a process chamber providing a space in which the substrates stacked in the boat are processed; a conveying unit that carries the boat into/out of the process chamber; a first heating unit disposed outside the process chamber; and a gas supply unit including a third gas pipe connected with the second gas pipe and supplying a heated or cooled gas into the second gas pipe.

Abstract: A canister for a deposition apparatus and a deposition apparatus using the same, and more particularly, a canister for a deposition apparatus that can provide a uniform amount of source material contained in a reaction gas supplied into a deposition chamber and improve safety in the supply of the source material, and a deposition apparatus using the canister. The deposition apparatus includes a deposition chamber; a canister supplying a reaction gas into the deposition chamber; and a carrier gas supplier for supplying a carrier gas into the canister, in which the canister includes a main body, a heating unit heating the main body and a temperature measuring unit disposed under the main body.

Abstract: A method of forming a polycrystalline silicon layer and an atomic layer deposition apparatus used for the same. The method includes forming an amorphous silicon layer on a substrate, exposing the substrate having the amorphous silicon layer to a hydrophilic or hydrophobic gas atmosphere, placing a mask having at least one open and at least one closed portion over the amorphous silicon layer, irradiating UV light toward the amorphous silicon layer and the mask using a UV lamp, depositing a crystallization-inducing metal on the amorphous silicon layer, and annealing the substrate to crystallize the amorphous silicon layer into a polycrystalline silicon layer. This method and apparatus provide for controlling the seed position and grain size in the formation of a polycrystalline silicon layer.

Abstract: A method of forming a polycrystalline silicon layer and an atomic layer deposition apparatus used for the same. The method includes forming an amorphous silicon layer on a substrate, exposing the substrate having the amorphous silicon layer to a hydrophilic or hydrophobic gas atmosphere, placing a mask having at least one open and at least one closed portion over the amorphous silicon layer, irradiating UV light toward the amorphous silicon layer and the mask using a UV lamp, depositing a crystallization-inducing metal on the amorphous silicon layer, and annealing the substrate to crystallize the amorphous silicon layer into a polycrystalline silicon layer. This method and apparatus provide for controlling the seed position and grain size in the formation of a polycrystalline silicon layer.

Abstract: A thin film deposition apparatus that can be easily used to manufacture large-sized display devices on a mass scale and that improves manufacturing yield, and a method of manufacturing an organic light-emitting display device by using the thin film deposition apparatus.