Patents by Inventor Jong Won Lim
Jong Won Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250066347Abstract: The present invention relates to: a substituted thiazolidinedione derivative compound having a novel structure acting as a sterol regulatory element-binding protein-1 (SREBP1) inhibitor, a hydrate thereof, or a pharmaceutically acceptable salt thereof; and a pharmaceutical composition for preventing or treating cancer, comprising same as an active ingredient.Type: ApplicationFiled: December 19, 2022Publication date: February 27, 2025Inventors: Jun-Kyum KIM, Jia CHOI, Eun-Jung KIM, Cheol-Kyu PARK, Seok Won HAM, Min Gi PARK, Hyeon Ju JEONG, Sung Jin KIM, Kyungim MIN, Jong Min PARK, Jungwook CHIN, Sung Jin CHO, Jina KIM, Kyung Jin JUNG, Nayeon KIM, Suhui KIM, Sugyeong KWON, Su-Jeong LEE, Minseon JEONG, Hongchan AN, Jeong-Eun PARK, Dong-Hyun KIM, Ji-youn LIM, Ju-sik MIN, Ji Sun HWANG, Hyo-Jung CHOI, Hayoung HWANG, Oh-Bin KWON, Sungwoo LEE, Sang Bum KIM
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Patent number: 12234207Abstract: The present invention relates to a novel halo-(3-(phenylsulfonyl)prop-1-enyl)pyridine derivative or a pharmaceutically acceptable salt thereof; a preparation method thereof; and an Nrf2 activator and a pharmaceutical composition for preventing or treating diseases induced by a decrease in Nrf2 activity, both of which comprise the same as an active ingredient.Type: GrantFiled: August 19, 2019Date of Patent: February 25, 2025Assignee: CUREVERSE INCORPORATEDInventors: Ki Duk Park, Ae Nim Pae, Sang Min Lim, Jong Hyun Park, Ji Won Choi, Siwon Kim, Hyeon Jeong Kim, Seul Ki Yeon
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Publication number: 20250038069Abstract: In a method of manufacturing a packaging unit, a material layer is stacked for forming the semiconductor device on one surface of a substrate, a semiconductor device is formed by performing a semiconductor process on the material layer, a flow channel through which a cooling fluid flows is formed on the other surface of the substrate to enable direct cooling of the semiconductor device using the cooling fluid, a packaging block is disposed at a position spaced apart from the substrate for packaging of the semiconductor device, and an electrode placed on the packaging block is electrically connected to the semiconductor device, and a heat sink unit having a flow path forming portion in which a flow path communicating with the flow channel of the substrate is formed is arranged below the packaging block, and the substrate is combined with the heat sink unit.Type: ApplicationFiled: October 18, 2024Publication date: January 30, 2025Inventors: HYOUNG SOON LEE, MIN SOO KANG, HAE CHEON KIM, HYUN WOOK JUNG, HO KYUN AHN, JONG WON LIM
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Publication number: 20250030059Abstract: An electrode assembly, a battery, and a battery pack and a vehicle including the same are provided. The first electrode of the electrode assembly includes a first active material portion coated with an active material layer along a winding direction and a first uncoated portion not coated with an active material layer and exposed beyond the separator. The first uncoated portion includes a first portion adjacent to the core of the electrode assembly, a second portion adjacent to the outer circumference of the electrode assembly, and a third portion between the first portion and the second portion. The third portion includes a plurality of segments spaced apart along the winding direction by forming a cut groove in plural along the winding axis direction. The height of the first portion may be relatively lower than the height of the uncoated portion at the bottom of the cut groove.Type: ApplicationFiled: July 20, 2023Publication date: January 23, 2025Applicant: LG ENERGY SOLUTION, LTD.Inventors: Jong-Sik PARK, Jae-Won LIM, Sang-Yeol KIM, Hak-Kyun KIM, Jae-Eun LEE, Je-Jun LEE
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Publication number: 20250030097Abstract: A battery module includes a module housing accommodating a plurality of battery cells; a pair of high-voltage terminals provided on the front of the module housing; a pair of module lifting holes provided between the high-voltage terminals; a thermal barrier that wraps around part of the front of the module housing including the high-voltage terminals, with fastening holes penetrating through its upper surface; and a fastening member installed by penetrating through the module lifting hole and fastening hole to secure the thermal barrier to the module lifting hole.Type: ApplicationFiled: September 25, 2023Publication date: January 23, 2025Applicant: LG ENERGY SOLUTION, LTD.Inventors: Dae Gil KIM, Jong Hwa CHOI, Chae Won LIM, Hyoung Suk LEE
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Patent number: 12176306Abstract: An apparatus and method for generating an electrical circuit of semiconductor channel resistor including a first passive element part including a resistor and a capacitor connected in parallel between a first port and a second port, and an ohmic resistor connected in series to the resistor and the capacitor which are connected in parallel are provided. The apparatus includes a substrate selection part configured to receive a selected substrate item; a resistor selection part configured to receive a selected resistor item; a capacitor selection part configured to receive a selected capacitor item; and a circuit generating part configured to generate an electrical circuit from the selected substrate item, the selected resistor item, and the selected capacitor item.Type: GrantFiled: August 6, 2021Date of Patent: December 24, 2024Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Sang Heung Lee, Soo Cheol Kang, Seong Il Kim, Hae Cheon Kim, Youn Sub Noh, Ho Kyun Ahn, Jong Won Lim, Sung Jae Chang, Hyun Wook Jung
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Patent number: 12166101Abstract: A method of manufacturing a high-electron-mobility transistor device is provided. The method includes sequentially forming a transition layer and a semiconductor layer on a substrate, etching a portion of a surface of the semiconductor layer to form a barrier layer region having a certain depth and forming a barrier layer in the barrier layer region, forming a source electrode and a drain electrode on a 2-dimensional electron gas (2-DEG) layer upward exposed at a surface of the semiconductor layer, in defining the 2-DEG layer formed along an interface between the semiconductor layer and the barrier layer, forming a passivation layer on the semiconductor layer, the barrier layer, the source electrode, and the drain electrode and etching a portion of the passivation layer to upward expose the source electrode, the drain electrode, and the barrier layer, and forming a gate electrode on the upward exposed barrier layer.Type: GrantFiled: February 14, 2022Date of Patent: December 10, 2024Assignee: ELECTRONICS AND TELECOMMINICATIONS RESEARCH INSTITUTEInventors: Soo Cheol Kang, Hyun Wook Jung, Seong IL Kim, Hae Cheon Kim, Youn Sub Noh, Ho Kyun Ahn, Sang Heung Lee, Jong Won Lim, Sung Jae Chang, Il Gyu Choi
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Patent number: 12131978Abstract: The present invention improves a heat dissipation property of a semiconductor device by transferring hexagonal boron nitride (hBN) with a two-dimensional nanostructure to the semiconductor device. A semiconductor device of the present invention includes a substrate having a first surface and a second surface, a semiconductor layer formed on the first surface of the substrate, an hBN layer formed on at least one surface of the first surface and the second surface of the substrate, and a heat sink positioned on the second surface of the substrate. A radiation rate of heat generated during driving of an element is increased to decrease a reduction in lifetime of a semiconductor device due to a temperature increase. The semiconductor device has a structure and configuration which are very effective in improving a rapid temperature increase due to heat generated by high-power semiconductor devices.Type: GrantFiled: December 27, 2021Date of Patent: October 29, 2024Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Il Gyu Choi, Seong Il Kim, Hae Cheon Kim, Youn Sub Noh, Ho Kyun Ahn, Sang Heung Lee, Jong Won Lim, Sung Jae Chang, Hyun Wook Jung
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Publication number: 20240266253Abstract: Provided is a direct cooling device for an integrated circuit configured to form a direct cooling portion with a flow channel through which cooling fluid may flow in a through via hole of a substrate constituting the integrated circuit, and to couple the substrate to a heat sink unit through a bonding portion formed integrally with the direct cooling portion, unlike the prior art in which only a ground circuit is possible through the through via hole, which derives the effect of increasing product reliability due to improved thermal management efficiency of the integrated circuit by directly cooling the semiconductor device as well as the ground circuit, and the effect of simplifying and miniaturizing the structure by implementing the cooling function using a circuit for grounding the semiconductor device even without forming an additional flow path structure for cooling the semiconductor device.Type: ApplicationFiled: February 4, 2024Publication date: August 8, 2024Inventors: Min Soo KANG, Jun Rae PARK, Hae Cheon KIM, Hyoung Soon LEE, Sung Jae CHANG, Hyun Wook JUNG, Il Gyu CHOI, Seong Il KIM, Sang Heung LEE, Ho Kyun AHN, Jong Won LIM
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Publication number: 20240266251Abstract: A direct cooling type semiconductor package unit includes a substrate made of a material capable of manufacturing a semiconductor device, and having a material layer for forming the semiconductor device stacked on one side of the substrate, and a flow channel through which a cooling fluid flows formed on the other side of the substrate to enable direct cooling of the semiconductor device using the cooling fluid; a packaging block disposed at a position spaced apart from the substrate for packaging the semiconductor device, and having an electrode electrically connected to the semiconductor device through wiring and placed thereon to be insulated; a heat sink unit disposed on a lower side of the packaging block and having a fluid movement region formed at a position corresponding to a flow channel of the substrate; and a thin film type structure disposed between the substrate and the heat sink unit for coupling between the substrate and the heat sink unit and being moldable to have pattern structures of variouType: ApplicationFiled: February 4, 2024Publication date: August 8, 2024Inventors: Jun Rae PARK, Min Soo KANG, Hae Cheon KIM, Hyoung Soon LEE, Sung Jae CHANG, Hyun Wook JUNG, Il Gyu CHOI, Seong Il KIM, Sang Heung LEE, Ho Kyun AHN, Jong Won LIM
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Publication number: 20240148977Abstract: A drug administration management system according to an embodiment of the present disclosure may include a smart case configured to accommodate a drug administration device, display drug administration information including whether or not a drug is administered and a drug administration dose for each drug administration site input button based on an input of a user, and transmit the drug administration information externally; and a terminal configured to receive the externally transmitted drug administration information from the smart case, and monitor the drug administration information based on a drug administration plan input from a user.Type: ApplicationFiled: March 8, 2022Publication date: May 9, 2024Inventors: Jong Won Lim, Hye Won LEE, Hyoung Seok KIM, Soo Bum PARK, Sang Hoon OH
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Publication number: 20230361000Abstract: A packaging unit for direct cooling of a semiconductor device according to an embodiment includes a substrate made of a material capable of manufacturing the semiconductor device, having a material layer for forming the semiconductor device stacked on one side thereof, and a flow channel through which a cooling fluid flows formed on the other surface thereof to enable direct cooling of the semiconductor device using the cooling fluid, a packaging block disposed at a position spaced apart from the substrate for packaging of the semiconductor device, electrically connected to the semiconductor device using an electrode, and insulated from the semiconductor device using the electrode disposed on an insulating block, and a heat sink unit disposed below the packaging block and including a flow path forming portion in which a flow path communicating with the flow channel of the substrate is formed.Type: ApplicationFiled: August 9, 2022Publication date: November 9, 2023Inventors: Hyoung Soon LEE, Min Soo KANG, Hae Cheon KIM, Hyun Wook JUNG, Ho Kyun AHN, Jong Won LIM
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Publication number: 20230231404Abstract: There is provided a battery system including: a controller; a main switch controlled by the controller to supply or cut off a voltage of a battery to a load; and a semiconductor pre-charger module including a semiconductor switch connected in parallel with the main switch and configured to supply or cut off the voltage of the battery to the load according to a control signal output from the controller, and a semiconductor switch driver configured to receive the control signal from the controller and output a single pulse signal for driving the semiconductor switch to turn on and off the semiconductor switch. Here, the semiconductor switch driver of the semiconductor pre-charger module includes an isolation element configured to electrically isolate the controller and the battery voltage, and the semiconductor switch of the semiconductor pre-charger module is a MOS-controlled thyristor (MCT).Type: ApplicationFiled: January 11, 2023Publication date: July 20, 2023Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Dong Yun JUNG, Kun Sik PARK, JONG IL WON, Hyun-Gyu JANG, Doohyung CHO, Jong-Won LIM
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Publication number: 20230054026Abstract: Provided are a nitride-based high electron mobility transistor having enhanced frequency characteristics and an improved structural stability and manufacturing method thereof. The nitride-based high electron mobility transistor includes a first semiconductor layer and a second semiconductor layer sequentially formed on a substrate, source drain electrodes formed on the second semiconductor layer, a first insulating film formed on the second semiconductor layer and having an opening, a dielectric formed on the first insulating film to surround the opening of the first insulating film, a second insulating film formed on an inner sidewall of the dielectric, and a gate electrode formed on the dielectric to fill the opening of the first insulating film and inside the inner sidewall of the dielectric. A width of the inner sidewall at a bottom end of the dielectric is smaller than a width of the inner sidewall at a top end of the dielectric.Type: ApplicationFiled: August 19, 2022Publication date: February 23, 2023Inventors: Hyun Wook JUNG, Seong II KIM, Hae Cheon KIM, Youn Sub NOH, Ho Kyun AHN, Sang Heung LEE, Jong Won LIM, Sung Jae CHANG, II Gyu CHOI
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Patent number: 11529879Abstract: The present disclosure relates to an electric vehicle rapid charger equipped with a sensor for controlling an automatic pull-out of a charging cable. The electric vehicle rapid charger according to an embodiment of the present disclosure includes: a main body including a connector holder provided on one side of the main body and a cable connection part provided at a first predetermined height; a cable inlet/outlet part including a plurality of rotating rollers and fixedly coupled to the main body at a second predetermined height; a charging cable having a leading end portion in which a connector connected to a connection inlet of an electric vehicle is provided, a rear end portion fixedly coupled to the cable connection part, and an intermediate portion coupled to the cable inlet/outlet part to be inserted between the plurality of rotating rollers; and a control part configured to control a driving of the cable inlet/outlet part according to a charging request signal or a charging stop signal.Type: GrantFiled: September 24, 2020Date of Patent: December 20, 2022Assignee: KLINELEX CO., LTD.Inventors: Hyo Young Lee, Seog Bae Heo, Jong Won Lim
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Publication number: 20220297551Abstract: The present disclosure relates to an electric vehicle rapid charger equipped with a sensor for controlling an automatic pull-out of a charging cable. The electric vehicle rapid charger according to an embodiment of the present disclosure includes: a main body including a connector holder provided on one side of the main body and a cable connection part provided at a first predetermined height; a cable inlet/outlet part including a plurality of rotating rollers and fixedly coupled to the main body at a second predetermined height; a charging cable having a leading end portion in which a connector connected to a connection inlet of an electric vehicle is provided, a rear end portion fixedly coupled to the cable connection part, and an intermediate portion coupled to the cable inlet/outlet part to be inserted between the plurality of rotating rollers; and a control part configured to control a driving of the cable inlet/outlet part according to a charging request signal or a charging stop signal.Type: ApplicationFiled: September 24, 2020Publication date: September 22, 2022Inventors: Hyo Young LEE, Seog Bae HEO, Jong Won LIM
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Publication number: 20220299554Abstract: The apparatus for ESD test includes a micro-controller unit client, a low voltage supply configured to output a low voltage on the basis of control by the micro-controller unit, a high voltage supply configured to output a high voltage on the basis of control by the micro-controller unit, and an ESD generator configured to generate an ESD voltage for an ESD test of a device under test (DUT) by using the low voltage and the high voltage, on the basis of control by the micro-controller unit. The ESD generator is a semiconductor integrated circuit module where a charging semiconductor switch, a discharging semiconductor switch, a switch driving block controlling a switching operation of each of the charging semiconductor switch and the discharging semiconductor switch, and a plurality of passive elements connected to the charging semiconductor switch and the discharging semiconductor switch are implemented as package, for generating the ESD voltage.Type: ApplicationFiled: October 26, 2021Publication date: September 22, 2022Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Dong Yun JUNG, Hyun Gyu JANG, Kun Sik PARK, JONG IL WON, Sung Kyu KWON, Jong Won LIM, Doo Hyung CHO
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Publication number: 20220285244Abstract: The present invention improves a heat dissipation property of a semiconductor device by transferring hexagonal boron nitride (hBN) with a two-dimensional nanostructure to the semiconductor device. A semiconductor device of the present invention includes a substrate having a first surface and a second surface, a semiconductor layer formed on the first surface of the substrate, an hBN layer formed on at least one surface of the first surface and the second surface of the substrate, and a heat sink positioned on the second surface of the substrate. A radiation rate of heat generated during driving of an element is increased to decrease a reduction in lifetime of a semiconductor device due to a temperature increase. The semiconductor device has a structure and configuration which are very effective in improving a rapid temperature increase due to heat generated by high-power semiconductor devices.Type: ApplicationFiled: December 27, 2021Publication date: September 8, 2022Applicant: Electronics and Telecommunications Research InstituteInventors: Il Gyu CHOI, Seong Il KIM, Hae Cheon KIM, Youn Sub NOH, Ho Kyun AHN, Sang Heung LEE, Jong Won LIM, Sung Jae CHANG, Hyun Wook JUNG
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Publication number: 20220262922Abstract: A method of manufacturing a high-electron-mobility transistor device is provided. The method includes sequentially forming a transition layer and a semiconductor layer on a substrate, etching a portion of a surface of the semiconductor layer to form a barrier layer region having a certain depth and forming a barrier layer in the barrier layer region, forming a source electrode and a drain electrode on a 2-dimensional electron gas (2-DEG) layer upward exposed at a surface of the semiconductor layer, in defining the 2-DEG layer formed along an interface between the semiconductor layer and the barrier layer, forming a passivation layer on the semiconductor layer, the barrier layer, the source electrode, and the drain electrode and etching a portion of the passivation layer to upward expose the source electrode, the drain electrode, and the barrier layer, and forming a gate electrode on the upward exposed barrier layer.Type: ApplicationFiled: February 14, 2022Publication date: August 18, 2022Inventors: Soo Cheol KANG, Hyun Wook JUNG, Seong Il KIM, Hae Cheon KIM, Youn Sub NOH, Ho Kyun AHN, Sang Heung LEE, Jong Won LIM, Sung Jae CHANG, Il Gyu CHOI
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Publication number: 20220045679Abstract: Provided is a single pole double through (SPDT) switch including a series switching unit including first and second series switching elements commonly connected to a common input port, and a shunt switching unit including a plurality of shunt switching elements connected in parallel to a first signal path connecting the common input port to a first output port and a second signal path connecting the common input port to a second output port, wherein first and second inductors are respectively connected to gate terminals of the first and second series switching elements.Type: ApplicationFiled: August 6, 2021Publication date: February 10, 2022Inventors: Youn Sub NOH, Soo Cheol KANG, Seong Il KIM, Hae Cheon KIM, Ho Kyun AHN, Sang Heung LEE, Jong Won LIM, Sung Jae CHANG, Hyun Wook JUNG