Patents by Inventor Jongwook Kye

Jongwook Kye has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110079779
    Abstract: Shapes and orientations of contacts or other closed contours on an integrated circuit are characterized by calculating Elliptic Fourier descriptors. The descriptors are then used for generating design rules for the integrated circuit and for assessing process capability for the manufacturing of the integrated circuit. Monte Carlo simulation can be performed in conjunction with the elliptic Fourier descriptors.
    Type: Application
    Filed: October 7, 2009
    Publication date: April 7, 2011
    Applicant: GLOBALFOUNDRIES Inc.
    Inventors: Yuansheng MA, Harry J. LEVINSON, Jongwook KYE
  • Patent number: 7855048
    Abstract: A method of fabricating a semiconductor device using lithography. The method can include providing a wafer assembly having a layer to be processed disposed under a photo resist layer and illuminating the wafer assembly with an exposure dose transmitted through a birefringent material disposed between a final optical element of an imaging subsystem used to transmit the exposure dose and the photo resist layer. Also disclosed is a wafer assembly from which at least one semiconductor device can be fabricated. The wafer assembly can include a layer to be processed, a photo resist layer disposed over the layer to be processed and a contrast enhancing, birefringent top anti-reflecting coating (TARC).
    Type: Grant
    Filed: May 4, 2004
    Date of Patent: December 21, 2010
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Cyrus E. Tabery, Bruno M. LaFontaine, Adam R. Pawloski, Jongwook Kye
  • Publication number: 20100311242
    Abstract: Methods are provided for fabricating a semiconductor device. One method comprises providing a first pattern having a first polygon, the first polygon having a first tonality and having a first side and a second side, the first side adjacent to a second polygon having a second tonality, and the second side adjacent to a third polygon having the second tonality, and forming a second pattern by reversing the tonality of the first pattern. The method further comprises forming a third pattern from the second pattern by converting the second polygon from the first tonality to the second tonality forming a fourth pattern from the second pattern by converting the third polygon from the first tonality to the second tonality forming a fifth pattern by reversing the tonality of the third pattern, and forming a sixth pattern by reversing the tonality of the fourth pattern.
    Type: Application
    Filed: June 8, 2009
    Publication date: December 9, 2010
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Yunfei Deng, Jongwook Kye
  • Patent number: 7829266
    Abstract: Accurate ultrafine patterns are formed using a multiple exposure technique comprising implementing an OPC procedure to form an exposure reticle to compensate for distortion of an overlying resist pattern caused by an underlying resist pattern. Embodiments include forming a first resist pattern in a first resist layer over a target layer using a first exposure reticle, forming a second exposure reticle by an OPC technique to compensate for distortion of a second resist pattern caused by the underlying first resist pattern, depositing a second resist layer on the first resist pattern, forming the second resist pattern in the second resist layer using the second exposure reticle, the first and second resist patterns constituting a final resist mask, and forming a pattern in the target layer using the final resist mask.
    Type: Grant
    Filed: August 7, 2007
    Date of Patent: November 9, 2010
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Yunfei Deng, Jongwook Kye, Ryoung-han Kim
  • Publication number: 20100099045
    Abstract: Photolithography methods using BARCs having graded optical properties are provided. In an exemplary embodiment, a photolithography method comprises the steps of depositing a BARC overlying a material to be patterned, the BARC having a refractive index and an absorbance. The BARC is modified such that, after the step of modifying, values of the refractive index and the absorbance are graded from first values at a first surface of the BARC to second values at a second surface of the BARC. The step of modifying is performed after the step of depositing.
    Type: Application
    Filed: October 21, 2008
    Publication date: April 22, 2010
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventors: Thomas I. WALLOW, Jongwook KYE
  • Publication number: 20090040483
    Abstract: Accurate ultrafine patterns are formed using a multiple exposure technique comprising implementing an OPC procedure to form an exposure reticle to compensate for distortion of an overlying resist pattern caused by an underlying resist pattern. Embodiments include forming a first resist pattern in a first resist layer over a target layer using a first exposure reticle, forming a second exposure reticle by an OPC technique to compensate for distortion of a second resist pattern caused by the underlying first resist pattern, depositing a second resist layer on the first resist pattern, forming the second resist pattern in the second resist layer using the second exposure reticle, the first and second resist patterns constituting a final resist mask, and forming a pattern in the target layer using the final resist mask.
    Type: Application
    Filed: August 7, 2007
    Publication date: February 12, 2009
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Yunfei Deng, Jongwook Kye, Ryoung-han Kim
  • Publication number: 20080292991
    Abstract: An integrated circuit fabrication process as described herein employs a double photoresist exposure technique. After creation of a first pattern of photoresist features on a wafer, a second photoresist layer is formed over the first pattern of photoresist features. The second photoresist layer is subjected to a reflow step that softens and relaxes the second photoresist material. This reflow step causes the exposed surface of the second photoresist layer to become substantially planar. Thereafter, the second photoresist layer can be exposed and developed to create a second pattern of photoresist features on the wafer. The planar surface of the second photoresist layer, which results from the reflow step, facilitates the creation of accurate, precise, and “high fidelity” photoresist features from the second photoresist material.
    Type: Application
    Filed: May 24, 2007
    Publication date: November 27, 2008
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventors: Thomas I. Wallow, Ryoung-Han Kim, Jongwook Kye
  • Publication number: 20080259458
    Abstract: According to one exemplary embodiment, an EUV (extreme ultraviolet) optical element in a light path between an EUV light source and a semiconductor wafer includes a reflective film having a number of bilayers. The reflective film includes a pattern, where the pattern causes a change in incident EUV light from the EUV light source, thereby controlling illumination at a pupil plane of an EUV projection optic to form a printed field on the semiconductor wafer. The EUV optical element can be utilized in an EUV lithographic process to fabricate a semiconductor die.
    Type: Application
    Filed: April 18, 2007
    Publication date: October 23, 2008
    Inventors: Bruno M. LaFontaine, Ryoung-Han Kim, Jongwook Kye
  • Patent number: 7422829
    Abstract: A method of adjusting a reticle layout to correct for flare can include determining a localized reticle pattern density across the reticle layout and determining a relationship between reticle pattern density and edge adjustment for the photolithography apparatus being used. For a given feature of the reticle layout, an edge of the feature can be adjusted by a given amount based on the localized reticle pattern density adjacent the given feature. This method allows for a rule-based optical proximity correction (OPC) approach to compensate for long-range and short-range flare within a photolithography apparatus.
    Type: Grant
    Filed: June 2, 2004
    Date of Patent: September 9, 2008
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Carl P. Babcock, Jongwook Kye
  • Publication number: 20080171446
    Abstract: A method for forming a semiconductor device is provided including processing a wafer having a target material; forming a first pattern over the target material; forming a protection layer over the first pattern; and forming a second pattern, over the target material and not over the protection layer, without an etching step between the forming the first pattern and the forming the second pattern.
    Type: Application
    Filed: January 12, 2007
    Publication date: July 17, 2008
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventors: Ryoung-han Kim, Thomas Ingolf Wallow, Harry Jay Levinson, Jongwook Kye, Alden R. Acheta
  • Publication number: 20080171447
    Abstract: A method for forming a semiconductor device is provided including processing a wafer having a target material, forming a multilevel photoresist structure having a protection layer over the target material, and forming a multilevel recess in the target material with the multilevel photoresist structure.
    Type: Application
    Filed: January 12, 2007
    Publication date: July 17, 2008
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventors: Thomas Ingolf Wallow, Ryoung-han Kim, Jongwook Kye, Harry Jay Levinson
  • Patent number: 7384725
    Abstract: A method of forming a plurality of contact holes of varying pitch and density in a contact layer of an integrated circuit device is provided. The plurality of contact holes can include a plurality of regularly spaced contact holes having a first pitch along a first direction and a plurality of semi-isolated contact holes having a second pitch along a second direction. A double-dipole illumination source can transmit light energy through a mask having a pattern corresponding to a desired contact hole pattern. The double-dipole illumination source can include a first dipole aperture, which is oriented and optimized for patterning the regularly spaced contact holes, and a second dipole aperture, which is oriented substantially orthogonal to the first dipole aperture and optimized for patterning the plurality of semi-isolated contact holes. The contact layer can be etched using the patterned photoresist layer.
    Type: Grant
    Filed: April 2, 2004
    Date of Patent: June 10, 2008
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Anna M. Minvielle, Cyrus E. Tabery, Hung-eil Kim, Jongwook Kye
  • Patent number: 7315033
    Abstract: Disclosed are a method of reducing biological contamination in an immersion lithography system and an immersion lithography system configured to reduce biological contamination. A reflecting element and/or an irradiating element is used to direct radiation to kill biological contaminates present with respect to at least one of i) a volume adjacent a final element of the projection system or ii) an immersion medium supply device disposed adjacent the final element.
    Type: Grant
    Filed: May 4, 2005
    Date of Patent: January 1, 2008
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Adam R. Pawloski, Harry J. Levinson, Jongwook Kye
  • Patent number: 7125652
    Abstract: A method of making a device using a lithographic system having a lens from which an exposure pattern is emitted. A conforming immersion medium can be positioned between a photo resist layer and the lens. The photo resist layer, which can be disposed over a wafer, and the lens can be brought into intimate contact with the conforming immersion medium. The photo resist can then be exposed with the exposure pattern so that the exposure pattern traverses the conforming immersion medium.
    Type: Grant
    Filed: December 3, 2003
    Date of Patent: October 24, 2006
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Christopher F. Lyons, Carl P. Babcock, Jongwook Kye
  • Patent number: 6977717
    Abstract: A method and device for determining projection lens pupil transmission distribution in a photolithographic imaging system, the device including an illumination source; a transmissive reticle; an aperture layer having an illumination source side and a light emission side and comprising a plurality of openings therethrough; a diffuser mounted on the illumination source side of the aperture layer; a projection lens system; and an image plane, in which a pupil image corresponding to each of the plurality of openings in the aperture layer is formed at the image plane when radiation from the illumination source passes through the reticle, the diffuser, the aperture layer and the projection lens system, the pupil image having a projection lens pupil transmission distribution.
    Type: Grant
    Filed: December 4, 2003
    Date of Patent: December 20, 2005
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Ivan Lalovic, Bruno M. LaFontaine, Jongwook Kye
  • Publication number: 20050221233
    Abstract: A method of forming a plurality of contact holes of varying pitch and density in a contact layer of an integrated circuit device is provided. The plurality of contact holes can include a plurality of regularly spaced contact holes having a first pitch along a first direction and a plurality of semi-isolated contact holes having a second pitch along a second direction. A double-dipole illumination source can transmit light energy through a mask having a pattern corresponding to a desired contact hole pattern. The double-dipole illumination source can include a first dipole aperture, which is oriented and optimized for patterning the regularly spaced contact holes, and a second dipole aperture, which is oriented substantially orthogonal to the first dipole aperture and optimized for patterning the plurality of semi-isolated contact holes. The contact layer can be etched using the patterned photoresist layer.
    Type: Application
    Filed: April 2, 2004
    Publication date: October 6, 2005
    Inventors: Anna Minvielle, Cyrus Tabery, Hung-eil Kim, Jongwook Kye
  • Patent number: 6906777
    Abstract: A method and apparatus for preventing contamination in a lithographic apparatus including a projection system, including providing the lithographic apparatus including the projection system for imaging an irradiated portion of a mask onto a target portion of a substrate and placing a pellicle over a surface of the projection system to inhibit contamination of the surface.
    Type: Grant
    Filed: March 1, 2004
    Date of Patent: June 14, 2005
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Jongwook Kye, Carl P. Babcock, Christopher F. Lyons
  • Publication number: 20050122497
    Abstract: A method of making a device using a lithographic system having a lens from which an exposure pattern is emitted. A conforming immersion medium can be positioned between a photo resist layer and the lens. The photo resist layer, which can be disposed over a wafer, and the lens can be brought into intimate contact with the conforming immersion medium. The photo resist can then be exposed with the exposure pattern so that the exposure pattern traverses the conforming immersion medium.
    Type: Application
    Filed: December 3, 2003
    Publication date: June 9, 2005
    Inventors: Christopher Lyons, Carl Babcock, Jongwook Kye
  • Patent number: 6831451
    Abstract: According to one exemplary embodiment, a method for determining a Weibull slope at a specified temperature utilizing a test structure comprises a step of performing a number of groups of failure tests on the test structure to determine a number of groups of test data, where each of the groups of failure tests is performed at a respective one of a number of test temperatures, and where each group of failure tests corresponds to a respective group of test data. The method further comprises utilizing the number of groups of test data to determine a scaling line. The method further comprises determining a scaling factor at the specified temperature utilizing the scaling line. The method further comprises utilizing the scaling factor to determine the Weibull slope. The method may further comprise utilizing the Weibull slope to determine a lifetime of the semiconductor die.
    Type: Grant
    Filed: June 16, 2003
    Date of Patent: December 14, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Hyeon-Seag Kim, Jongwook Kye
  • Patent number: 6829040
    Abstract: A projection lithography system exposes a photo sensitive material on a surface of a semiconductor substrate that includes surface height variations between a high level and a low level. The system comprises an illumination source projecting illumination within a narrow wavelength band centered about a nominal wavelength on an optic path towards the substrate during an exposure period. A wavelength modulation system within the optic path comprises means for chromatically separating the narrow wavelength band into at least two sub-bands, the first sub-band being smaller than the narrow wavelength band and centered about a first sub-band wavelength and the second sub-band being smaller than the narrow wavelength band and centered about a second sub-band wavelength and means for passing each of the first sub-band and the second sub-band during distinct time periods within the exposure period.
    Type: Grant
    Filed: November 7, 2003
    Date of Patent: December 7, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Jongwook Kye, Ivan Lalovic, Christopher F. Lyons, Ramkumar Subramanian