Abstract: In one embodiment, a polarization measuring device comprises a light source, a reticle positioned below the light source, an opaque frame having a single aperture, the opaque frame positioned below the reticle, a lens positioned below the opaque frame, and a wafer having photoresist on its surface. The aperture of the frame allows no more than a first light ray to pass from the light source through the reticle and the lens onto a first surface point on the photoresist. The aperture of the frame also allows no more than a second light ray to pass from the light source through the reticle and the lens onto a second surface point on the photoresist. The degree of polarization of the light source can be determined from the first amount of light absorbed at the first surface point and the second amount of light absorbed at the second surface point.

Abstract: An optical tool includes a tool body that is transparent to light. Pluralities of parallel opaque lines on the body form a first outline in the shape of the square, and a second outline in the shape of a square which is centrally located relative to and within the first-mentioned square. Each pair of adjacent parallel lines has therebetween a first region that allows transmission of light therethrough without changing phase thereof, and a second region alongside the first region that allows transmission of light therethrough while shifting the phase thereof by 90°. The phase shifting and non-phase shifting regions are positioned so that the images of the outlines provided by a lens on an object shit in position a substantial amount as the distance between the lens and the object is changed.

Abstract: In the present method of electrically testing the width of a line, a short pulse of laser energy is applied to the line to generate conductive electrons therein. An electrical potential is applied to the line to cause electrons to flow in the line, and current is measured to determine the width of the line.

Abstract: A method and system for providing a semiconductor device on a substrate are disclosed. The method and system include providing a tunneling barrier on the substrate and providing at least one gate on the tunneling barrier. The at least one of gate includes a first edge, a second edge and a base. The method and system further include providing a source and/or a drain for the at least one gate. The source and/or a drain are in proximity to the first edge or the first and second edges of the at least one gate. The at least one gate, the source and/or drain or both the at least one gate and the source and/or drain are configured such that source and/or drain do not substantially overlap the at least one gate at the base of the at least one gate.

Abstract: A method of forming narrow trenches in a layer of photoresist is disclosed. The method includes providing a photoresist layer and patterning the photoresist layer to form a plurality of apertures having sidewalls. The method can also include silylating the sidewalls of the apertures in the photoresist layer and reflowing the photoresist layer. The process can be utilized to form contacts having widths which are less than one lithographic feature wide.

Abstract: An inspection tool or inspection system can be utilized to determine whether the appropriate pattern is on a reticle. The reticle can be associated with EUV lithographic tools. The system utilizes an at least two wavelengths of light. The light is directed to the reticle at the at least two wavelengths of light.

Abstract: A mask or reticle is optimized for use in a lithographic system. The mask or reticle includes a substrate and a pupil filter pattern. The substrate includes an IC pattern representing at least one integrated circuit feature. The pupil filter pattern can enhance the resolution associated with the lithographic system.

Abstract: An optical monitor includes a body having a first plurality of parallel, substantially opaque, spaced apart lines thereon, and the second plurality of parallel, substantially opaque, spaced apart lines thereon, with a relatively small angle between the first and second pluralities of lines. A an image of the lines of the first plurality thereof is provided on the semiconductor body, upon relative movement of the monitor toward and away from the semiconductor body, the line images move relative to the semiconductor body. The images of the lines of the second plurality thereof provided on the semiconductor body move in a different manner upon relative movement if the monitor toward and away from the semiconductor body: The moiré fringe formed on the semiconductor body from images of the first and second plurality of lines during such movement is analyzed in order to achieve proper focus of the image on the semiconductor body.

Abstract: A method of observing overlay errors associated with two masks or reticles includes providing alignment marks to a substrate. The alignment marks can be observed to determine overlay errors. In one embodiment, the lightness or darkness of the alignment marks can indicate an overlay error. The technique can be utilized in any photolithographic system including an EUV, VUV, DUV or conventional patterning device.

Abstract: The present invention provides a method for measuring lens aberration of light on a wafer. The method includes printing a pattern on the wafer by projecting the pattern through a lens in a plurality of pitches and directions; measuring a plurality of critical dimension (CD) differences between two locations on the printed pattern for each of the plurality of pitches and directions; and determining at least one Zernike coma aberration coefficient based on the measured plurality of CD differences. The method in accordance with the present invention measures the CD difference between two locations on the printed pattern on a wafer. This CD difference is then used to calculate the Zernike coma aberration coefficients. No projected reference pattern is required to measure the CD difference, and thus an absolute coma aberration can be calculated.

Abstract: In a method of determining a linewidth of a polysilicon line formed by a lithographic process, a polysilicon layer is formed on a substrate. A line is patterned from said polysilicon layer using said lithographic process and a Van der Pauw structure is patterned from said polysilicon layer. N2 is then implanted into the polysilicon line and the polysilicon Van der Pauw structure to form a depletion barrier. A P-type dopant is the implanted into the polysilicon line and the polysilicon Van der Pauw structure and the dopant is activated. A sheet resistivity of the Van der Pauw structure is determined, and the linewidth of the polysilicon line is then determined by electrical linewidth measurement using the sheet resistivity of the Van der Pauw structure as the sheet resistivity of the polysilicon line. A related test structure is also disclosed.