Patents by Inventor Jose Luis Ceballos

Jose Luis Ceballos has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170272879
    Abstract: System and method for detecting a glitch is disclosed. An embodiment comprises increasing a bias voltage of a first capacitor, sampling an input signal of a first plate of the first capacitor with a time period, mixing the input signal with the sampled input signal, and comparing the mixed signal with a reference signal.
    Type: Application
    Filed: June 5, 2017
    Publication date: September 21, 2017
    Inventors: Michael Kropfitsch, Jose Luis Ceballos
  • Patent number: 9729988
    Abstract: System and method for detecting a glitch is disclosed. An embodiment comprises increasing a bias voltage of a first capacitor, sampling an input signal of a first plate of the first capacitor with a time period, mixing the input signal with the sampled input signal, and comparing the mixed signal with a reference signal.
    Type: Grant
    Filed: July 28, 2015
    Date of Patent: August 8, 2017
    Assignee: Infineon Technologies AG
    Inventors: Michael Kropfitsch, Jose Luis Ceballos
  • Patent number: 9722563
    Abstract: In accordance with an embodiment, a method includes determining an amplitude of an input signal provided by a capacitive signal source, compressing the input signal in an analog domain to form a compressed analog signal based on the determined amplitude, converting the compressed analog signal to a compressed digital signal, and decompressing the digital signal in a digital domain to form a decompressed digital signal. In an embodiment, compressing the analog signal includes adjusting a first gain of an amplifier coupled to the capacitive signal source, and decompressing the digital signal comprises adjusting a second gain of a digital processing block.
    Type: Grant
    Filed: August 8, 2016
    Date of Patent: August 1, 2017
    Assignee: Infineon Technologies AG
    Inventors: Michael Kropfitsch, Jose Luis Ceballos
  • Patent number: 9626909
    Abstract: Disclosed are controllable drive circuits for powering an organic light emitting diode (OLED) or other electronic load. According to one implementation, a circuit structure is provided that applies a pulse width modulated (PWM) drive current to an OLED. The time-average drive current to the OLED can be modulated in accordance with a periodically sampled control signal. In turn, the luminance of the OLED can be suitably varied over a control range. Circuit structures provided may be fabricated at least in part on a common substrate such that respective integrated circuit devices are defined. In one or more implementations, at least a portion of drive circuits may be fabricated within a 65 nanometer (or smaller) environment.
    Type: Grant
    Filed: August 15, 2011
    Date of Patent: April 18, 2017
    Assignee: Infineon Technologies AG
    Inventor: Jose Luis Ceballos
  • Publication number: 20170099549
    Abstract: Methods and apparatuses are provided wherein a sensor which comprises at least two electrodes and a movable part is alternately biased with at least two different voltages.
    Type: Application
    Filed: December 19, 2016
    Publication date: April 6, 2017
    Inventors: Christoph Bernhard WURZINGER, Jose Luis CEBALLOS
  • Patent number: 9525925
    Abstract: Methods and apparatuses are provided wherein a sensor which comprises at least two electrodes and a movable part is alternately biased with at least two different voltages.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: December 20, 2016
    Assignee: Infineon Technologies AG
    Inventors: Christoph Bernhard Wurzinger, Jose Luis Ceballos
  • Publication number: 20160344360
    Abstract: In accordance with an embodiment, a method includes determining an amplitude of an input signal provided by a capacitive signal source, compressing the input signal in an analog domain to form a compressed analog signal based on the determined amplitude, converting the compressed analog signal to a compressed digital signal, and decompressing the digital signal in a digital domain to form a decompressed digital signal. In an embodiment, compressing the analog signal includes adjusting a first gain of an amplifier coupled to the capacitive signal source, and decompressing the digital signal comprises adjusting a second gain of a digital processing block.
    Type: Application
    Filed: August 8, 2016
    Publication date: November 24, 2016
    Inventors: Michael Kropfitsch, Jose Luis Ceballos
  • Patent number: 9455671
    Abstract: In accordance with an embodiment, a system for amplifying a signal provided by a capacitive signal source includes a first voltage follower device, a second voltage follower device, and a first capacitor. The first voltage follower device includes an input terminal configured to be coupled to a first terminal of the capacitive signal source, and the second voltage follower device includes an input terminal coupled to the first output terminal of the first voltage follower device, and an output terminal coupled to a second output terminal of the first voltage follower device. Furthermore, first capacitor has a first end coupled to a first output terminal of the first voltage follower device, and a second end configured to be coupled to a second terminal of the capacitive signal source.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: September 27, 2016
    Assignee: Infineon Technologies AG
    Inventors: Michael Kropfitsch, Jose Luis Ceballos
  • Patent number: 9413317
    Abstract: In accordance with an embodiment, a method includes determining an amplitude of an input signal provided by a capacitive signal source, compressing the input signal in an analog domain to form a compressed analog signal based on the determined amplitude, converting the compressed analog signal to a compressed digital signal, and decompressing the digital signal in a digital domain to form a decompressed digital signal. In an embodiment, compressing the analog signal includes adjusting a first gain of an amplifier coupled to the capacitive signal source, and decompressing the digital signal comprises adjusting a second gain of a digital processing block.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: August 9, 2016
    Assignee: Infineon Technologies AG
    Inventors: Michael Kropfitsch, Jose Luis Ceballos
  • Publication number: 20160065152
    Abstract: According to an embodiment, a method includes amplifying a signal provided by a capacitive signal source to form an amplified signal, detecting a peak voltage of the amplified signal, and adjusting a controllable impedance coupled to an output of the capacitive signal source in response to detecting the peak voltage. The controllable impedance is adjusted to a value inversely proportional to the detected peak voltage.
    Type: Application
    Filed: November 6, 2015
    Publication date: March 3, 2016
    Inventors: Michael Kropfitsch, Jose Luis Ceballos
  • Patent number: 9276604
    Abstract: Representative implementations of devices and techniques provide analog to digital conversion of an analog input. A multistage modulator using a feed-forward technique can alternately convert integrated samples of the analog input to digital representations. For example, the modulator is arranged to alternately output the digital representations to form a digital representation of the analog input.
    Type: Grant
    Filed: June 16, 2014
    Date of Patent: March 1, 2016
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Jose Luis Ceballos, Christian Reindl, Snezana Stojanovic
  • Patent number: 9236837
    Abstract: According to an embodiment, a method includes amplifying a signal provided by a capacitive signal source to form an amplified signal, detecting a peak voltage of the amplified signal, and adjusting a controllable impedance coupled to an output of the capacitive signal source in response to detecting the peak voltage. The controllable impedance is adjusted to a value inversely proportional to the detected peak voltage.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: January 12, 2016
    Assignee: Infineon Technologies AG
    Inventors: Michael Kropfitsch, Jose Luis Ceballos
  • Publication number: 20150365102
    Abstract: Representative implementations of devices and techniques provide analog to digital conversion of an analog input. A multistage modulator using a feed-forward technique can alternately convert integrated samples of the analog input to digital representations. For example, the modulator is arranged to alternately output the digital representations to form a digital representation of the analog input.
    Type: Application
    Filed: June 16, 2014
    Publication date: December 17, 2015
    Inventors: Jose Luis CEBALLOS, Christian REINDL, Snezana STOJANOVIC
  • Publication number: 20150334499
    Abstract: System and method for detecting a glitch is disclosed. An embodiment comprises increasing a bias voltage of a first capacitor, sampling an input signal of a first plate of the first capacitor with a time period, mixing the input signal with the sampled input signal, and comparing the mixed signal with a reference signal.
    Type: Application
    Filed: July 28, 2015
    Publication date: November 19, 2015
    Inventors: Michael Kropfitsch, Jose Luis Ceballos
  • Publication number: 20150311870
    Abstract: In accordance with an embodiment, a system for amplifying a signal provided by a capacitive signal source includes a first voltage follower device, a second voltage follower device, and a first capacitor. The first voltage follower device includes an input terminal configured to be coupled to a first terminal of the capacitive signal source, and the second voltage follower device includes an input terminal coupled to the first output terminal of the first voltage follower device, and an output terminal coupled to a second output terminal of the first voltage follower device. Furthermore, first capacitor has a first end coupled to a first output terminal of the first voltage follower device, and a second end configured to be coupled to a second terminal of the capacitive signal source.
    Type: Application
    Filed: June 12, 2015
    Publication date: October 29, 2015
    Inventors: Michael Kropfitsch, Jose Luis Ceballos
  • Patent number: 9143876
    Abstract: System and method for detecting a glitch is disclosed. An embodiment comprises increasing a bias voltage of a first capacitor, sampling an input signal of a first plate of the first capacitor with a time period, mixing the input signal with the sampled input signal, and comparing the mixed signal with a reference signal.
    Type: Grant
    Filed: November 17, 2011
    Date of Patent: September 22, 2015
    Assignee: Infineon Technologies AG
    Inventors: Michael Kropfitsch, Jose Luis Ceballos
  • Patent number: 9136862
    Abstract: In one embodiment the quantizer includes a signal-to-phase converter configured to generate a phase signal according to an input signal and a phase difference digitization block configured to generate a quantization output according to differentiated samples of the phase signal, where the phase signal generated by the signal-to-phase converter has a sinusoidal shape.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: September 15, 2015
    Assignee: Infineon Technologies AG
    Inventors: Michael Kropfitsch, Jose Luis Ceballos
  • Patent number: 9083286
    Abstract: In accordance with an embodiment, a system for amplifying a signal provided by a capacitive signal source includes a first voltage follower device, a second voltage follower device, and a first capacitor. The first voltage follower device includes an input terminal configured to be coupled to a first terminal of the capacitive signal source, and the second voltage follower device includes an input terminal coupled to the first output terminal of the first voltage follower device, and an output terminal coupled to a second output terminal of the first voltage follower device. Furthermore, first capacitor has a first end coupled to a first output terminal of the first voltage follower device, and a second end configured to be coupled to a second terminal of the capacitive signal source.
    Type: Grant
    Filed: October 31, 2012
    Date of Patent: July 14, 2015
    Assignee: Infineon Technologies AG
    Inventors: Michael Kropfitsch, Jose Luis Ceballos
  • Patent number: 9071263
    Abstract: Representative implementations of devices and techniques provide analog to digital conversion of analog inputs. A plurality of analog-to-digital converters (ADCs) can be arranged such that one or more of the ADCs is operating at a sampling rate that is less than others of the plurality of ADCs. For example, a sampling rate interpolator may be used to increase a sampling rate of signals output at the one or more ADCs operating at the lower sampling rate, allowing pipelining of the plurality of ADCs.
    Type: Grant
    Filed: November 20, 2013
    Date of Patent: June 30, 2015
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Dietmar Straeussnigg, Andreas Wiesbauer, Jose Luis Ceballos
  • Publication number: 20150180500
    Abstract: In one embodiment the quantizer includes a signal-to-phase converter configured to generate a phase signal according to an input signal and a phase difference digitization block configured to generate a quantization output according to differentiated samples of the phase signal, where the phase signal generated by the signal-to-phase converter has a sinusoidal shape.
    Type: Application
    Filed: December 23, 2013
    Publication date: June 25, 2015
    Inventors: Michael Kropfitsch, Jose Luis Ceballos