Patents by Inventor Jose Luis Ceballos
Jose Luis Ceballos has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150138006Abstract: Representative implementations of devices and techniques provide analog to digital conversion of analog inputs. A plurality of analog-to-digital converters (ADCs) can be arranged such that one or more of the ADCs is operating at a sampling rate that is less than others of the plurality of ADCs. For example, a sampling rate interpolator may be used to increase a sampling rate of signals output at the one or more ADCs operating at the lower sampling rate, allowing pipelining of the plurality of ADCs.Type: ApplicationFiled: November 20, 2013Publication date: May 21, 2015Applicant: Infineon Technologies AGInventors: Dietmar STRAEUSSNIGG, Andreas WIESBAUER, Jose Luis CEBALLOS
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Patent number: 8963630Abstract: In accordance with an embodiment, a method includes activating a first semiconductor switch having a first switch node coupled to a first input of a bootstrap circuit, a second switch node, and a control node coupled to a first end of a capacitor of the bootstrap circuit. A first end of the capacitor is coupled to the first input of the bootstrap circuit and a second end of the capacitor is set to a first voltage. Next, the first end of the capacitor is decoupled from the first input of the bootstrap circuit, and the second end of the capacitor is set to a second voltage. The control node is boosted to a first activation voltage that turns on the first semiconductor switch.Type: GrantFiled: June 19, 2012Date of Patent: February 24, 2015Assignee: Infineon Technologies AGInventors: Jose Luis Ceballos, Christian Reindl
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Patent number: 8947285Abstract: Representative implementations of devices and techniques provide analog to digital conversion of analog inputs. A multistage comparator using a feed-forward technique can provide noise shaping of conversion errors. For example, the comparator may feed a conversion error forward from a first stage to a next stage of the multistage comparator.Type: GrantFiled: March 12, 2013Date of Patent: February 3, 2015Assignee: Infineon Technologies AGInventor: Jose Luis Ceballos
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Patent number: 8872589Abstract: In accordance with an embodiment, a system includes a programmable gain amplifier having a switchable feedback capacitor coupled in parallel with a first capacitor and a controller. The controller is configured to couple the feedback capacitor between an input node of the programmable gain amplifier and an output node of the programmable gain amplifier in a first gain setting, and switch a first terminal of the feedback capacitor from the output of the programmable gain amplifier to a reference node while a second terminal of the feedback capacitor remains coupled to the input node of the programmable gain amplifier for a first time period when transitioning from the first gain setting to a second gain setting.Type: GrantFiled: September 20, 2012Date of Patent: October 28, 2014Assignee: Infineon Technologies AGInventors: Dieter Draxelmayr, Michael Kropfitsch, Jose Luis Ceballos
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Publication number: 20140266827Abstract: Representative implementations of devices and techniques provide analog to digital conversion of analog inputs. A multistage comparator using a feed-forward technique can provide noise shaping of conversion errors. For example, the comparator may feed a conversion error forward from a first stage to a next stage of the multistage comparator.Type: ApplicationFiled: March 12, 2013Publication date: September 18, 2014Applicant: Infineon Technologies AGInventor: Jose Luis Ceballos
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Publication number: 20140140538Abstract: In accordance with an embodiment, a method includes determining an amplitude of an input signal provided by a capacitive signal source, compressing the input signal in an analog domain to form a compressed analog signal based on the determined amplitude, converting the compressed analog signal to a compressed digital signal, and decompressing the digital signal in a digital domain to form a decompressed digital signal. In an embodiment, compressing the analog signal includes adjusting a first gain of an amplifier coupled to the capacitive signal source, and decompressing the digital signal comprises adjusting a second gain of a digital processing block.Type: ApplicationFiled: January 24, 2014Publication date: May 22, 2014Applicant: Infineon Technologies AGInventors: Michael Kropfitsch, Jose Luis Ceballos
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Publication number: 20140119573Abstract: In accordance with an embodiment, a system for amplifying a signal provided by a capacitive signal source includes a first voltage follower device, a second voltage follower device, and a first capacitor. The first voltage follower device includes an input terminal configured to be coupled to a first terminal of the capacitive signal source, and the second voltage follower device includes an input terminal coupled to the first output terminal of the first voltage follower device, and an output terminal coupled to a second output terminal of the first voltage follower device. Furthermore, first capacitor has a first end coupled to a first output terminal of the first voltage follower device, and a second end configured to be coupled to a second terminal of the capacitive signal source.Type: ApplicationFiled: October 31, 2012Publication date: May 1, 2014Applicant: INFINEON TECHNOLOGIES AGInventors: Michael Kropfitsch, Jose Luis Ceballos
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Publication number: 20140077882Abstract: In accordance with an embodiment, a system includes a programmable gain amplifier having a switchable feedback capacitor coupled in parallel with a first capacitor and a controller. The controller is configured to couple the feedback capacitor between an input node of the programmable gain amplifier and an output node of the programmable gain amplifier in a first gain setting, and switch a first terminal of the feedback capacitor from the output of the programmable gain amplifier to a reference node while a second terminal of the feedback capacitor remains coupled to the input node of the programmable gain amplifier for a first time period when transitioning from the first gain setting to a second gain setting.Type: ApplicationFiled: September 20, 2012Publication date: March 20, 2014Applicant: INFINEON TECHNOLOGIES AGInventors: Dieter Draxelmayr, Michael Kropfitsch, Jose Luis Ceballos
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Patent number: 8638249Abstract: In accordance with an embodiment, a method includes determining an amplitude of an input signal provided by a capacitive signal source, compressing the input signal in an analog domain to form a compressed analog signal based on the determined amplitude, converting the compressed analog signal to a compressed digital signal, and decompressing the digital signal in a digital domain to form a decompressed digital signal. In an embodiment, compressing the analog signal includes adjusting a first gain of an amplifier coupled to the capacitive signal source, and decompressing the digital signal comprises adjusting a second gain of a digital processing block.Type: GrantFiled: April 16, 2012Date of Patent: January 28, 2014Assignee: Infineon Technologies AGInventors: Michael Kropfitsch, Jose Luis Ceballos
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Patent number: 8633843Abstract: In accordance with an embodiment, a circuit includes an analog chopping circuit having a first input coupled to a system input and a second input coupled to a first chopping signal, an oversampled data converter having an input coupled to an output of the analog chopping circuit, where the oversampled data converter is configured to produce an oversampled digital signal at an output of the oversampled data converter. The circuit further includes a digital filter having an input coupled to the output of the oversampled data converter, and a digital chopping circuit including a first input coupled to the output of the oversampled data converter, and a second input coupled to a second chopping signal. The digital filter is configured to filter quantization noise generated by the oversampled data converter.Type: GrantFiled: June 19, 2012Date of Patent: January 21, 2014Assignee: Infineon Technologies AGInventors: Jose Luis Ceballos, Christian Reindl, Armin Albaner
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Publication number: 20130335131Abstract: In an embodiment, a circuit includes a forward path circuit having an auto-zero switch coupled between an input of an amplifier and an output of the amplifier, a first chopping circuit having an input coupled to an input of the forward path circuit and an output coupled to the input of the amplifier, and a second chopping circuit having an input coupled to the output of the amplifier and an output coupled to an output of the forward path circuit. The circuit further includes a feedback circuit that has a feedback switch, a feedback capacitor including a first end coupled to an output of the amplifier, a third chopping circuit coupled between the input of the forward path circuit and a first end of a feedback switch, and a fourth chopping circuit coupled between a second end of the feedback switch and a second end of the feedback capacitor.Type: ApplicationFiled: June 19, 2012Publication date: December 19, 2013Applicant: INFINEON TECHNOLOGIES AGInventors: Jose Luis Ceballos, Christian Reindl, Jonathan Paca
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Publication number: 20130335247Abstract: In accordance with an embodiment, a circuit includes an analog chopping circuit having a first input coupled to a system input and a second input coupled to a first chopping signal, an oversampled data converter having an input coupled to an output of the analog chopping circuit, where the oversampled data converter is configured to produce an oversampled digital signal at an output of the oversampled data converter. The circuit further includes a digital filter having an input coupled to the output of the oversampled data converter, and a digital chopping circuit including a first input coupled to the output of the oversampled data converter, and a second input coupled to a second chopping signal. The digital filter is configured to filter quantization noise generated by the oversampled data converter.Type: ApplicationFiled: June 19, 2012Publication date: December 19, 2013Applicant: INFINEON TECHNOLOGIES AGInventors: Jose Luis Ceballos, Christian Reindl, Armin Albaner
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Publication number: 20130335055Abstract: In accordance with an embodiment, a method includes activating a first semiconductor switch having a first switch node coupled to a first input of a bootstrap circuit, a second switch node, and a control node coupled to a first end of a capacitor of the bootstrap circuit. A first end of the capacitor is coupled to the first input of the bootstrap circuit and a second end of the capacitor is set to a first voltage. Next, the first end of the capacitor is decoupled from the first input of the bootstrap circuit, and the second end of the capacitor is set to a second voltage. The control node is boosted to a first activation voltage that turns on the first semiconductor switch.Type: ApplicationFiled: June 19, 2012Publication date: December 19, 2013Applicant: INFINEON TECHNOLOGIES AGInventors: Jose Luis Ceballos, Christian Reindl
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Patent number: 8610497Abstract: According to an embodiment, a system for amplifying a signal provided by a capacitive signal source includes a first stage and a second stage. The first stage has a voltage follower device including an input terminal configured to be coupled to a first terminal of the capacitive signal source, and a first capacitor having a first end coupled to an output terminal of the voltage follower device, and a second end configured to be coupled to a second terminal of the capacitive signal source. The second stage includes a differential amplifier capacitively coupled to the output terminal of the voltage follower device.Type: GrantFiled: July 14, 2011Date of Patent: December 17, 2013Assignee: Infineon Technologies AGInventors: Michael Kropfitsch, Jose Luis Ceballos
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Patent number: 8604861Abstract: In an embodiment, a circuit includes a forward path circuit having an auto-zero switch coupled between an input of an amplifier and an output of the amplifier, a first chopping circuit having an input coupled to an input of the forward path circuit and an output coupled to the input of the amplifier, and a second chopping circuit having an input coupled to the output of the amplifier and an output coupled to an output of the forward path circuit. The circuit further includes a feedback circuit that has a feedback switch, a feedback capacitor including a first end coupled to an output of the amplifier, a third chopping circuit coupled between the input of the forward path circuit and a first end of a feedback switch, and a fourth chopping circuit coupled between a second end of the feedback switch and a second end of the feedback capacitor.Type: GrantFiled: June 19, 2012Date of Patent: December 10, 2013Assignee: Infineon Technologies AGInventors: Jose Luis Ceballos, Christian Reindl, Jonathan Paca
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Publication number: 20130271307Abstract: In accordance with an embodiment, a method includes determining an amplitude of an input signal provided by a capacitive signal source, compressing the input signal in an analog domain to form a compressed analog signal based on the determined amplitude, converting the compressed analog signal to a compressed digital signal, and decompressing the digital signal in a digital domain to form a decompressed digital signal. In an embodiment, compressing the analog signal includes adjusting a first gain of an amplifier coupled to the capacitive signal source, and decompressing the digital signal comprises adjusting a second gain of a digital processing block.Type: ApplicationFiled: April 16, 2012Publication date: October 17, 2013Applicant: INFINEON TECHNOLOGIES AGInventors: Michael Kropfitsch, Jose Luis Ceballos
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Publication number: 20130129116Abstract: System and method for detecting a glitch is disclosed. An embodiment comprises increasing a bias voltage of a first capacitor, sampling an input signal of a first plate of the first capacitor with a time period, mixing the input signal with the sampled input signal, and comparing the mixed signal with a reference signal.Type: ApplicationFiled: November 17, 2011Publication date: May 23, 2013Applicant: Infineon Technologies AGInventors: Michael Kropfitsch, Jose Luis Ceballos
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Patent number: 8401208Abstract: A low impedance coupling to bias voltage dissipates abnormal charge levels within a microphone in response to a shock event such as dropping or bumping. High impedance coupling to bias voltage is thereafter restored.Type: GrantFiled: November 14, 2007Date of Patent: March 19, 2013Assignee: Infineon Technologies AGInventors: Jose Luis Ceballos, Michael Kropfitsch
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Publication number: 20130051582Abstract: According to an embodiment, a method includes amplifying a signal provided by a capacitive signal source to form an amplified signal, detecting a peak voltage of the amplified signal, and adjusting a controllable impedance coupled to an output of the capacitive signal source in response to detecting the peak voltage. The controllable impedance is adjusted to a value inversely proportional to the detected peak voltage.Type: ApplicationFiled: August 25, 2011Publication date: February 28, 2013Applicant: Infineon Technologies AGInventors: Michael Kropfitsch, Jose Luis Ceballos
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Publication number: 20130015919Abstract: According to an embodiment, a system for amplifying a signal provided by a capacitive signal source includes a first stage and a second stage. The first stage has a voltage follower device including an input terminal configured to be coupled to a first terminal of the capacitive signal source, and a first capacitor having a first end coupled to an output terminal of the capacitive signal source. The second stage includes a differential amplifier capacitively coupled to the output terminal of the voltage follower device.Type: ApplicationFiled: July 14, 2011Publication date: January 17, 2013Applicant: Infineon Technologies AGInventors: Michael Kropfitsch, Jose Luis Ceballos