Abstract: A patterning method includes providing a first material (e.g., copper) and transforming at a least a surface region of the first material to a second material (e.g., copper oxide). One or more portions of the second material (e.g., copper oxide) are converted to one or more converted portions of first material (e.g., copper) while one or more portions of the second material (e.g., copper oxide) remain. One or more portions of the remaining second material (e.g., copper oxide) are removed selectively relative to converted portions of first material (e.g., copper). Further, a thickness of the converted portions may be increased. Yet further, a diffusion barrier layer may be used for certain applications.

Abstract: A method of aligning a plurality of empty-spaced buried patterns formed in semiconductor monocrystalline substrates is disclosed. In an exemplary embodiment, high-temperature metal marks are formed to include a conductive material having a melting temperature higher than an annealing temperature used to form such empty-spaced buried patterns. The high-temperature metal marks are formed prior to the formation of the empty-spaced buried patterns formed in a monocrystalline substrate, so that the empty-space buried patterns are aligned to the marks. Subsequent semiconductor structures that are formed as part of desired semiconductor devices can be also aligned to the marks.

Abstract: A photonic crystal optical fiber made up of an array of conventional hollow core optical fibers is disclosed. The array of optical fibers omits at least one fiber to form a central hollow core. The fiber works on the principle of two-dimensional photonic crystals to confine the radiation in a guided wave within the central hollow core. The fiber has a true photonic bandgap in which radiation of a particular energy or wavelength is totally forbidden, thereby providing a very high reflection coefficient to radiation incident the walls of the central hollow core over a select range of angles. The central hollow core allows for radiation propagation with minimal absorption.

Abstract: A floating gate transistor has a reduced barrier energy at an interface with an adjacent amorphous silicon carbide (a-SiC) gate insulator, allowing faster charge transfer across the gate insulator at lower voltages. Data is stored as charge on the floating gate. The data charge retention time on the floating gate is reduced. The data stored on the floating gate is dynamically refreshed. The floating gate transistor provides a dense and planar dynamic electrically alterable and programmable read only memory (DEAPROM) cell adapted for uses such as for a dynamic random access memory (DRAM) or a dynamically refreshed flash EEPROM memory. The floating gate transistor provides a high gain memory cell and low voltage operation.

Abstract: Systems and methods are provided for a scalable high-performance antifuse structure and process that has a low RC component, a uniform dielectric breakdown, and a very low, effective dielectric constant (keff) such that a programming pulse voltage is scalable with Vdd. One aspect of the present subject matter is an antifuse device that is positioned or coupled between a first metal level and a second metal level. One embodiment of the antifuse device includes a porous antifuse dielectric layer, and at least one injector Silicon-Rich-Insulator (SRI) layer in contact with the porous antifuse dielectric layer. In one embodiment, the porous antifuse dielectric layer includes SiO2 formed with air-filled voids. In one embodiment, the at least one injector SRI layer includes two injector Silicon-Rich-Nitride layers that sandwich the porous antifuse dielectric layer. Other aspects are provided herein.

Abstract: One aspect of this disclosure relates to a method for creating a gettering site in a semiconductor wafer. In various embodiments, a predetermined arrangement of a plurality of holes is formed in the semiconductor wafer through a surface of the wafer. The wafer is annealed such that the wafer undergoes a surface transformation to transform the arrangement of the plurality of holes into a predetermined arrangement of at least one empty space of a predetermined size within the wafer to form the gettering site. One aspect relates to a semiconductor wafer. In various embodiments, the wafer includes at least one device region, and at least one gettering region located proximate to the at least one device region. The gettering region includes a precisely-determined arrangement of a plurality of precisely-formed voids that are formed within the wafer using a surface transformation process. Other aspects and embodiments are provided herein.

Abstract: A method and structure for high capacitance memory cells is provided. The method includes forming a trench capacitor in a semiconductor substrate. A self-structured mask is formed on the interior surface of the trench. The interior surface of the trench is etched to form an array of silicon pillars. The self-structured mask is removed. Then an insulator layer is formed on the array of silicon pillars. A polycrystalline semiconductor plate extends outwardly from the insulator layer in the trench.

Abstract: A method of forming a periodic index of refraction pattern in a superlattice of a solid material to achieve photonic bandgap effects at desired optical wavelengths is disclosed. A plurality of space group symmetries, including a plurality of empty-spaced buried patterns, are formed by drilling holes in the solid material and annealing the solid material to form empty-spaced patterns of various geometries. The empty-spaced patterns may have various sizes and may be formed at different periodicities, so that various photonic band structures can be produced for wavelength regions of interest.

Abstract: A waveguide structure formed with a three-dimensional (3D) photonic crystal is disclosed. The 3D photonic crystal comprises a periodic array of voids formed in a solid substrate. The voids are arranged to create a complete photonic bandgap. The voids may be formed using a technique called “surface transformation,” which involves forming holes in the substrate surface, and annealing the substrate to initiate migration of the substrate near the surface to form voids in the substrate. A channel capable of transmitting radiation corresponding to the complete bandgap is formed in the 3D photonic crystal, thus forming the waveguide. The waveguide may be formed by interfacing two 3D photonic crystal regions, with at least one of the regions having a channel formed therein. The bandgap wavelength can be chosen by arranging the periodic array of voids to have a lattice constant a fraction of the bandgap wavelength.

Abstract: A surface-transformation method of forming regions of a second material in a first solid material to control the properties of the first solid material is disclosed. The regions of the second material are formed in the first solid material by drilling holes to a predefined depth and at a predefined lattice position. The holes in the first solid material are then filled with a second material and then the first and second materials are heated to a temperature close to the melting point of the first solid material to spontaneously form the regions filled with the second material and embedded in the first solid material at the desired location. A liquid-phase immersion method or a deposition method may be employed to fill the holes in the first solid material.

Abstract: A method of aligning a plurality of empty-spaced buried patterns formed in semiconductor monocrystalline substrates is disclosed. In an exemplary embodiment, high-temperature metal marks are formed to include a conductive material having a melting temperature higher than an annealing temperature used to form such empty-spaced buried patterns. The high-temperature metal marks are formed prior to the formation of the empty-spaced buried patterns formed in a monocrystalline substrate, so that the empty-space buried patterns are aligned to the marks. Subsequent semiconductor structures that are formed as part of desired semiconductor devices can be also aligned to the marks.

Abstract: A photonic crystal optical fiber made up of an array of conventional hollow core optical fibers is disclosed. The array of optical fibers omits at least one fiber to form a central hollow core. The fiber works on the principle of two-dimensional photonic crystals to confine the radiation in a guided wave within the central hollow core. The fiber has a true photonic bandgap in which radiation of a particular energy or wavelength is totally forbidden, thereby providing a very high reflection coefficient to radiation incident the walls of the central hollow core over a select range of angles. The central hollow core allows for radiation propagation with minimal absorption.

Abstract: A method of aligning a plurality of empty-spaced buried patterns formed in semiconductor monocrystalline substrates is disclosed. In an exemplary embodiment, high-temperature metal marks are formed to include a conductive material having a melting temperature higher than an annealing temperature used to form such empty-spaced buried patterns. The high-temperature metal marks are formed prior to the formation of the empty-spaced buried patterns formed in a monocrystalline substrate, so that the empty-space buried patterns are aligned to the marks. Subsequent semiconductor structures that are formed as part of desired semiconductor devices can be also aligned to the marks.

Abstract: A method and structure for high capacitance memory cells is provided. The method includes forming a trench capacitor in a semiconductor substrate. A self-structured mask is formed on the interior surface of the trench. The interior surface of the trench is etched to form an array of silicon pillars. The self-structured mask is removed. Then an insulator layer is formed on the array of silicon pillars. A polycrystalline semiconductor plate extends outwardly from the insulator layer in the trench.

Abstract: A photonic crystal optical fiber made up of an array of conventional hollow core optical fibers is disclosed. The array of optical fibers omits at least one fiber to form a central hollow core. The fiber works on the principle of two-dimensional photonic crystals to confine the radiation in a guided wave within the central hollow core. The fiber has a true photonic bandgap in which radiation of a particular energy or wavelength is totally forbidden, thereby providing a very high reflection coefficient to radiation incident the walls of the central hollow core over a select range of angles. The central hollow core allows for radiation propagation with minimal absorption.

Abstract: Systems, devices and methods are provided that are related to cellular materials that have a precisely-determined arrangement of voids formed using surface transformation. In various embodiments, the cellular materials are suitable for use in various structural, mechanical and/or thermal applications. One aspect of the present subject matter is a method of forming cellular material. According to various embodiments of the method, a predetermined arrangement of the plurality of holes is formed in a volume of material through a surface of the volume of material. The volume of material is annealed such that the volume of material undergoes a surface transformation in which the arrangement of the plurality of holes is transformed into a predetermined arrangement of at least one empty space below the surface of the volume of material. Other aspects are provided herein.

Abstract: A floating gate transistor has a reduced barrier energy at an interface with an adjacent gate insulator, allowing faster charge transfer across the gate insulator at lower voltages. Data is stored as charge on the floating gate. The data charge retention time on the floating gate is reduced. The data stored on the floating gate is dynamically refreshed. The floating gate transistor provides a dense and planar dynamic electrically alterable and programmable read only memory (DEAPROM) cell adapted for uses such as for a dynamic random access memory (DRAM) or a dynamically refreshed flash EEPROM memory. The floating gate transistor provides a high gain memory cell and low voltage operation.

Abstract: An integrated circuit with a number of optical waveguides that are formed in high aspect ratio holes. The high aspect ratio holes extend through a semiconductor wafer. The optical waveguides include a highly reflective material that is deposited so as to line an inner surface of the high aspect ratio holes which may be filled with air or a material with an index of refraction that is greater than 1. These metal confined waveguides are used to transmit signals between functional circuits on the semiconductor wafer and functional circuits on the back of the wafer or beneath the wafer.

Abstract: An integrated circuit with a number of optical fibers that are formed in high aspect ratio holes. The high aspect ratio holes extend through a semiconductor wafer. The optical fibers include a cladding layer and a core formed in the high aspect ratio hole. These optical fibers are used to transmit signals between functional circuits on the semiconductor wafer and functional circuits on the back of the wafer or beneath the wafer.

Abstract: An integrated circuit with a number of optical fibers that are formed in high aspect ratio holes. The high aspect ratio holes extend through a semiconductor wafer. The optical fibers include a cladding layer and a core formed in the high aspect ratio hole. These optical fibers are used to transmit signals between functional circuits on the semiconductor wafer and functional circuits on the back of the wafer or beneath the wafer.