Patents by Inventor Joseph H. Colles

Joseph H. Colles has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210036608
    Abstract: A charge pump having only NMOS devices charges a plurality of capacitors to a parallel charged voltage level by electrically connecting the capacitors in parallel between an input voltage node and a ground by activating a plurality of first NMOS transistor switches and a plurality of second NMOS transistor switches and deactivating a plurality of third NMOS transistor switches. The charge pump then generates a series capacitor output voltage level at a capacitor series output node by electrically connecting and discharging the capacitors in series between the input voltage node and the capacitor series output node by activating the third NMOS transistor switches and deactivating the first NMOS transistor switches and the second NMOS transistor switches.
    Type: Application
    Filed: August 11, 2020
    Publication date: February 4, 2021
    Applicant: Silanna Asia Pte Ltd
    Inventors: Joseph H. Colles, Steven E. Rosenbaum, Stuart B. Molin
  • Patent number: 10855270
    Abstract: An improved circuit or method generates first and second initial pulses that do not overlap. First and second drive pulses are generated based on the first and second initial pulses, respectively. A first transistor is turned on with the first drive pulses. A second transistor is turned on with the second drive pulses. A current flows in response to an on-time state of the first transistor overlapping with an on-time state of the second transistor. A delay of the second drive pulses is decreased based on a time of the current flow overlapping with one of the first initial pulses; and the delay of the second drive pulses is increased based on the time of the current flow overlapping with one of the second initial pulses.
    Type: Grant
    Filed: October 14, 2019
    Date of Patent: December 1, 2020
    Assignee: Silanna Asia Pte Ltd
    Inventors: Joseph H. Colles, Steven E. Rosenbaum, Stuart B. Molin
  • Publication number: 20200328734
    Abstract: An improved ramp generator enables a very high degree of linearity in an output voltage ramp signal. Output ramps of the output voltage ramp signal are alternatingly produced from two preliminary ramp signals during alternating time periods. Preliminary ramps are produced at different preliminary ramp nodes that are alternatingly connected to an output node. The preliminary ramps continuously ramp during and in some cases beyond, e.g., before and/or after, the time periods. In some embodiments, switches alternatingly connect two capacitors to at least one current source, a reset voltage source, and the output node to alternatingly produce the preliminary ramps.
    Type: Application
    Filed: April 15, 2019
    Publication date: October 15, 2020
    Applicant: Silanna Asia Pte Ltd
    Inventors: Joseph H. Colles, Steven E. Rosenbaum
  • Publication number: 20200321946
    Abstract: A width of a voltage pulse signal is directly proportional to a difference between first and second resistances in a pulse generator. The voltage pulse signal is generated with a ramp signal, two reference voltages, and two comparators. The first reference voltage is generated with the first resistance and a first current, and the second reference voltage is generated with the second resistance and a second current. The first comparator produces a first comparator output in response to the first reference voltage and the ramp signal, and the second comparator produces a second comparator output in response to the second reference voltage and the ramp signal. A logic circuitry generates the voltage pulse signal in response to the two comparator outputs.
    Type: Application
    Filed: April 4, 2019
    Publication date: October 8, 2020
    Applicant: Silanna Asia Pte Ltd
    Inventors: Joseph H. Colles, Steven E. Rosenbaum, Stuart B. Molin
  • Patent number: 10763746
    Abstract: A charge pump having only NMOS devices charges a plurality of capacitors to a parallel charged voltage level by electrically connecting the capacitors in parallel between an input voltage node and a ground by activating a plurality of first NMOS transistor switches and a plurality of second NMOS transistor switches and deactivating a plurality of third NMOS transistor switches. The charge pump then generates a series capacitor output voltage level at a capacitor series output node by electrically connecting and discharging the capacitors in series between the input voltage node and the capacitor series output node by activating the third NMOS transistor switches and deactivating the first NMOS transistor switches and the second NMOS transistor switches.
    Type: Grant
    Filed: August 1, 2019
    Date of Patent: September 1, 2020
    Assignee: Silanna Asia Pte Ltd
    Inventors: Joseph H. Colles, Steven E. Rosenbaum, Stuart B. Molin
  • Patent number: 9362882
    Abstract: Apparatus and methods for segmented variable capacitor arrays are provided herein. In certain configurations, a segmented variable capacitor array includes a plurality of variable capacitor cells that are segmented into most significant bit (MSB) cells and least significant bit (LSB) cells, which are electrically connected in parallel between a radio frequency (RF) input and an RF output of the array. The segmented variable capacitor array further includes an MSB decoder for generating MSB control signals for controlling the capacitance of the MSB cells based on a first portion of a control signal's bits, and an LSB decoder for generating LSB control signals for controlling the capacitance of the LSB cells based on a second portion of the control signal's bits. The segmented variable capacitor array is segmented such that each of the MSB cells has a greater nominal capacitance than each of the LSB cells.
    Type: Grant
    Filed: January 23, 2015
    Date of Patent: June 7, 2016
    Assignee: TDK Corporation
    Inventors: Anuj Madan, Joseph H. Colles
  • Patent number: 8351880
    Abstract: Embodiments of the present disclosure relate to an radio frequency (RF) power amplifier (PA) module having a saturation corrected integration loop, which includes saturation detection and correction circuitry, an integrator, PA circuitry, and detector circuitry. An integrator output signal from the integrator is prevented from being driven toward a power supply rail in the presence of saturation of the PA circuitry by saturation correction of an input ramp signal. The saturation detection and correction circuitry receives and saturation corrects the input ramp signal to provide a saturation corrected input ramp signal to the integrator based on detecting saturation of the PA circuitry. Saturation of the PA circuitry is detected based on a difference between a desired PA output voltage, as indicated by the input ramp signal, and a detected PA output voltage, as indicated by a detector output signal from the detector circuitry.
    Type: Grant
    Filed: July 22, 2010
    Date of Patent: January 8, 2013
    Assignee: RF Micro Devices, Inc.
    Inventors: Alexander W. Hietala, Joseph H. Colles
  • Patent number: 8005443
    Abstract: The present invention is design for testability (DFT) circuitry used with RF transmitter circuitry to enable RF parameter adjustments, which provide compliance with requirements, to configure the RF transmitter circuitry for a particular application or range of applications, and to permanently store adjustment information, configuration information, or both, in non-volatile memory. The DFT circuitry and the RF transmitter circuitry may be used to form a standard RF module, which can be provided to a number of customers for use in a number of applications. The standard RF module may be adjusted, configured, or both during manufacturing, which may eliminate calibrations, adjustments, or configurations by customers.
    Type: Grant
    Filed: July 9, 2007
    Date of Patent: August 23, 2011
    Assignee: RF Micro Devices, Inc.
    Inventors: Chis Levesque, Joseph H. Colles
  • Patent number: 7928712
    Abstract: The present invention is a switching power supply that switches (dithers) between at least two switching frequencies without introducing a ripple signal at the dithering frequency, which is based on the time duration of a dithering cycle. In one embodiment of the present invention, an average current in an energy transfer element, such as an inductive element, during operation using one switching frequency is regulated to be approximately equal to the average current during operation using any other switching frequency. The average current may be regulated by controlling the durations of transition periods between operating using one switching frequency and operating using another switching frequency. By maintaining a constant average current while operating using different switching frequencies, dithering frequency ripple may be significantly reduced or eliminated.
    Type: Grant
    Filed: June 1, 2007
    Date of Patent: April 19, 2011
    Assignee: RF Micro Devices, Inc.
    Inventors: Chris Levesque, Joseph H. Colles, Jean-Christophe Berchtold
  • Patent number: 7072698
    Abstract: A system for wireless communications is provided. The system includes a hand-held wireless communications device, such as a cell phone. An antenna is connected to the cell phone. The antenna radiates radio waves over an area of less than 360 degrees of arc, such as in a cardioid or hemisphere. The antenna is oriented such that hemisphere is in the direction away from a head of a user of the cell phone.
    Type: Grant
    Filed: September 13, 1999
    Date of Patent: July 4, 2006
    Assignee: Skyworks Solutions, Inc.
    Inventors: Paul A. Underbrink, Kelly H. Hale, Guang-Ming Yin, Patrick D. Ryan, Joseph H. Colles, Daryush Shamlou, Christian Levesque
  • Patent number: 6980772
    Abstract: A system for wireless communications is provided. The system includes a hand-held wireless communications device, such as a cell phone. An antenna is connected to the cell phone. The antenna radiates radio waves over an area of less than 360 degrees of arc, such as in a cardioid or hemisphere. The antenna is oriented such that hemisphere is in the direction away from a head of a user of the cell phone.
    Type: Grant
    Filed: March 29, 2001
    Date of Patent: December 27, 2005
    Assignee: Conexant Systems, Inc.
    Inventors: Paul A. Underbrink, Kelly H. Hale, Guang-Ming Yin, Patrick D. Ryan, Joseph H. Colles, Daryush Shamlou, Christian Levesque
  • Patent number: 6933876
    Abstract: A cell phone is provided that may be used with multiple radio formats, such as GSM and CDMA. The cell phone includes a receiver that receives radio signals and converts them into electrical signals. An analog to digital converter is connected to the receiver and converts an analog input to a digital output having an adjustable number of bits at an adjustable sampling frequency. A cell phone application specific integrated circuit is connected to the analog to digital converter, which is used to process the digital output to extract encoded telecommunications data in one of the supported radio formats.
    Type: Grant
    Filed: March 22, 2002
    Date of Patent: August 23, 2005
    Assignee: Skyworks Solutions, Inc.
    Inventors: Paul A. Underbrink, Kelly H. Hale, Guang-Ming Yin, Patrick D. Ryan, Joseph H. Colles, Daryush Shamlou
  • Patent number: 6754287
    Abstract: Communications systems, and particularly portable personal communications systems, such as portable phones, are becoming increasingly digital. One area that has remained largely analog, however, is the modulation and RF amplifier circuits. To produce a RF frequency waveform. An output of a class D amplifier is coupled to an integrator to create an analog signal. A resonant circuit shapes an output waveform based on the analog signal to create a sinusoidal RF broadcast signal. The waveform of the class D amplifier may be duty cycle modulated. Digital modulation may occur using a digital sigma delta modulator or a digital programmable divide modulator. Using the digital modulation techniques and class D amplification techniques together allows for broadcast a PSK signal that has been decomposed into amplitude and phase components.
    Type: Grant
    Filed: March 21, 2001
    Date of Patent: June 22, 2004
    Assignee: Skyworks Solutions, Inc.
    Inventors: Paul A. Underbrink, Daryush Shamlou, Ricke W. Clark, Joseph H. Colles, Guangming Yin, Patrick D. Ryan, Kelly H. Hale
  • Patent number: 6651021
    Abstract: The invention discloses a system for improving performance of the RF amplification stage of communication receivers by accounting for the signal environment of the RF amplifier. The linearity, gain and power supply voltage of the RF amplification stage of the communication receiver is adjusted to produce an optimal signal into the succeeding narrow-band amplification stage(s). The adjustment of the RF stage includes mechanisms such as adjusting the RF amplifier power supply level using a DC to DC converter. It also includes allowing distortion in the RF amplification stage if the distortion in the RF amplification stage does not affect the target signal. For example, if there were a strong signal that fell within the same band as the target signal, amplification would be allowed to be so high that it distorted the undesired signals, but not the tined signals.
    Type: Grant
    Filed: June 15, 2001
    Date of Patent: November 18, 2003
    Assignee: Skyworks Solutions, Inc.
    Inventors: Paul A. Underbrink, Daryush Shamlou, Ricke W. Clark, Joseph H. Colles, Guangming Yin, Patrick D. Ryan, Kelly H. Hale
  • Patent number: 6535735
    Abstract: Modern digital integrated circuits are commonly synchronized in their workings by clock circuits. The clock frequency for a circuit must take into account the propagation delay of signals within the critical path of the circuit. If the clock time is not adequate to allow propagation of signals through the critical path, improper circuit operation may result. The propagation delay is not a constant from circuit to circuit, and even in a single circuit may change due to temperature, power supply voltage and the like. Commonly, this variation is handled by assuming a worse case propagation delay of the critical path, and then designing the clock frequency and minimum power supply voltage of the circuit so that the circuit will function under worst case conditions.
    Type: Grant
    Filed: March 22, 2001
    Date of Patent: March 18, 2003
    Assignee: Skyworks Solutions, Inc.
    Inventors: Paul A. Underbrink, Daryush Shamlou, Ricke W. Clark, Joseph H. Colles, Guangming Yin, Patrick D. Ryan, Kelly H. Hale
  • Patent number: 6532370
    Abstract: A cell phone is provided that may be used with multiple radio formats, such as GSM and CDMA. The cell phone includes a receiver that receives radio signals and converts them into electrical signals. An analog to digital converter is connected to the receiver and converts an analog input to a digital output having an adjustable number of bits at an adjustable sampling frequency. A cell phone application specific integrated circuit is connected to the analog to digital converter, which is used to process the digital output to extract encoded telecommunications data in one of the supported radio formats.
    Type: Grant
    Filed: September 30, 1999
    Date of Patent: March 11, 2003
    Assignee: Skyworks Solutions, Inc.
    Inventors: Paul A. Underbrink, Kelly H. Hale, Guang-Ming Yin, Patrick D. Ryan, Joseph H. Colles, Daryush Shamlou
  • Publication number: 20020193958
    Abstract: The invention discloses a system for improving performance of the RF amplification stage of communication receivers by accounting for the signal environment of the RF amplifier. The linearity, gain and power supply voltage of the RF amplification stage of the communication receiver is adjusted to produce an optimal signal into the succeeding narrow-band amplification stage(s). The adjustment of the RF stage includes mechanisms such as adjusting the RF amplifier power supply level using a DC to DC converter. It also includes allowing distortion in the RF amplification stage if the distortion in the RF amplification stage does not affect the target signal. For example, if there were a strong signal that fell within the same band as the target signal, amplification would be allowed to be so high that it distorted the undesired signals, but not the tined signals.
    Type: Application
    Filed: June 15, 2001
    Publication date: December 19, 2002
    Inventors: Paul A. Underbrink, Daryush Shamlou, Ricke W. Clark, Joseph H. Colles, Guangming Yin, Patrick D. Ryan, Kelly H. Hale
  • Publication number: 20020136326
    Abstract: Communications systems, and particularly portable personal communications systems, such as portable phones, are becoming increasingly digital. The tendency towards digital systems has come about, in part, because digital systems may operate on less power than their analog counterparts. One area that has remained largely analog, however, is the modulation and RF amplifier circuits. To produce a RF frequency waveform a class D switching type amplifier is used. The output of the class D amplifier is coupled to an integrator, to create an analog signal. The analog signal coupled to a resonant circuit, to shape the output waveform into a sinusoidal RF broadcast signal. The waveform of the class D amplifier is duty cycle modulated by a combination signal representing the combination of desired amplitude modulation of the broadcast signal and the desired average power level desired.
    Type: Application
    Filed: March 21, 2001
    Publication date: September 26, 2002
    Inventors: Paul A. Underbrink, Daryush Shamlou, Ricke W. Clark, Joseph H. Colles, Guangming Yin, Patrick D. Ryan, Kelly H. Hale
  • Publication number: 20020135343
    Abstract: Modern digital integrated circuits are commonly synchronized in their workings by clock circuits. The clock frequency for a circuit must take into account the propagation delay of signals within the critical path of the circuit. If the clock time is not adequate to allow propagation of signals through the critical path, improper circuit operation may result. The propagation delay is not a constant from circuit to circuit, and even in a single circuit may change due to temperature, power supply voltage and the like. Commonly, this variation is handled by assuming a worse case propagation delay of the critical path, and then designing the clock frequency and minimum power supply voltage of the circuit so that the circuit will function under worst case conditions.
    Type: Application
    Filed: March 22, 2001
    Publication date: September 26, 2002
    Inventors: Paul A. Underbrink, Daryush Shamlou, Ricke W. Clark, Joseph H. Colles, Guangming Yin, Patrick D. Ryan, Kelly H. Hale
  • Publication number: 20020058539
    Abstract: A system for wireless communications is provided. The system includes a hand-held wireless communications device, such as a cell phone. An antenna is connected to the cell phone. The antenna radiates radio waves over an area of less than 360 degrees of arc, such as in a cardioid or hemisphere. The antenna is oriented such that hemisphere is in the direction away from a head of a user of the cell phone.
    Type: Application
    Filed: September 13, 1999
    Publication date: May 16, 2002
    Inventors: PAUL A. UNDERBRINK, KELLY H. HALE, GUANG-MING YIN, PATRICK D. RYAN, JOSEPH H. COLLES, DARYUSH SHAMLOU, CHRISTIAN LEVESQUE