Abstract: A ferroelectric capacitor structure is designed for fabrication together with MOS devices on a semiconductor substrate. The ferroelectric capacitor includes a diffusion barrier layer above the surface of the substrate for preventing the materials of the ferroelectric capcacitor from contaminating the substrate or MOS devices. The ferroelectric capacitor comprises a bottom electrode, a thin film ferroelectric layer and a top electrode. An interlayer dielectric is formed to cover portions of the ferroelectric thin film and provide an opening therethrough for the top electrode. A ferroelectric memory cell comprises a field effect transistor together with a ferroelectric capacitor fabricated on a semiconductor substrate. In one configuration, the ferroelectric capacitor is offset from the field effect transistor, while in another configuration, the ferroelectric capacitor is substantially above the field effect transistor to provide greater density.

Abstract: A method to produce thin films suitable for fabricating ferroelectric thin films. The method provides for selection of the predetermined amounts of lead, lanthanum, zirconium, and titanium precursors which are soluble in different solvents. Dissolving predetermined amounts of the precursors in their respective solvents in proportions such that hydrolyze reaction rate for each metal precursor will be approximately equal. The precursors and solvents are mixed, and water is added to begin a hydrolysis reaction. After the hydrolysis the solution is heated to drive off the excess water and solvent to promote the formation of a sol-gel. The sol-gel is then applied to a thin substrate and sintered to produce the ferroelectric film.

Abstract: A method to produce thin films suitable for fabricating ferroelectric thin films. The method provides for selection of the predetermined amounts of lead, lanthanum, zirconium, and titanium precursors which are soluble in different solvents. Dissolving predetermined amounts of the precursors in their respective solvents in proportions such that hydrolyze reaction rate for each metal precursor will be approximately equal. The precursors and solvents are mixed, and water is added to begin a hydrolysis reaction. After the hydrolysis the solution is heated to drive off the excess water and solvent to promote the formation of a sol-gel. The sol-gel is then applied to a thin substrate and sintered to produce the ferroelectric film.

Abstract: A digital phase meter to measure the phase difference between an input signal and a reference signal and output this phase information in the form of an eight bit number. The input signal and the reference signal, which are sinusoidal, are conditioned to a more defined leading edge by a high speed differential voltage comparator and a dual/differential line receiver. A series of uniquely configured D flip-flops are used to detect the leading edge of both the signal input and the reference input. An AND gate then acts as a switch that is activated on the leading edge of the signal input. The time interval between the two positive leading edges of the input signal and reference signal specifies the phase difference. The AND gate is in the high state for this duration. The phase difference is converted into an 8-bit binary number via two 4-bit cascaded counters. The high output of the AND gate is used to enable the counters for the duration of the phase difference.