Patents by Inventor Ju Yang

Ju Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • BOUNDARY CELL
    Publication number: 20210342513
    Abstract: Boundary cells may be provided. A boundary of a first functional cell of a circuit is determined. A first plurality of a first type of dummy cells are placed along a first portion of the determined boundary. The first portion extends in a first direction. Each of the first type of dummy cells comprises first pre-defined dimensions. A second plurality of a second type of dummy cells are placed along a second portion of the determined boundary. The second portion extends in a second direction. Each of the second type of dummy cells comprises second pre-defined dimensions. The second pre-defined dimensions is different than the first pre-defined dimensions.
    Type: Application
    Filed: July 12, 2021
    Publication date: November 4, 2021
    Inventors: Yu-Jung Chang, Min-Yuan Tsai, Wen-Ju Yang
  • Substituted anilines as CCR(4) antagonists
    Patent number: 11142521
    Abstract: Aniline compounds are provided which bind to CCR(4) and are useful for the treatment of diseases such as allergic diseases, autoimmune diseases, graft rejection and cancer.
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: October 12, 2021
    Assignee: ChemoCentryx, Inc.
    Inventors: Trevor T. Charvat, Junfa Fan, Christopher W. Lange, Manmohan Reddy Leleti, Yandong Li, Venkat Reddy Mali, Jeffrey P. McMahon, Jay Powers, Sreenivas Punna, Ju Yang
  • Integrated circuit and system of manufacturing the same
    Patent number: 11138361
    Abstract: An integrated circuit includes a first and second set of gate structures. A center of each of the first set of gate structures is separated from a center of an adjacent gate of the first set of gate structures in a first direction by a first pitch. A center of each of the second set of gate structures is separated from a center of an adjacent gate of the second set of gate structures in the first direction by the first pitch. The first and second set of gate structures extend in a second direction. A gate of the first set of gate structures is aligned in the second direction with a corresponding gate of the second set of gate structures. The gate of the first set of gate structures is separated from the corresponding gate of second set of gate structures in the second direction by a first distance.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: October 5, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Jung Chang, Chin-Chang Hsu, Hsien-Hsin Sean Lee, Wen-Ju Yang
  • Indane-amines as PD-L1 antagonists
    Patent number: 11135210
    Abstract: Compounds are provided that are useful as immunomodulators. The compounds have the Formula (I) including stereoisomers and pharmaceutically acceptable salts thereof, wherein R1, R2a, R2b, R2c, R3, R4, R5, R6a, R6b, m and n are as defined herein. Methods associated with preparation and use of such compounds, as well as pharmaceutical compositions comprising such compounds, are also disclosed.
    Type: Grant
    Filed: January 14, 2020
    Date of Patent: October 5, 2021
    Assignee: ChemoCentryx, Inc.
    Inventors: Christopher Lange, Sreenivas Punna, Rajinder Singh, Ju Yang, Penglie Zhang
  • DIAGNOSTIC METHOD FOR SYSTEMIC LUPUS ERYTHEMATOSUS USING SMYD3 AUTOANTIBODY
    Publication number: 20210302420
    Abstract: A method of diagnosing systemic lupus erythematosus using an antigen protein that binds specifically to an SMYD3 autoantibody present in body fluid of a patient with systemic lupus erythematosus. The diagnostic method uses a non-invasive biological sample such as blood, and thus may diagnose systemic lupus erythematosus very conveniently without burdening the patient, unlike conventional methods. In addition, the method has high specificity and sensitivity, and thus may be effectively used for early diagnosis of systemic lupus erythematosus.
    Type: Application
    Filed: May 8, 2019
    Publication date: September 30, 2021
    Applicant: AJOU UNIVERSITY INDUSTRY-ACADMIC COOPERATION FOUNDATION
    Inventors: Chang Hee SUH, Ho Chul KANG, JU Yang JUNG, Wook Young BAEK, Jee Min CHUNG, Sangwon LEE
  • C5AR ANTAGONISTS
    Publication number: 20210269398
    Abstract: Compounds are provided that are modulators of the C5a receptor. The compounds are substituted piperidines and are useful in pharmaceutical compositions, methods for the treatment of diseases and disorders involving the pathologic activation of C5a receptors.
    Type: Application
    Filed: October 20, 2020
    Publication date: September 2, 2021
    Inventors: Pingchen Fan, Kevin Lloyd Greenman, Manmohan Reddy Leleti, Yandong Li, Jay Powers, Hiroko Tanaka, Ju Yang, Yibin Zeng
  • TECHNIQUES TO INHIBIT DELAMINATION FROM FLOWABLE GAP-FILL DIELECTRIC
    Publication number: 20210272896
    Abstract: An interfacial layer is provided that binds a hydrophilic interlayer dielectric to a hydrophobic gap-filling dielectric. The hydrophobic gap-filling dielectric extends over and fill gaps between devices in an array of devices disposed between two metal interconnect layers over a semiconductor substrate and is the product of a flowable CVD process. The interfacial layer provides a hydrophilic upper surface to which the interlayer dielectric adheres. Optionally, the interfacial layer is also the product of a flowable CVD process. Alternatively, the interfacial layer may be silicon nitride or another dielectric that is hydrophilic. The interfacial layer may have a wafer contact angle (WCA) intermediate between a WCA of the hydrophobic dielectric and a WCA of the interlayer dielectric.
    Type: Application
    Filed: October 23, 2020
    Publication date: September 2, 2021
    Inventors: Hsing-Lien Lin, Chin-Wei Liang, Hsun-Chung Kuang, Ching Ju Yang
  • PACKAGE STRUCTURE
    Publication number: 20210273403
    Abstract: A package structure includes: a substrate includes a first surface; a semiconductor chip disposed on the first surface; a support disposed on the first surface and surrounding the semiconductor chip comprises an electrical conducting member and penetrating the support; and an optical component disposed on the support and electrically connected to the substrate by the electrical conducting member.
    Type: Application
    Filed: March 2, 2021
    Publication date: September 2, 2021
    Inventors: Hsiu-Ju YANG, Shou-Lung CHEN, Hsin-Chan CHUNG
  • Standard cell and semiconductor device including anchor nodes and method of making
    Patent number: 11106852
    Abstract: A semiconductor device includes a first cell. The first cell includes a first functional feature, a first sensitivity region, at least one anchor node, wherein each of the at least one anchor node is different from the first functional feature, and a number of anchor nodes of the at least one anchor node linked to the first functional feature is based on a position of the first functional feature relative to the first sensitivity region. The semiconductor device further includes a second cell abutting the first cell. The second cell includes a second functional feature, wherein the second functional feature satisfies a minimum spacing requirement with respect to the first functional feature.
    Type: Grant
    Filed: June 16, 2020
    Date of Patent: August 31, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Nien-Yu Tsai, Chin-Chang Hsu, Hsien-Hsin Sean Lee, Wen-Ju Yang
  • Integrated Circuit Layout Validation Using Machine Learning
    Publication number: 20210240906
    Abstract: Systems, methods, and devices are described herein for integrated circuit (IC) layout validation. A plurality of IC patterns are collected which include a first set of patterns capable of being manufactured and a second set of patterns incapable of being manufactured. A machine learning model is trained using the plurality of IC patterns. The machine learning model generates a prediction model for validating IC layouts. The prediction model receives data including a set of test patterns comprising scanning electron microscope (SEM) images of IC patterns. Design violations associated with an IC layout are determined based on the SEM images and the plurality of IC patterns. A summary of the design violations is provided for further characterization of the IC layout.
    Type: Application
    Filed: April 19, 2021
    Publication date: August 5, 2021
    Inventors: Rachid Salik, Chin-Chang Hsu, Cheng-Chi Wu, Chien-Wen Chen, Wen-Ju Yang
  • Boundary cell
    Patent number: 11062074
    Abstract: Boundary cells may be provided. A boundary of a first functional cell of a circuit is determined. A first plurality of a first type of dummy cells are placed along a first portion of the determined boundary. The first portion extends in a first direction. Each of the first type of dummy cells comprises first pre-defined dimensions. A second plurality of a second type of dummy cells are placed along a second portion of the determined boundary. The second portion extends in a second direction. Each of the second type of dummy cells comprises second pre-defined dimensions. The second pre-defined dimensions is different than the first pre-defined dimensions.
    Type: Grant
    Filed: September 20, 2019
    Date of Patent: July 13, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Jung Chang, Min-Yuan Tsai, Wen-Ju Yang
  • Integrated circuit and method for manufacturing same
    Patent number: 11062075
    Abstract: A method of manufacturing an integrated circuit includes generating a layout design of the integrated circuit, manufacturing the integrated circuit based on the layout design, and removing a portion of a gate structure of a set of gate structures thereby forming a first and a second gate structure. Generating the layout design includes placing a set of gate layout patterns and a cut feature layout pattern on the first layout level. The cut feature layout pattern extends in a first direction, overlaps the set of gate layout patterns and identifies a location of the portion of the gate structure of the set of gate structures. The set of gate layout patterns correspond to fabricating a set of gate structures. The set of gate layout patterns extending in a second direction and overlapping a set of gridlines that extend in the second direction.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: July 13, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Jung Chang, Chin-Chang Hsu, Hsien-Hsin Sean Lee, Wen-Ju Yang
  • Inhibitors of CXCR2
    Patent number: 11040960
    Abstract: Compounds are provided as inhibitors of CXCR2, having the structure:
    Type: Grant
    Filed: June 12, 2019
    Date of Patent: June 22, 2021
    Assignee: ChemoCentryx, Inc.
    Inventors: Xi Chen, Dean R. Dragoli, Junfa Fan, Jaroslaw Kalisiak, Manmohan Reddy Leleti, Viengkham Malathong, Jeffrey McMahon, Hiroko Tanaka, Ju Yang, Chao Yu, Penglie Zhang, Venkat Mali
  • TRANSITION METAL COMPOUND FOR OLEFIN POLYMERIZATION CATALYST, OLEFIN POLYMERIZATION CATALYST COMPRISING SAME AND POLYOLEFIN POLYMERIZED USING SAME
    Publication number: 20210171559
    Abstract: Provided is a transition metal compound, represented by chemical formula 1, for an olefin polymerization catalyst. The details of chemical formula 1 are the same as those defined in the specification.
    Type: Application
    Filed: November 2, 2018
    Publication date: June 10, 2021
    Inventors: Hyun Seung Lee, Seong Yeon Park, Hee Ju Yang, Na Young Park, Wook Jeong
  • IMMUNOMODULATOR COMPOUNDS
    Publication number: 20210147356
    Abstract: Compounds are provided that are useful as immunomodulators. The compounds have the following Formula (I): including stereoisomers and pharmaceutically acceptable salts thereof, wherein Z, L, R1a, R1b, R1c, R1d, R2a, R2b, R2c, R3, R4, R5, R6a, R6b, m and n are as defined herein. Methods associated with preparation and use of such compounds, as well as pharmaceutical compositions comprising such compounds, are also disclosed.
    Type: Application
    Filed: November 30, 2020
    Publication date: May 20, 2021
    Inventors: Christopher LANGE, Viengkham MALATHONG, Venkat Reddy MALI, Jeffrey McMAHON, Darren J. McMURTRIE, Sreenivas PUNNA, Howard S. ROTH, Rajinder SINGH, Yu WANG, Ju YANG, Penglie ZHANG
  • Integrated circuit layout validation using machine learning
    Patent number: 11010529
    Abstract: Systems, methods, and devices are described herein for integrated circuit (IC) layout validation. A plurality of IC patterns are collected which include a first set of patterns capable of being manufactured and a second set of patterns incapable of being manufactured. A machine learning model is trained using the plurality of IC patterns. The machine learning model generates a prediction model for validating IC layouts. The prediction model receives data including a set of test patterns comprising scanning electron microscope (SEM) images of IC patterns. Design violations associated with an IC layout are determined based on the SEM images and the plurality of IC patterns. A summary of the design violations is provided for further characterization of the IC layout.
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: May 18, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Rachid Salik, Chin-Chang Hsu, Cheng-Chi Wu, Chien-Wen Chen, Wen-Ju Yang
  • SALT FORMS OF A COMPLEMENT COMPONENT C5A RECEPTOR
    Publication number: 20210139427
    Abstract: Provided herein are salt forms of a complement component 5a receptor having the formula of Compound 1 Also provided herein are pharmaceutical compositions and methods of treatment using the salt forms of Compound 1, described herein.
    Type: Application
    Filed: November 6, 2020
    Publication date: May 13, 2021
    Inventors: Rajinder SINGH, Kwok YAU, Yibin ZENG, Penglie ZHANG, Rebecca M. LUI, Ju YANG, Howard S. ROTH
  • DISPLAY DEVICE
    Publication number: 20210132448
    Abstract: A display device comprises a first substrate, a second substrate disposed opposite to the first substrate, a scan line disposed between the first substrate and the second substrate, and a spacer disposed between the scan line and the second substrate. The spacer overlaps the scan line.
    Type: Application
    Filed: January 14, 2021
    Publication date: May 6, 2021
    Inventors: Chi-Hsuan Nieh, Yu-Chien Kao, Po-Ju Yang, Shih-I Huang
  • HETEROARYL-BIPHENYL AMINES FOR THE TREATMENT OF PD-L1 DISEASES
    Publication number: 20210130347
    Abstract: Compounds are provided that are useful as immunomodulators. The compounds have the Formula (I) including stereoisomers and pharmaceutically acceptable salts thereof, wherein R2a, R2b, R3, R3a, R4, R6, R7, R8, A, Z, X1 and n are as defined herein. Methods associated with preparation and use of such compounds, as well as pharmaceutical compositions comprising such compounds, are also disclosed.
    Type: Application
    Filed: October 15, 2020
    Publication date: May 6, 2021
    Inventors: Pingchen FAN, Christopher W. LANGE, Rebecca M. LUI, Darren J. McMURTRIE, Ryan J. SCAMP, Ju YANG, Yibin ZENG, Penglie ZHANG
  • SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME
    Publication number: 20210135102
    Abstract: A semiconductor memory structure includes a memory cell, an encapsulation layer over a sidewall of the memory cell, and a nucleation layer between the sidewall of the memory cell and the encapsulation layer. The memory cell includes a top electrode, a bottom electrode and a data-storage element sandwiched between the bottom electrode and the top electrode. The nucleation layer includes metal oxide.
    Type: Application
    Filed: April 9, 2020
    Publication date: May 6, 2021
    Inventors: HSING-LIEN LIN, FU-TING SUNG, CHING JU YANG, CHII-MING WU