Abstract: A method of forming a semiconductor device may include forming a first conductive metal compound layer on a substrate using a metal organic chemical vapor deposition (MOCVD) process and/or forming a second conductive metal compound layer on the first conductive metal compound layer using a physical vapor deposition (PVD) process. The first and second conductive metal compound layers may be formed while reducing or preventing the exposure of the first conductive metal compound layer to oxygen atoms, thus reducing degradation of the first conductive metal compound layer.

Abstract: Example embodiments relate to an apparatus and method for manufacturing a semiconductor device. Other example embodiments relate to a plasma processing apparatus having an in-situ cleaning function and a method of using the same. The plasma processing apparatus may include an outer chamber, an inner chamber installed in the outer chamber, a gas supply unit for supplying a process gas or a cleaning gas into the inner chamber, an electrode positioned in the inner chamber, an electrode plasma power supply for applying power to the electrode, a first flexible member connecting the inner chamber and the outer chamber and having a first connector therein electrically connected to the inner chamber and/or a first chamber plasma power supply connected to the first connector and applying power to the inner chamber through the first connector.

Abstract: Provided is a method of forming a metal layer using metal-organic chemical vapor deposition (MOCVD). The method includes using MOCVD to form on a dielectric layer a metal layer having a first thickness, performing a first plasma process on the metal layer, using the MOCVD process to form a metal layer having a second thickness on the metal layer having the first thickness and performing a second plasma process on the metal layer having the second thickness, wherein the second plasma process has an energy level greater than the energy level of the first plasma process.

Abstract: CMOS semiconductor devices having dual work function metal gate structures that are formed using fabrication techniques that enable independent work function control for PMOS and NMOS device and which significantly reduce or otherwise eliminate impact on gate dielectric reliability.

Abstract: An apparatus for treating plasma includes an inner chamber, an outer chamber receiving the inner chamber and including a gas supplier that supplies a gas into the inner chamber, an inner electrode disposed in the inner chamber, and a plasma generator supplying power independently to the inner electrode and the inner chamber.

Abstract: There is provided a method of forming a semiconductor device. A dielectric layer including a metal (e.g., a gate insulating layer and/or a tunnel insulating layer) may be formed on a substrate, and a metal nitride layer containing more metal component than nitrogen may be formed on the dielectric layer by PEALD. The metal nitride layer may be formed by alternately supplying a metal source including the metal and an NH3 gas, and providing plasma during a supplying of the NH3 gas. Because a material included in the dielectric layer and that included in the electrode formed thereon react with each other by a high temperature process, characteristics of the semiconductor device may be reduced or prevented from being degraded.

Abstract: Integrated circuit devices including metal-insulator-metal (MIM) capacitors are provided. The MIM capacitors may include an upper electrode having first and second layers. The first layer of the upper electrode includes a physical vapor deposition (PVD) upper electrode and the second layer of the upper electrode includes an ionized PVD (IPVD) upper electrode on the PVD upper electrode. Related methods are also provided.