Abstract: A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.

Abstract: A semiconductor device includes at least one first gate structure and at least one second gate structure on a semiconductor substrate. The at least one first gate structure has a flat upper surface extending in a first direction and a first width in a second direction perpendicular to the first direction. The at least one second gate structure has a convex upper surface extending in the first direction and a second width in the second direction, the second width being greater than the first width.

Abstract: A semiconductor device includes a substrate including a first region and a second region, a first fin-type pattern in the first region, a second fin-type pattern in the second region, a first gate structure intersecting the first fin-type pattern, the first gate structure including a first gate spacer, a second gate structure intersecting the second fin-type pattern, the second gate structure including a second gate spacer, a first epitaxial pattern formed on opposite sides of the first gate structure, on the first fin-type pattern, the first epitaxial pattern having a first impurity, a second epitaxial pattern formed on opposite sides of the second gate structure, on the second fin-type pattern, the second epitaxial pattern having a second impurity, a first silicon nitride film extending along a sidewall of the first gate spacer, and a first silicon oxide film extending along a sidewall of the first gate spacer.

Abstract: A semiconductor device includes a fin protruding from a substrate and extending in a first direction, first and second gate structures intersecting the fin, a recess formed in the fin between the first and second gate structures, a device isolation layer which fills the recess, and which has an upper surface protruded outwardly from the fin and disposed to be coplanar with upper surfaces of the first and second gate structures, a liner formed along a side walls of the device isolation layer protruded outwardly from the fin and a source/drain region disposed at both sides of the recess and spaced apart from the device isolation layer.

Abstract: A semiconductor device includes: a semiconductor substrate including an active region and a gate structure on the active region. The gate structure includes a gate insulating film; a work function adjusting film on the first gate insulating film; a separation film on the work function adjusting film; and an oxygen capturing film on the separation film and configured to capture oxygen introduced from the outside of the first gate structure. The oxygen capturing film is spaced apart from a top surface of the first gate insulating film by about 70 ? to about 80 ?.

Abstract: Semiconductor devices are provided. The semiconductor device includes a first fin portion and a second fin portion arranged on a substrate and extended in a first direction, the first fin portion and the second fin portion being spaced apart from each other in the first direction, a field insulating layer between the first fin portion and the second fin portion and having an upper surface thereof lower than an upper surface of the first fin portion, a first metal gate extended in a second direction on the first fin portion and a silicon gate extended in the second direction on the field insulating layer and contacting the field insulating layer.

Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming an insulation film including a trench on a substrate, forming a first metal gate film pattern along side and bottom surfaces of the trench, forming a second metal gate film on the first metal gate film pattern and the insulation film, and forming a second metal gate film pattern positioned on the first metal gate film pattern by removing the second metal gate film to expose at least a portion of the insulation film and forming a blocking layer pattern on the second metal gate film pattern by oxidizing an exposed surface of the second metal gate film pattern.

Abstract: A semiconductor device may include a first gate electrode being formed on a substrate and having a first ratio of a width of an upper surface to a width of a lower surface, a second gate electrode being formed on the substrate and having a second ratio of the width of the upper surface to the width of the lower surface, wherein the second ratio is less than the first ratio, a first gate spacer being formed on a sidewall of the first gate electrode, a second gate spacer being formed on a sidewall of the second gate electrode and an interlayer insulating film covering the first gate spacer and the second gate spacer.

Abstract: Methods of forming semiconductor devices are provided. A method of forming a semiconductor device includes forming first and second dielectric layers in first and second trenches. The method includes forming first and second conductive layers on the first and second dielectric layers, respectively. The method includes forming first and second protective layers on the first and second conductive layers, respectively. The method includes performing an annealing process while the first and second protective layers are on the first and second conductive layers. The method includes removing the first and second protective layers. The method includes removing the first conductive layer, after performing the annealing process. Moreover, the method includes forming first and second gate metals in the first and second trenches, respectively, after removing the first conductive layer.

Abstract: Provided are semiconductor devices and fabricating methods thereof. The semiconductor device includes a field insulating layer formed in a substrate, an interlayer dielectric layer formed on the field insulating layer and including a trench exposing at least a portion of the field insulating layer, a deposition insulating layer formed in the trench to be disposed on the field insulating layer, a gate insulating layer formed the trench to be disposed on the deposition insulating layer, and a metal gate formed the trench on the gate insulating layer.

Abstract: A semiconductor device includes an interlayer insulating film formed on a substrate and including a trench, a gate insulating film formed in the trench, a work function adjusting film formed on the gate insulating film in the trench along sidewalls and a bottom surface of the trench, and including an inclined surface having an acute angle with respect to the sidewalls of the trench, and a metal gate pattern formed on the work function adjusting film in the trench to fill up the trench.

Abstract: A semiconductor device includes at least one first gate structure and at least one second gate structure on a semiconductor substrate. The at least one first gate structure has a flat upper surface extending in a first direction and a first width in a second direction perpendicular to the first direction. The at least one second gate structure has a convex upper surface extending in the first direction and a second width in the second direction, the second width being greater than the first width.

Abstract: A semiconductor device includes a fin protruding from a substrate and extending in a first direction, first and second gate structures intersecting the fin, a recess formed in the fin between the first and second gate structures, a device isolation layer which fills the recess, and which has an upper surface protruded outwardly from the fin and disposed to be coplanar with upper surfaces of the first and second gate structures, a liner formed along a side walls of the device isolation layer protruded outwardly from the fin and a source/drain region disposed at both sides of the recess and spaced apart from the device isolation layer.

Abstract: A semiconductor device includes first through fourth areas, first through fourth gate stacks, the first gate stack includes a first high-dielectric layer, a first TiN layer to contact the first high-dielectric layer, and a first gate metal on the first TiN layer, the second gate stack includes a second high-dielectric layer, a second TiN layer to contact the second high-dielectric layer, and a second gate metal on the second TiN layer, the third gate stack includes a third high-dielectric layer, a third TiN layer to contact the third high-dielectric layer, and a third gate metal on the third TiN layer, and the fourth gate stack includes a fourth high-dielectric layer, a fourth TiN layer to contact the fourth high-dielectric layer, and a fourth gate metal on the fourth TiN layer, the first through fourth thicknesses of the TiN layers being different.

Abstract: A method of manufacturing a semiconductor device comprises forming an interlayer insulating film on a semiconductor substrate, the interlayer insulating film including a trench, forming a work function metal layer in the trench, forming an insulating film on the work function metal layer, forming a sacrificial film on the insulating film and filling the trench, forming a sacrificial film pattern with a top surface disposed in the trench by etching the sacrificial film, forming an insulating film pattern by selectively etching a portion of the insulating film which is formed higher than the sacrificial film pattern, and forming a work function metal pattern with a top surface disposed in the trench by selectively etching a portion of the work function metal layer which is formed higher than the insulating film pattern.

Abstract: Methods of forming semiconductor devices are provided. A method of forming a semiconductor device includes forming first and second dielectric layers in first and second trenches. The method includes forming first and second conductive layers on the first and second dielectric layers, respectively. The method includes forming first and second protective layers on the first and second conductive layers, respectively. The method includes performing an annealing process while the first and second protective layers are on the first and second conductive layers. The method includes removing the first and second protective layers. The method includes removing the first conductive layer, after performing the annealing process. Moreover, the method includes forming first and second gate metals in the first and second trenches, respectively, after removing the first conductive layer.

Abstract: Methods are provided for manufacturing semiconductor devices include forming a first fin protruding on a substrate and extending in a first direction; forming first and second sacrificial gate insulating layers on the first fin, the first and second sacrificial gate insulating layers intersecting the first fin and being spaced apart from each other; forming first and second sacrificial gate electrodes respectively on the first and second sacrificial gate insulating layers; forming a first insulating layer on the first and second sacrificial gate electrodes; removing a portion of the first insulating layer to expose the second sacrificial gate electrode; removing the exposed second sacrificial gate electrode using a first etching process to expose the second sacrificial gate insulating layer; removing the exposed second sacrificial gate insulating layer using a second etching process different from the first etching process to form a first trench which exposes the first fin; forming a first recess in the expos

Abstract: Provided is a method for fabricating a semiconductor device. The method includes forming an interlayer insulating layer on a substrate, the interlayer insulating layer including a first trench; forming a high-k dielectric layer in the first trench; successively forming a diffusion layer and a blocking layer on the high-k dielectric layer; subsequently performing annealing; after the annealing, successively removing the blocking layer and the diffusion layer; forming a first barrier layer on the high-k dielectric layer; successively forming a work function adjustment layer and a gate conductor on the first barrier layer; and forming a capping layer on the gate conductor.

Abstract: Provided are semiconductor devices and fabricating methods thereof. The semiconductor device includes a field insulating layer formed in a substrate, an interlayer dielectric layer formed on the field insulating layer and including a trench exposing at least a portion of the field insulating layer, a deposition insulating layer formed in the trench to be disposed on the field insulating layer, a gate insulating layer formed the trench to be disposed on the deposition insulating layer, and a metal gate formed the trench on the gate insulating layer.

Abstract: A semiconductor device is provided. The semiconductor device includes a first fin-type pattern and a second fin-type pattern formed abreast in a lengthwise direction, a first trench formed between the first fin-type pattern and the second fin-type pattern, a field insulating film partially filling the first trench, an interlayer insulating film on the field insulating film, an insulating line pattern, and a conductive pattern. An upper surface of the field insulating film is lower than an upper surface of the first fin-type pattern and an upper surface of the second fin-type pattern. The interlayer insulating film covers the first fin-type pattern and the second fin-type pattern, and includes a second trench exposing the upper surface of the field insulating film. The second trench includes an upper portion and a lower portion. The insulating line pattern fills the lower portion of the second trench, and the conductive pattern fills the upper portion of the second trench.