Abstract: A semiconductor die package includes: an assembly including a semiconductor die, a clip structure attached to an upper surface of the semiconductor die, and a heat sink attached to an upper surface of the clip structure; and a molding material partially encapsulating the assembly, wherein an upper surface of the heat sink is exposed through the molding material.

Abstract: A field-effect transistor package includes a leadframe with a first linear thickness (150a) and a leadframe pad (151) of a reduced thickness; a first terminal of a field-effect transistor chip (140) attached to the pad and a second and a third terminal remote from the pad; a metal sheet (110) of a second linear thickness (110a) connecting the second transistor terminal to a package terminal; a metal sheet (112) of a third linear thickness (112a) connecting the third transistor terminal to a package terminal; the sum of the first linear thickness (about 0.125 mm) and the second linear thickness (about 0.125 mm) plus attach material (about 0.05 mm) comprising the package thickness (about 0.3 mm).

Abstract: A wirebond-less packaged semiconductor device includes a plurality of I/O contacts, at least one semiconductor die, the semiconductor die having a bottom major surface and a top major surface, the top major surface having at least two electrically isolated electrodes, and a conductive clip system disposed over the top major surface, the clip system comprising at least two electrically isolated sections coupling the electrodes to respective I/O contacts.

Abstract: A packaged power transistor device (100) having a leadframe including a flat plate (110) and a coplanar flat strip (120) spaced from the plate, the plate having a first thickness (110a) and the strip having a second thickness (120a) smaller than the first thickness, the plate and the strip having terminals (212; 121a). A field-effect power transistor chip (210) having a third thickness (210a), a first and a second contact pad on one chip side, and a third contact pad (211) on the opposite chip side, the first pad being attached to the plate, the second pad being attached to the strip, and the third pad being coplanar with the terminals.

Abstract: A power supply module (400) comprising a metal leadframe with a pad (401) and a first metal clip (440) including a plate (440a), an extension (440b) and a ridge (440c); the plate and extension are spaced from the leadframe pad, and the ridge connected to an input supply. A synchronous Buck converter is in the space between the clip plate and the leadframe pad, the converter including a control FET die (410) soldered onto a sync FET die (420), the clip plate soldered to the control die having an input inductance (462), and the sync die soldered to the leadframe pad having an output capacitance. A capacitor (480a, 480b) integrated into the space between the clip extension and the leadframe pad, the clip extension soldered to the capacitor having a desired integrated inductance (463) operable to channel electrical energy from the switch node to ground.

Abstract: A high frequency power supply module (800) of a synchronous Buck converter having the control die (810) directly soldered drain-down to the pad (801) of a leadframe; pad (801) is connected to VIN and the VIN connection to control die (810) exhibits vanishing impedance and inductance, thus reducing the amplitude and duration of switch node voltage ringing by more than 90%. Consequently, the input current enters the control die terminal vertically from the pad. The switch node clip (840), topping the control die (810), is designed with an area large enough to place the sync die (820) drain-down on top of the control die; the current continues to flow vertically through the converter stack. The active area of the sync die is equal to or greater than the active area of the control die; the physical area of the sync die is equal to or greater than the physical area of the control die. The source terminal of sync die (820) is connected to ground by clip (860) designed to act as a heat spreader.

Abstract: A high frequency power supply module (200) of a synchronous Buck converter stacking the control FET (210) and sync FET (220) and having the driver IC (230) integrated in the final package solution. A QFN leadframe has a rectangular flat pad (201) destined to become the heat spreader of the package; the leads (202) are positioned in line with two opposite sides of the pad, the other pad sides being free of leads. The sync FET die (220) is soldered to the pad; a first clip (240), soldered on the sync die, has the control die (210) attached by solder. A second clip (260) is soldered on top of the control die. Also soldered on the same pad, yet not stacked with the other dies, is IC driver chip (230). The IC driver is wire bonded (233) to the pins of the package and to the stacked dies. All die attach and clip attach use the same solder material in order to be reflowed in the same reflow step.

Abstract: An electronic module has a non-conducting substrate having at least one opening and a die/carrier assembly mounted within the opening in the substrate. The assembly has a conducting carrier and one or more integrated circuit (IC) dies mounted to the carrier. The invention may be implemented as an electronic system comprising a circuit board (CB) and at least one such electronic module mounted to the CB.

Abstract: An amplifier module has a substrate, as assembly having one or more integrated circuit (IC) dies mounted to the substrate, and one or more other electronic components mounted to the substrate. The assembly receives an input signal and generates an amplified output signal. The one or more other electronic components perform one or more amplifier-related functions. The amplifier module is adapted to be mounted to a circuit board (CB) as a distinct electronic package. The invention may be implemented as an electronic system having the CB and at least one such amplifier module mounted to the CB.

Abstract: An amplifier module has a substrate, as assembly having one or more integrated circuit (IC) dies mounted to the substrate, and one or more other electronic components mounted to the substrate. The assembly receives an input signal and generates an amplified output signal. The one or more other electronic components perform one or more amplifier-related functions. The amplifier module is adapted to be mounted to a circuit board (CB) as a distinct electronic package. The invention may be implemented as an electronic system having the CB and at least one such amplifier module mounted to the CB.

Abstract: An electronic module has a non-conducting substrate having at least one opening and a die/carrier assembly mounted within the opening in the substrate. The assembly has a conducting carrier and one or more integrated circuit (IC) dies mounted to the carrier. The invention may be implemented as an electronic system comprising a circuit board (CB) and at least one such electronic module mounted to the CB.

Abstract: An integrated circuit device having a flexible leadframe, and techniques for fabricating the flexible leadframe and integrated circuit device, are provided. In one aspect of the invention, an integrated circuit device comprises a heat spreader having a top surface and a bottom surface. At least one integrated circuit die is attached to the top surface of the heat spreader. A flexible leadframe is also attached to the top surface of the heat spreader. The flexible leadframe has one or more flexible layers, including at least one flexible insulating layer. A plurality of electrically conductive traces are defined on the at least one flexible insulating layer.

Abstract: An integrated circuit device having a flexible leadframe, and techniques for fabricating the flexible leadframe and integrated circuit device, are provided. In one aspect of the invention, an integrated circuit device comprises a heat spreader having a top surface and a bottom surface. At least one integrated circuit die is attached to the top surface of the heat spreader. A flexible leadframe is also attached to the top surface of the heat spreader. The flexible leadframe has one or more flexible layers, including at least one flexible insulating layer. A plurality of electrically conductive traces are defined on the at least one flexible insulating layer.

Abstract: A process for fabricating a power hybrid module including placing at least one carrier assembly in at least one opening in at least one printed circuit board, mounting the at least one carrier assembly and the at least one printed circuit board on assembly tape, electrically connecting one of the at least one carrier assemblies and one of the at least one printed circuit boards, overmolding the at least one carrier assembly and the at least one printed circuit board and removing the assembly tape to produce a surface mount power hybrid module. A power hybrid module including at least one printed circuit board with at least one opening therein, at least one carrier assembly, positioned in the at least one opening such that said at least one carrier assembly may be surface mounted and electrically connected to the at least one printed circuit board, and an overmold over the at least one printed circuit board and the at least one carrier assembly.

Abstract: The effects of electromigration have been shown to lead to damage of metal electrodes of electronic devices such as thin film resonator (TFR) devices in only a few hours, for a test input power that is within the operational range of these devices. It has been determined that this failure is sensitive to the frequency of the input power. The present invention provides a method and apparatus for determining high power reliability in electronic devices, so as to enable an accurate determination of the failure time of the electronic device, and hence projected lifetime. This determination is independent from the frequency of an input power applied to the electronic device as part of the method for testing the device. Based on the above results, a TFR device has been developed, which includes a protective or electromigration-reducing layer such as titanium being deposited atop an electrode of the device.