Abstract: A replacement gate process is disclosed. A substrate and a dummy gate structure formed on the substrate is provided, wherein the dummy gate structure comprises a dummy layer on the substrate, a hard mask layer on the dummy layer, spacers at two sides of the dummy layer and the hard mask layer, and a contact etch stop layer (CESL) covering the substrate, the spacers and the hard mask layer. The spacers and the CESL are made of the same material. Then, a top portion of the CESL is removed to expose the hard mask layer. Next, the hard mask layer is removed. Afterward, the dummy layer is removed to form a trench.

Abstract: A method of forming shallow trench isolation structures including the steps of forming a trench in a substrate, filling a first insulating layer in the lower portion of the trench and defining a recess at the upper portion of the trench, forming a buffer layer on the sidewall of the recess, filling a second insulating layer in the recess, and performing a steam annealing process to transform the substrate surrounding the first insulating layer into an oxide layer.

Abstract: A thin film resistor structure includes a substrate, a flat bottom ILD (inter layer dielectric) disposed on the substrate, a plurality of first contacts disposed in the bottom ILD, and each top surface of the first contacts is on the same level as a top surface of the bottom ILD; a flat top ILD disposed on the bottom ILD, a plurality of second contacts disposed in the top ILD, and each top surface of the second contacts is on the same level as a top surface of the top ILD, and a thin film resistor disposed between the bottom ILD and the top ILD.

Abstract: A method for manufacturing semiconductor structures includes providing a substrate having a plurality of mandrel patterns and a plurality of dummy patterns, simultaneously forming a plurality of first spacers on sidewalls of the mandrel patterns and a plurality of second spacers on sidewalls of the dummy patterns, and removing the second spacers and the mandrel patterns to form a plurality of spacer patterns on the substrate.

Abstract: A method of fabricating a patterned structure of a semiconductor device is provided. First, a substrate having a first region and a second region is provided. A target layer, a hard mask layer and a first patterned mask layer are then sequentially formed on the substrate. A first etching process is performed by using the first patterned mask layer as an etch mask so that a patterned hard mask layer is therefore formed. Spacers are respectively formed on each sidewall of the patterned hard mask layer. Then, a second patterned mask layer is formed on the substrate. A second etching process is performed to etch the patterned hard mask layer in the second region. After the exposure of the spacers, the patterned hard mask layer is used as an etch mask and an exposed target layer is removed until the exposure of the corresponding substrate.

Abstract: A shallow trench isolation (STI) and method of forming the same is provided. The STI structure comprises an upper insulating portion and a lower insulating portion, wherein the lower insulating portion includes a first insulator and an insulating layer surrounding the first insulator, the upper insulating portion includes a second insulator and a buffer layer surrounding the second insulator. A part of the buffer layer interfaces between the first insulator and the second insulator, and the outer sidewall of the buffer layer and the sidewall of the first insulator are leveled.

Abstract: An epitaxial process includes the following steps. A substrate including a first area and a second area is provided. A first gate and a second gate are formed respectively on the substrate of the first area and the second area. A first spacer and a second spacer are respectively formed on the substrate beside the first gate and the second gate at the same time. A first epitaxial structure is formed beside the first spacer and then a second epitaxial structure is formed beside the second spacer by the first spacer and the second spacer respectively.

Abstract: A method for forming a semiconductor device comprises the following steps: first, a substrate is provided, a first photo-etching process is carried out with a first photomask to form at least one device structure and a plurality of compensation structures, wherein the first photomask comprises at least one device pattern and a plurality of dummy patterns. A photoresist layer is then formed on the device structure and each compensation structures; a second photo-etching process is then carried out with a second photomask to remove each compensation structure.

Abstract: A shallow trench isolation (STI) and method of forming the same is provided. The STI structure comprises an upper insulating portion and a lower insulating portion, wherein the lower insulating portion includes a first insulator and an insulating layer surrounding the first insulator, the upper insulating portion includes a second insulator and a buffer layer surrounding the second insulator. A part of the buffer layer interfaces between the first insulator and the second insulator, and the outer sidewall of the buffer layer and the sidewall of the first insulator are leveled.

Abstract: A semiconductor structure includes a first gate and a second gate, a first spacer and a second spacer, two first epitaxial structures and two second epitaxial structures. The first gate and the second gate are located on a substrate. The first spacer and the second spacer are respectively located on the substrate beside the first gate and the second gate. The first epitaxial structures and the second epitaxial structures are respectively located in the substrate beside the first spacer and the second spacer, wherein the first spacer and the second spacer have different thicknesses, and the spacing between the first epitaxial structures is different from the spacing between the second epitaxial structures. Moreover, the present invention also provides a semiconductor process forming said semiconductor structure.

Abstract: The present invention discloses a battery powered apparatus with the circuit of integrated power management and charger unit. It mainly comprises a power management and charger unit, a battery powered device, a battery and an adaptor. By integrating the charger unit, the power switch and the programmable current source to the micro-processor, the micro-processor can properly control the power supplied from the adaptor to the battery under the charging mode operation, which further derives a smoother curve of charging current.

Abstract: A touch panel including a first substrate, plural first electrode lines and plural second electrode lines is provided. The first electrode lines and the second electrode lines are respectively arranged on the first substrate and extended along two different directions respectively. Each of the first electrode lines includes plural electrode pads and plural first connecting parts connected therebetween, wherein each of the first connecting parts has two end portions and a center portion, a width of each of the first connecting parts is decreased from the two end portions to the center portion, and corners of connections between the end portions and the corresponding electrode pads are smooth curved surfaces. The second electrode lines are electrically insulated with the first electrode lines, and perpendicular projections of each of the second electrode lines and the corresponding first connecting part on the first substrate are intersected to form an overlap region.

Abstract: A thin film resistor structure includes a substrate, a flat bottom ILD (inter layer dielectric) disposed on the substrate, a plurality of first contacts disposed in the bottom ILD, and each top surface of the first contacts is on the same level as a top surface of the bottom ILD; a flat top ILD disposed on the bottom ILD, a plurality of second contacts disposed in the top ILD, and each top surface of the second contacts is on the same level as a top surface of the top ILD, and a thin film resistor disposed between the bottom ILD and the top ILD.

Abstract: A semiconductor structure includes a gate structure disposed on a substrate and having an outer spacer, a recess disposed in the substrate and adjacent to the gate structure, a doped epitaxial material filling up the recess, a cap layer including an undoped epitaxial material and disposed on the doped epitaxial material, a lightly doped drain disposed below the cap layer and sandwiched between the doped epitaxial material and the cap layer, and a silicide disposed on the cap layer and covering the doped epitaxial material to cover the cap layer together with the outer spacer without directly contacting the lightly doped drain.

Abstract: The present invention discloses a battery powered apparatus with the circuit of integrated power management and charger unit. It mainly comprises a power management and charger unit, a battery powered device, a battery and an adaptor. By integrating the charger unit, the power switch and the programmable current source to the micro-processor, the micro-processor can properly control the power supplied from the adaptor to the battery under the charging mode operation, which further derives a smoother curve of charging current.

Abstract: A display system uses a broadcast device that can receive a plurality of media signals from a plurality of media sources and interlace two or more media signals frame-by-frame to form a display signal with multiplied frequency for being displayed on its panel. A plurality of goggles and corresponding synchronizing devices, selectors, and audio playback components are used in the display system to select and view/listen to each dedicated media signals. Each goggle used by each user is synchronized to turn on by following the timing of its selected media signals so that two or more users who wear dedicated goggles can see different programs on a single broadcast device at the same time.

Abstract: A micro-electromechanical device includes a substrate, a first patterned conductive layer, a second patterned conductive layer and a first patterned blocking layer. The first patterned conductive layer is disposed on the substrate. The second patterned conductive layer is disposed on the first patterned conductive layer. The first patterned blocking layer is connected with the first patterned conductive layer and the second patterned conductive layer. In addition, a method of manufacturing the micro-electromechanical device is also disclosed.

Abstract: A capacitance sensing structure includes a substrate, a sensing electrode layer, at least one stack layer and a conductive body. The sensing electrode layer is formed on or in the substrate. The stack layer is formed on the sensing electrode layer. The conductive body is disposed over and corresponding to the sensing electrode layer and the stack layer.

Abstract: A self-setting security guarding system and method for protecting against unauthorized access to data stored in a data processing apparatus, comprising setting various items used to guard data, wherein the items consist of protected areas with access control for data storage and access therein, authorized types of files with access controls, and access rules of safety regulations enabling the data processing apparatus to verify access to data contents stored therein or in the protected area thereof; and detecting access events of the protected area or types of files using the access control and generating a request for analysis when an access event is detected, and further analyzing whether the detected access event complies with the access rules and the analysis request to permit or deny execution of said access event depending on whether it complies or not with safety regulations.

Abstract: A charge control system for lithium battery using pulse width modulation is provided, and it detects the existing voltage of the charging lithium battery by a voltage detector and passes this voltage value to a microprocessor preset in the hand-held apparatus. Thus, the microprocessor can decide the applicable charge stage and confirm the status of the charging battery depending on the different Voltage values in real time. Next, the microprocessor controls a control unit by a pulse width modulation signal to modulate the power-source, which comes from an adaptor, as a constant current or a constant voltage to charge the battery. Accordingly, the charge process is completed by repeating the voltage detection and the duty cycle modulation of the control unit.