Patents by Inventor Jui-Ping Chuang
Jui-Ping Chuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11940737Abstract: A method includes receiving a device design layout and a scribe line design layout surrounding the device design layout. The device design layout and the scribe line design layout are rotated in different directions. An optical proximity correction (OPC) process is performed on the rotated device design layout and the rotated scribe line design layout. A reticle includes the device design layout and the scribe line design layout is formed after performing the OPC process.Type: GrantFiled: May 7, 2021Date of Patent: March 26, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hsueh-Yi Chung, Yung-Cheng Chen, Fei-Gwo Tsai, Chi-Hung Liao, Shih-Chi Fu, Wei-Ti Hsu, Jui-Ping Chuang, Tzong-Sheng Chang, Kuei-Shun Chen, Meng-Wei Chen
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Publication number: 20230275142Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate. The semiconductor device structure also includes a gate stack covering a portion of the fin structure, and the gate stack includes a work function layer and a metal filling over the work function layer. The semiconductor device structure further includes an isolation element over the semiconductor substrate and adjacent to the gate stack. The isolation element is in direct contact with the work function layer and the metal filling.Type: ApplicationFiled: May 5, 2023Publication date: August 31, 2023Inventors: Che-Cheng Chang, Jui-Ping Chuang, Chen-Hsiang Lu, Yu-Cheng Liu, Wei-Ting Chen
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Patent number: 11682716Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate. The semiconductor device structure also includes a gate stack covering a portion of the fin structure, and the gate stack includes a work function layer and a metal filling over the work function layer. The semiconductor device structure further includes an isolation element over the semiconductor substrate and adjacent to the gate stack. The isolation element is in direct contact with the work function layer and the metal filling.Type: GrantFiled: June 15, 2020Date of Patent: June 20, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Che-Cheng Chang, Jui-Ping Chuang, Chen-Hsiang Lu, Yu-Cheng Liu, Wei-Ting Chen
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Patent number: 11150558Abstract: A developing method is provided. The developing method includes rotating a wafer. The developing method also includes dispensing, through a first nozzle, a developer solution onto the rotated wafer through a first nozzle at a first rotating speed. The developing method further includes dispensing, through a second nozzle, a rinse solution onto the rotated wafer through a second nozzle at a second rotating speed. The second rotating speed is less than the first rotating speed. In addition, the developing method includes simultaneously moving the first nozzle and the second nozzle during either the dispensing of the developer solution or the dispensing of the rinse solution.Type: GrantFiled: April 15, 2020Date of Patent: October 19, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yi-Rem Chen, Ming-Shane Lu, Chung-Hao Chang, Jui-Ping Chuang, Li-Kong Turn, Fei-Gwo Tsai
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Publication number: 20210263425Abstract: A method includes receiving a device design layout and a scribe line design layout surrounding the device design layout. The device design layout and the scribe line design layout are rotated in different directions. An optical proximity correction (OPC) process is performed on the rotated device design layout and the rotated scribe line design layout. A reticle includes the device design layout and the scribe line design layout is formed after performing the OPC process.Type: ApplicationFiled: May 7, 2021Publication date: August 26, 2021Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hsueh-Yi CHUNG, Yung-Cheng CHEN, Fei-Gwo TSAI, Chi-Hung LIAO, Shih-Chi FU, Wei-Ti HSU, Jui-Ping CHUANG, Tzong-Sheng CHANG, Kuei-Shun CHEN, Meng-Wei CHEN
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Patent number: 11003091Abstract: A method for exposing a wafer substrate includes forming a reticle having a device pattern. A relative orientation between the device pattern and a mask field of an exposure tool is determined based on mask field utilization. The reticle is loaded on the exposure tool. The wafer substrate is rotated based on an orientation of the device pattern. Radiation is projected through the reticle onto the rotated wafer substrate by the exposure tool, thereby imaging the device pattern onto the rotated wafer substrate.Type: GrantFiled: January 10, 2020Date of Patent: May 11, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hsueh-Yi Chung, Yung-Cheng Chen, Fei-Gwo Tsai, Chi-Hung Liao, Shih-Chi Fu, Wei-Ti Hsu, Jui-Ping Chuang, Tzong-Sheng Chang, Kuei-Shun Chen, Meng-Wei Chen
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Publication number: 20200312985Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate. The semiconductor device structure also includes a gate stack covering a portion of the fin structure, and the gate stack includes a work function layer and a metal filling over the work function layer. The semiconductor device structure further includes an isolation element over the semiconductor substrate and adjacent to the gate stack. The isolation element is in direct contact with the work function layer and the metal filling.Type: ApplicationFiled: June 15, 2020Publication date: October 1, 2020Inventors: Che-Cheng Chang, Jui-Ping Chuang, Chen-Hsiang Lu, Yu-Cheng Liu, Wei-Ting Chen
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Publication number: 20200241421Abstract: A developing method is provided. The developing method includes rotating a wafer. The developing method also includes dispensing, through a first nozzle, a developer solution onto the rotated wafer through a first nozzle at a first rotating speed. The developing method further includes dispensing, through a second nozzle, a rinse solution onto the rotated wafer through a second nozzle at a second rotating speed. The second rotating speed is less than the first rotating speed. In addition, the developing method includes simultaneously moving the first nozzle and the second nozzle during either the dispensing of the developer solution or the dispensing of the rinse solution.Type: ApplicationFiled: April 15, 2020Publication date: July 30, 2020Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yi-Rem CHEN, Ming-Shane LU, Chung-Hao CHANG, Jui-Ping CHUANG, Li-Kong TURN, Fei-Gwo TSAI
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Patent number: 10686060Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate and a gate stack covering a portion of the fin structure. The gate stack includes a work function layer and a gate dielectric layer. The semiconductor device structure also includes an isolation element over the semiconductor substrate and adjacent to the gate stack. The isolation element is in direct contact with the work function layer and the gate dielectric layer, and a lower width of the isolation element is greater than an upper width of the isolation element.Type: GrantFiled: June 17, 2019Date of Patent: June 16, 2020Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Che-Cheng Chang, Jui-Ping Chuang, Chen-Hsiang Lu, Wei-Ting Chen, Yu-Cheng Liu
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Patent number: 10686059Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate. The semiconductor device structure also includes a gate stack covering a portion of the fin structure, and the gate stack includes a work function layer and a metal filling over the work function layer. The semiconductor device structure further includes an isolation element over the semiconductor substrate and adjacent to the gate stack. The isolation element is in direct contact with the work function layer and the metal filling.Type: GrantFiled: June 25, 2018Date of Patent: June 16, 2020Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Che-Cheng Chang, Jui-Ping Chuang, Chen-Hsiang Lu, Yu-Cheng Liu, Wei-Ting Chen
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Publication number: 20200150546Abstract: A method for exposing a wafer substrate includes forming a reticle having a device pattern. A relative orientation between the device pattern and a mask field of an exposure tool is determined based on mask field utilization. The reticle is loaded on the exposure tool. The wafer substrate is rotated based on an orientation of the device pattern. Radiation is projected through the reticle onto the rotated wafer substrate by the exposure tool, thereby imaging the device pattern onto the rotated wafer substrate.Type: ApplicationFiled: January 10, 2020Publication date: May 14, 2020Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hsueh-Yi CHUNG, Yung-Cheng CHEN, Fei-Gwo TSAI, Chi-Hung LIAO, Shih-Chi FU, Wei-Ti HSU, Jui-Ping CHUANG, Tzong-Sheng CHANG, Kuei-Shun CHEN, Meng-Wei CHEN
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Patent number: 10627718Abstract: A developing method comprises steps as follows. A wafer is rotated. A developer solution is dispensed onto the rotated wafer through a first nozzle. The first nozzle is moved back and forth between a first position and a second position, in which moving the first nozzle back and forth is performed such that the first nozzle moving forward to the second position is reversed at the second position and that the first nozzle moving forward to the first position is reversed at the first position, and the first position and the second position are directly over the wafer, and the developer solution is dispensed through the first nozzle when moving the first nozzle back and forth between the first position and the second position.Type: GrantFiled: October 15, 2018Date of Patent: April 21, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yi-Rem Chen, Ming-Shane Lu, Chung-Hao Chang, Jui-Ping Chuang, Li-Kong Turn, Fei-Gwo Tsai
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Patent number: 10534272Abstract: A method for exposing a wafer substrate includes forming a reticle having a device pattern. A relative orientation between the device pattern and a mask field of an exposure tool is determined based on mask field utilization. The reticle is loaded on the exposure tool. The wafer substrate is rotated based on an orientation of the device pattern. Radiation is projected through the reticle onto the rotated wafer substrate by the exposure tool, thereby imaging the device pattern onto the rotated wafer substrate.Type: GrantFiled: September 10, 2018Date of Patent: January 14, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hsueh-Yi Chung, Yung-Cheng Chen, Fei-Gwo Tsai, Chi-Hung Liao, Shih-Chi Fu, Wei-Ti Hsu, Jui-Ping Chuang, Tzong-Sheng Chang, Kuei-Shun Chen, Meng-Wei Chen
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Publication number: 20190305115Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate and a gate stack covering a portion of the fin structure. The gate stack includes a work function layer and a gate dielectric layer. The semiconductor device structure also includes an isolation element over the semiconductor substrate and adjacent to the gate stack.Type: ApplicationFiled: June 17, 2019Publication date: October 3, 2019Inventors: Che-Cheng Chang, Jui-Ping Chuang, Chen-Hsiang Lu, Wei-Ting Chen, Yu-Cheng Liu
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Patent number: 10326005Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate and a gate stack covering a portion of the fin structure. The gate stack includes a work function layer and a gate dielectric layer. The semiconductor device structure also includes an isolation element over the semiconductor substrate and adjacent to the gate stack. The isolation element is in direct contact with the work function layer and the gate dielectric layer, and a lower width of the isolation element is greater than an upper width of the isolation element.Type: GrantFiled: February 19, 2018Date of Patent: June 18, 2019Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Che-Cheng Chang, Jui-Ping Chuang, Chen-Hsiang Lu, Wei-Ting Chen, Yu-Cheng Liu
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Patent number: 10276469Abstract: A method for forming a semiconductor device structure is provided. The method includes performing a first process over a surface of a semiconductor substrate. The method includes forming a protective layer over the surface of the semiconductor substrate in a first chamber after the first process. The method includes performing a first transferring process to transfer the semiconductor substrate from the first chamber into a substrate carrier. The method includes performing a second transferring process to transfer the semiconductor substrate from the substrate carrier into a second chamber. The semiconductor substrate is located in the substrate carrier during a substantially entire first time interval between the first transferring process and the second transferring process. The method includes removing the substantially entire protective layer in the second chamber. The method includes performing a second process over the surface of the semiconductor substrate.Type: GrantFiled: April 17, 2015Date of Patent: April 30, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTDInventors: Weibo Yu, Jui-Ping Chuang, Chen-Hsiang Lu, Shao-Yen Ku
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Publication number: 20190049848Abstract: A developing method comprises steps as follows. A wafer is rotated. A developer solution is dispensed onto the rotated wafer through a first nozzle. The first nozzle is moved back and forth between a first position and a second position, in which moving the first nozzle back and forth is performed such that the first nozzle moving forward to the second position is reversed at the second position and that the first nozzle moving forward to the first position is reversed at the first position, and the first position and the second position are directly over the wafer, and the developer solution is dispensed through the first nozzle when moving the first nozzle back and forth between the first position and the second position.Type: ApplicationFiled: October 15, 2018Publication date: February 14, 2019Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yi-Rem CHEN, Ming-Shane LU, Chung-Hao CHANG, Jui-Ping CHUANG, Li-Kong TURN, Fei-Gwo TSAI
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Publication number: 20190004436Abstract: A method for exposing a wafer substrate includes forming a reticle having a device pattern. A relative orientation between the device pattern and a mask field of an exposure tool is determined based on mask field utilization. The reticle is loaded on the exposure tool. The wafer substrate is rotated based on an orientation of the device pattern. Radiation is projected through the reticle onto the rotated wafer substrate by the exposure tool, thereby imaging the device pattern onto the rotated wafer substrate.Type: ApplicationFiled: September 10, 2018Publication date: January 3, 2019Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hsueh-Yi CHUNG, Yung-Cheng CHEN, Fei-Gwo TSAI, Chi-Hung LIAO, Shih-Chi FU, Wei-Ti HSU, Jui-Ping CHUANG, Tzong-Sheng CHANG, Kuei-Shun CHEN, Meng-Wei CHEN
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Publication number: 20180308956Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate. The semiconductor device structure also includes a gate stack covering a portion of the fin structure, and the gate stack includes a work function layer and a metal filling over the work function layer. The semiconductor device structure further includes an isolation element over the semiconductor substrate and adjacent to the gate stack. The isolation element is in direct contact with the work function layer and the metal filling.Type: ApplicationFiled: June 25, 2018Publication date: October 25, 2018Inventors: Che-Cheng Chang, Jui-Ping Chuang, Chen-Hsiang Lu, Yu-Cheng Liu, Wei-Ting Chen
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Patent number: 10101662Abstract: A developing method includes rotating a wafer. A developer solution is dispensed onto the rotated wafer through a first nozzle. The first nozzle is moved from a first position to a second position. The first position and the second position are over the wafer and within a perimeter of the wafer when viewed from a top of the wafer. The developer solution is dispensed through the first nozzle when moving the first nozzle from the first position to the second position. The first nozzle is moved back from the second position to the first position immediately after the first nozzle is moved from the first position to the second position. The developer solution is dispensed through the first nozzle when moving the first nozzle from the second position to the first position.Type: GrantFiled: August 14, 2017Date of Patent: October 16, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yi-Rem Chen, Ming-Shane Lu, Chung-Hao Chang, Jui-Ping Chuang, Li-Kong Turn, Fei-Gwo Tsai