Abstract: The invention aims for a polarisation circuit of a power component comprising a capacitive dividing bridge and a resistive dividing bridge formed on the same substrate as the component. An additional electrode 1? in the front face 100 of the substrate makes it possible to adjust one of the capacitance values of the capacitive dividing bridge according to the other of the capacitance values coming from one of the electrodes of the power component. The sizing of this additional electrode furthermore makes it possible to obtain a leakage resistance contributing to the resistive dividing bridge. Alternatively, two additional resistances R, R? formed in the front face of the substrate making it possible to obtain the resistive dividing bridge independently of the capacitive dividing bridge.

Abstract: An electronic circuit is provided, including, on one same substrate, an inverter branch formed by high side and low side transistors, and the drivers of the high side and the low side transistors. The drivers include logic gates configured to receive one same PWM input signal and to generate two alternated command signals sent to the high side and the low side transistors. An inverter system is also provided, including the electronic circuit and laser optocouplers configured to electrically insulate the electronic circuit of a controller delivering a pulse width modulation (PWM) input signal and a main supply electrically supplying the drivers.

Abstract: An electronic circuit is provided, including, on one same substrate, an inverter branch formed by high side and low side transistors, and the drivers of the high side and the low side transistors. The drivers include logic gates configured to receive one same PWM input signal and to generate two alternated command signals sent to the high side and the low side transistors. An inverter system is also provided, including the electronic circuit and laser optocouplers configured to electrically insulate the electronic circuit of a controller delivering a pulse width modulation (PWM) input signal and a main supply electrically supplying the drivers.

Abstract: An optocoupler is provided, including at least one light source and at least one matrix of photovoltaic cells facing the at least one light source, the at least one light source being configured to receive, at an input, an input electrical signal, and to generate, at an output, according to the input electrical signal, a light signal, sent to the at least one matrix of photovoltaic cells, the at least one matrix of photovoltaic cells being configured to receive, at the input, at least partially the light signal and to deliver, at the output, at least one output electrical signal, at the level of at least two connection pads, and the at least one light source being a matrix of laser diodes.

Abstract: A normally-off heterojunction field-effect transistor is provided, including a superposition of a first layer, of III-N type, and of a second layer, of III-N type, so as to form a two-dimensional electron gas; a stack of an n-doped third layer making electrical contact with the second layer, and of a p-doped fourth layer placed in contact with and on the third layer, a first conductive electrode and a second conductive electrode making electrical contact with the two-dimensional electron gas; a dielectric layer disposed against a lateral face of the fourth layer; and a control electrode separated from the lateral face of the fourth layer by the dielectric layer.

Abstract: A high-electron-mobility field-effect transistor includes a superposition of first and second layers of semiconductor materials so as to form an electron gas layer and includes a gate stack arranged on the superposition. The gate stack includes a conductive electrode and an element made of p-doped semiconductor material, arranged between the conductive electrode and the superposition. The gate stack includes a first dielectric layer arranged between the conductive electrode and the element made of semiconductor material. The element made of semiconductor material, the first dielectric layer, and the conductive electrode have aligned lateral flanks.

Abstract: A heterojunction diode is provided, including first and second semiconductor layers made of III-N material, the layers being superposed to form a two-dimensional electron gas; an anode and a cathode that are selectively electrically connected to each other by the electron gas; a third semiconductor layer positioned under the gas; a p-doped first semiconductor element contacting the anode the third layer, and forming a separation between the anode and the third layer; and an n-doped second semiconductor element contacting the cathode and the third layer, and forming a separation between the cathode and the third layer, the third layer and the first and second elements forming a p-i-n diode.

Abstract: The invention relates to a normally-off high-electron-mobility field-effect transistor having a superposition of a first layer of semiconductor material and a second layer of semiconductor material so as form an electron gas layer at the interface between the first and second layers. A trench separates the superposition into first and second domains. An insulating element is positioned in the trench in order to electrically insulate the first and second domains. A p-doped semiconductor element is in contact with the first or the second layer of semiconductor material of the first and second domains, and extends continuously between the first and second domains. A gate insulator is positioned on the semiconductor element and a gate electrode is positioned on the gate insulator.

Abstract: A heterojunction diode is provided, including first and second semiconductor layers made of III-N material, the layers being superposed to form a two-dimensional electron gas; an anode and a cathode that are selectively electrically connected to each other by the electron gas; a third semiconductor layer positioned under the gas; a p-doped first semiconductor element contacting the anode the third layer, and forming a separation between the anode and the third layer; and an n-doped second semiconductor element contacting the cathode and the third layer, and forming a separation between the cathode and the third layer, the third layer and the first and second elements forming a p-i-n diode.

Abstract: The invention relates to a method for functionalizing an electrically conductive substrate, which is not a substrate made of gold, via a layer of chemical compounds, said method comprising the following steps: a step in which the electrically conductive substrate is placed in contact with chemical compounds comprising at least a disulfide terminal group; a step in which the disulfide terminal group of said chemical compounds is electro-oxidized, causing said chemical compounds to form a layer at the surface of the electrically conductive substrate.

Abstract: The invention relates to a normally-off high-electron-mobility field-effect transistor (1), comprising: a superposition of a first layer of semiconductor material (15) and a second layer of semiconductor material (16) so as form an electron gas layer (17) at the interface between these first and second layers; a trench (5) separating the superposition into first and second domains (51, 52); an insulating element (34) positioned in said trench in order to electrically insulate said first and second domains; a p-doped semiconductor element (33) in contact with the first or the second layer of semiconductor material (16) of the first and second domains (51, 52), and extending continuously between the first and second domains; a gate insulator (32) positioned on the semiconductor element (33); a gate electrode (31) positioned on the gate insulator (32).

Abstract: According to one embodiment, the present invention relates to a method for manufacturing a photovoltaic device comprising a photovoltaic cell or a plurality of photovoltaic cells (PV cells) connected to an electronic integrated circuit having at least one electrical contact area. A stack comprising the PV cell(s) is produced separately from the electronic integrated circuit, the electronic integrated circuit is then transferred to said stack comprising the PV cell(s). During this transfer, connection areas carried by the PV cell(s) are brought into contact with matching connection areas carried by the electronic integrated circuit.

Abstract: The invention relates to a photovoltaic cell with silicon heterojunction comprising a doped crystalline silicon substrate, in which: —a first face of the substrate is successively covered with a passivation layer, an amorphous or p or p+ doped microcrystalline silicon layer and a layer of a transparent conducting material, —the second face of the substrate is successively covered with an amorphous or n or n+ doped microcrystalline silicon layer and a layer of a transparent conducting material. Between the substrate and the amorphous or n or n+ doped microcrystalline silicon layer, the cell comprises a layer of a crystalline semi-conducting material selected from gallium nitride or indium gallium nitride and having a conduction band that is sensitively aligned with the conduction band of the silicon and a band gap greater than that of silicon, in such a way as to promote an electron current while limiting a hole current in the substrate towards the amorphous or n or n+ doped microcrystalline silicon layer.

Abstract: A logic module includes a device for implementing a logic function the device including at least one input and at least one output, the output at least partially representing the result of the logic function; at least one first element including at least one resistance state, at least one second element formed by a bipolar resistive memory; the first element and the second element having a common electrode connected to the output.

Abstract: The invention relates to a photovoltaic cell having a heterojunction, including a doped substrate (1), in which: a first main face (1A) of said substrate is covered with a passivation layer (2A), a doped layer (3A) of the type opposite to the substrate and forming the transmitter of said cell; the second main face (1B) of said substrate is covered with a passivation layer (2B), a doped layer (3B) of the same type as the substrate defining a repulsing field for the minor carriers of the substrate; characterized in that: the material of the passivation layer (2A) on the transmitter (E) side is selected so as to have a lower potential barrier for the photo-generated minor carriers than for the major carrier of the substrate; and in that the material of the passivation layer (2B) on the side of the repulsing field (BSF) is selected so as to have a lower potential barrier for all the photo-generated major carriers than for the minor carriers of the substrate.

Abstract: An electronic device includes a heat source, a heat-absorbing cold point, a thermally insulating material for insulating the heat source from the cold point with a conductivity at a use-temperature of electronic device, that is below a thermal-conductivity threshold, and a thermal bridge having first and second ends connected by pads to the heat source and the cold point, and a thermal switch. The thermal bridge extends between the two ends and switches reversibly between conductive and non-conductive states. It includes material of variable thermal conductivity capable of switching over, in response to an addition of energy, between a conductive phase and a resistive phase, and a control module for causing the thermal switch to switch between the conductive state and the resistive state.

Abstract: According to one embodiment, the present invention relates to a method for manufacturing a photovoltaic device comprising a photovoltaic cell or a plurality of photovoltaic cells (PV cells) connected to an electronic integrated circuit having at least one electrical contact area. A stack comprising the PV cell(s) is produced separately from the electronic integrated circuit, the electronic integrated circuit is then transferred to said stack comprising the PV cell(s). During this transfer, connection areas carried by the PV cell(s) are brought into contact with matching connection areas carried by the electronic integrated circuit.

Abstract: A logic module includes a device for implementing a logic function the device including at least one input and at least one output, the output at least partially representing the result of the logic function; at least one first element including at least one resistance state, at least one second element formed by a bipolar resistive memory; the first element and the second element having a common electrode connected to the output.

Abstract: The invention relates to a method for functionalizing an electrically conductive substrate, which is not a substrate made of gold, via a layer of chemical compounds, said method comprising the following steps: a step in which the electrically conductive substrate is placed in contact with chemical compounds comprising at least a disulfide terminal group; a step in which the disulfide terminal group of said chemical compounds is electro-oxidized, causing said chemical compounds to form a layer at the surface of the electrically conductive substrate.

Abstract: A method for making a crossbar array of crossed conductive or semi-conductive access lines on a substrate, the crossbar array including on a crossbar array insulator, in a plane parallel to the substrate, a first level of lines including a plurality of first lines parallel with each other made of a conductive or semi-conductive material; on the first level of lines, a second level of lines including a plurality of second lines parallel with each other made of a conductive or semi-conductive material, the second lines being substantially perpendicular to the first lines. The method includes forming, on the substrate, a first cavity of substantially rectangular shape; forming a second cavity of substantially rectangular shape superimposed to the first cavity, the first and second cavities intersecting each other perpendicularly so as to form a resultant cavity.